155 #define RTE_ETHDEV_HAS_LRO_SUPPORT 158 #ifdef RTE_LIBRTE_ETHDEV_DEBUG 159 #define RTE_ETHDEV_DEBUG_RX 160 #define RTE_ETHDEV_DEBUG_TX 164 #include <rte_compat.h> 172 #include <rte_config.h> 176 #include "rte_dev_info.h" 178 extern int rte_eth_dev_logtype;
180 #define RTE_ETHDEV_LOG(level, ...) \ 181 rte_log(RTE_LOG_ ## level, rte_eth_dev_logtype, "" __VA_ARGS__) 246 #define RTE_ETH_FOREACH_MATCHING_DEV(id, devargs, iter) \ 247 for (rte_eth_iterator_init(iter, devargs), \ 248 id = rte_eth_iterator_next(iter); \ 249 id != RTE_MAX_ETHPORTS; \ 250 id = rte_eth_iterator_next(iter)) 290 #define RTE_ETH_LINK_SPEED_AUTONEG 0 291 #define RTE_ETH_LINK_SPEED_FIXED RTE_BIT32(0) 292 #define RTE_ETH_LINK_SPEED_10M_HD RTE_BIT32(1) 293 #define RTE_ETH_LINK_SPEED_10M RTE_BIT32(2) 294 #define RTE_ETH_LINK_SPEED_100M_HD RTE_BIT32(3) 295 #define RTE_ETH_LINK_SPEED_100M RTE_BIT32(4) 296 #define RTE_ETH_LINK_SPEED_1G RTE_BIT32(5) 297 #define RTE_ETH_LINK_SPEED_2_5G RTE_BIT32(6) 298 #define RTE_ETH_LINK_SPEED_5G RTE_BIT32(7) 299 #define RTE_ETH_LINK_SPEED_10G RTE_BIT32(8) 300 #define RTE_ETH_LINK_SPEED_20G RTE_BIT32(9) 301 #define RTE_ETH_LINK_SPEED_25G RTE_BIT32(10) 302 #define RTE_ETH_LINK_SPEED_40G RTE_BIT32(11) 303 #define RTE_ETH_LINK_SPEED_50G RTE_BIT32(12) 304 #define RTE_ETH_LINK_SPEED_56G RTE_BIT32(13) 305 #define RTE_ETH_LINK_SPEED_100G RTE_BIT32(14) 306 #define RTE_ETH_LINK_SPEED_200G RTE_BIT32(15) 312 #define RTE_ETH_SPEED_NUM_NONE 0 313 #define RTE_ETH_SPEED_NUM_10M 10 314 #define RTE_ETH_SPEED_NUM_100M 100 315 #define RTE_ETH_SPEED_NUM_1G 1000 316 #define RTE_ETH_SPEED_NUM_2_5G 2500 317 #define RTE_ETH_SPEED_NUM_5G 5000 318 #define RTE_ETH_SPEED_NUM_10G 10000 319 #define RTE_ETH_SPEED_NUM_20G 20000 320 #define RTE_ETH_SPEED_NUM_25G 25000 321 #define RTE_ETH_SPEED_NUM_40G 40000 322 #define RTE_ETH_SPEED_NUM_50G 50000 323 #define RTE_ETH_SPEED_NUM_56G 56000 324 #define RTE_ETH_SPEED_NUM_100G 100000 325 #define RTE_ETH_SPEED_NUM_200G 200000 326 #define RTE_ETH_SPEED_NUM_UNKNOWN UINT32_MAX 343 #define RTE_ETH_LINK_HALF_DUPLEX 0 344 #define RTE_ETH_LINK_FULL_DUPLEX 1 345 #define RTE_ETH_LINK_DOWN 0 346 #define RTE_ETH_LINK_UP 1 347 #define RTE_ETH_LINK_FIXED 0 348 #define RTE_ETH_LINK_AUTONEG 1 349 #define RTE_ETH_LINK_MAX_STR_LEN 40 356 struct rte_eth_thresh { 365 #define RTE_ETH_MQ_RX_RSS_FLAG RTE_BIT32(0) 366 #define RTE_ETH_MQ_RX_DCB_FLAG RTE_BIT32(1) 367 #define RTE_ETH_MQ_RX_VMDQ_FLAG RTE_BIT32(2) 374 enum rte_eth_rx_mq_mode { 423 uint64_t reserved_64s[2];
424 void *reserved_ptrs[2];
432 RTE_ETH_VLAN_TYPE_UNKNOWN = 0,
435 RTE_ETH_VLAN_TYPE_MAX,
477 #define RTE_ETH_FLOW_UNKNOWN 0 478 #define RTE_ETH_FLOW_RAW 1 479 #define RTE_ETH_FLOW_IPV4 2 480 #define RTE_ETH_FLOW_FRAG_IPV4 3 481 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4 482 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5 483 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6 484 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7 485 #define RTE_ETH_FLOW_IPV6 8 486 #define RTE_ETH_FLOW_FRAG_IPV6 9 487 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10 488 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11 489 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12 490 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13 491 #define RTE_ETH_FLOW_L2_PAYLOAD 14 492 #define RTE_ETH_FLOW_IPV6_EX 15 493 #define RTE_ETH_FLOW_IPV6_TCP_EX 16 494 #define RTE_ETH_FLOW_IPV6_UDP_EX 17 496 #define RTE_ETH_FLOW_PORT 18 497 #define RTE_ETH_FLOW_VXLAN 19 498 #define RTE_ETH_FLOW_GENEVE 20 499 #define RTE_ETH_FLOW_NVGRE 21 500 #define RTE_ETH_FLOW_VXLAN_GPE 22 501 #define RTE_ETH_FLOW_GTPU 23 502 #define RTE_ETH_FLOW_MAX 24 508 #define RTE_ETH_RSS_IPV4 RTE_BIT64(2) 509 #define RTE_ETH_RSS_FRAG_IPV4 RTE_BIT64(3) 510 #define RTE_ETH_RSS_NONFRAG_IPV4_TCP RTE_BIT64(4) 511 #define RTE_ETH_RSS_NONFRAG_IPV4_UDP RTE_BIT64(5) 512 #define RTE_ETH_RSS_NONFRAG_IPV4_SCTP RTE_BIT64(6) 513 #define RTE_ETH_RSS_NONFRAG_IPV4_OTHER RTE_BIT64(7) 514 #define RTE_ETH_RSS_IPV6 RTE_BIT64(8) 515 #define RTE_ETH_RSS_FRAG_IPV6 RTE_BIT64(9) 516 #define RTE_ETH_RSS_NONFRAG_IPV6_TCP RTE_BIT64(10) 517 #define RTE_ETH_RSS_NONFRAG_IPV6_UDP RTE_BIT64(11) 518 #define RTE_ETH_RSS_NONFRAG_IPV6_SCTP RTE_BIT64(12) 519 #define RTE_ETH_RSS_NONFRAG_IPV6_OTHER RTE_BIT64(13) 520 #define RTE_ETH_RSS_L2_PAYLOAD RTE_BIT64(14) 521 #define RTE_ETH_RSS_IPV6_EX RTE_BIT64(15) 522 #define RTE_ETH_RSS_IPV6_TCP_EX RTE_BIT64(16) 523 #define RTE_ETH_RSS_IPV6_UDP_EX RTE_BIT64(17) 524 #define RTE_ETH_RSS_PORT RTE_BIT64(18) 525 #define RTE_ETH_RSS_VXLAN RTE_BIT64(19) 526 #define RTE_ETH_RSS_GENEVE RTE_BIT64(20) 527 #define RTE_ETH_RSS_NVGRE RTE_BIT64(21) 528 #define RTE_ETH_RSS_GTPU RTE_BIT64(23) 529 #define RTE_ETH_RSS_ETH RTE_BIT64(24) 530 #define RTE_ETH_RSS_S_VLAN RTE_BIT64(25) 531 #define RTE_ETH_RSS_C_VLAN RTE_BIT64(26) 532 #define RTE_ETH_RSS_ESP RTE_BIT64(27) 533 #define RTE_ETH_RSS_AH RTE_BIT64(28) 534 #define RTE_ETH_RSS_L2TPV3 RTE_BIT64(29) 535 #define RTE_ETH_RSS_PFCP RTE_BIT64(30) 536 #define RTE_ETH_RSS_PPPOE RTE_BIT64(31) 537 #define RTE_ETH_RSS_ECPRI RTE_BIT64(32) 538 #define RTE_ETH_RSS_MPLS RTE_BIT64(33) 539 #define RTE_ETH_RSS_IPV4_CHKSUM RTE_BIT64(34) 553 #define RTE_ETH_RSS_L4_CHKSUM RTE_BIT64(35) 555 #define RTE_ETH_RSS_L2TPV2 RTE_BIT64(36) 566 #define RTE_ETH_RSS_L3_SRC_ONLY RTE_BIT64(63) 567 #define RTE_ETH_RSS_L3_DST_ONLY RTE_BIT64(62) 568 #define RTE_ETH_RSS_L4_SRC_ONLY RTE_BIT64(61) 569 #define RTE_ETH_RSS_L4_DST_ONLY RTE_BIT64(60) 570 #define RTE_ETH_RSS_L2_SRC_ONLY RTE_BIT64(59) 571 #define RTE_ETH_RSS_L2_DST_ONLY RTE_BIT64(58) 579 #define RTE_ETH_RSS_L3_PRE32 RTE_BIT64(57) 580 #define RTE_ETH_RSS_L3_PRE40 RTE_BIT64(56) 581 #define RTE_ETH_RSS_L3_PRE48 RTE_BIT64(55) 582 #define RTE_ETH_RSS_L3_PRE56 RTE_BIT64(54) 583 #define RTE_ETH_RSS_L3_PRE64 RTE_BIT64(53) 584 #define RTE_ETH_RSS_L3_PRE96 RTE_BIT64(52) 599 #define RTE_ETH_RSS_LEVEL_PMD_DEFAULT (UINT64_C(0) << 50) 605 #define RTE_ETH_RSS_LEVEL_OUTERMOST (UINT64_C(1) << 50) 611 #define RTE_ETH_RSS_LEVEL_INNERMOST (UINT64_C(2) << 50) 612 #define RTE_ETH_RSS_LEVEL_MASK (UINT64_C(3) << 50) 614 #define RTE_ETH_RSS_LEVEL(rss_hf) ((rss_hf & RTE_ETH_RSS_LEVEL_MASK) >> 50) 626 static inline uint64_t
629 if ((rss_hf & RTE_ETH_RSS_L3_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L3_DST_ONLY))
630 rss_hf &= ~(RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY);
632 if ((rss_hf & RTE_ETH_RSS_L4_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L4_DST_ONLY))
633 rss_hf &= ~(RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY);
638 #define RTE_ETH_RSS_IPV6_PRE32 ( \ 640 RTE_ETH_RSS_L3_PRE32) 642 #define RTE_ETH_RSS_IPV6_PRE40 ( \ 644 RTE_ETH_RSS_L3_PRE40) 646 #define RTE_ETH_RSS_IPV6_PRE48 ( \ 648 RTE_ETH_RSS_L3_PRE48) 650 #define RTE_ETH_RSS_IPV6_PRE56 ( \ 652 RTE_ETH_RSS_L3_PRE56) 654 #define RTE_ETH_RSS_IPV6_PRE64 ( \ 656 RTE_ETH_RSS_L3_PRE64) 658 #define RTE_ETH_RSS_IPV6_PRE96 ( \ 660 RTE_ETH_RSS_L3_PRE96) 662 #define RTE_ETH_RSS_IPV6_PRE32_UDP ( \ 663 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 664 RTE_ETH_RSS_L3_PRE32) 666 #define RTE_ETH_RSS_IPV6_PRE40_UDP ( \ 667 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 668 RTE_ETH_RSS_L3_PRE40) 670 #define RTE_ETH_RSS_IPV6_PRE48_UDP ( \ 671 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 672 RTE_ETH_RSS_L3_PRE48) 674 #define RTE_ETH_RSS_IPV6_PRE56_UDP ( \ 675 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 676 RTE_ETH_RSS_L3_PRE56) 678 #define RTE_ETH_RSS_IPV6_PRE64_UDP ( \ 679 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 680 RTE_ETH_RSS_L3_PRE64) 682 #define RTE_ETH_RSS_IPV6_PRE96_UDP ( \ 683 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 684 RTE_ETH_RSS_L3_PRE96) 686 #define RTE_ETH_RSS_IPV6_PRE32_TCP ( \ 687 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 688 RTE_ETH_RSS_L3_PRE32) 690 #define RTE_ETH_RSS_IPV6_PRE40_TCP ( \ 691 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 692 RTE_ETH_RSS_L3_PRE40) 694 #define RTE_ETH_RSS_IPV6_PRE48_TCP ( \ 695 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 696 RTE_ETH_RSS_L3_PRE48) 698 #define RTE_ETH_RSS_IPV6_PRE56_TCP ( \ 699 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 700 RTE_ETH_RSS_L3_PRE56) 702 #define RTE_ETH_RSS_IPV6_PRE64_TCP ( \ 703 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 704 RTE_ETH_RSS_L3_PRE64) 706 #define RTE_ETH_RSS_IPV6_PRE96_TCP ( \ 707 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 708 RTE_ETH_RSS_L3_PRE96) 710 #define RTE_ETH_RSS_IPV6_PRE32_SCTP ( \ 711 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 712 RTE_ETH_RSS_L3_PRE32) 714 #define RTE_ETH_RSS_IPV6_PRE40_SCTP ( \ 715 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 716 RTE_ETH_RSS_L3_PRE40) 718 #define RTE_ETH_RSS_IPV6_PRE48_SCTP ( \ 719 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 720 RTE_ETH_RSS_L3_PRE48) 722 #define RTE_ETH_RSS_IPV6_PRE56_SCTP ( \ 723 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 724 RTE_ETH_RSS_L3_PRE56) 726 #define RTE_ETH_RSS_IPV6_PRE64_SCTP ( \ 727 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 728 RTE_ETH_RSS_L3_PRE64) 730 #define RTE_ETH_RSS_IPV6_PRE96_SCTP ( \ 731 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 732 RTE_ETH_RSS_L3_PRE96) 734 #define RTE_ETH_RSS_IP ( \ 736 RTE_ETH_RSS_FRAG_IPV4 | \ 737 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \ 739 RTE_ETH_RSS_FRAG_IPV6 | \ 740 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \ 743 #define RTE_ETH_RSS_UDP ( \ 744 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \ 745 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 746 RTE_ETH_RSS_IPV6_UDP_EX) 748 #define RTE_ETH_RSS_TCP ( \ 749 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \ 750 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 751 RTE_ETH_RSS_IPV6_TCP_EX) 753 #define RTE_ETH_RSS_SCTP ( \ 754 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \ 755 RTE_ETH_RSS_NONFRAG_IPV6_SCTP) 757 #define RTE_ETH_RSS_TUNNEL ( \ 758 RTE_ETH_RSS_VXLAN | \ 759 RTE_ETH_RSS_GENEVE | \ 762 #define RTE_ETH_RSS_VLAN ( \ 763 RTE_ETH_RSS_S_VLAN | \ 767 #define RTE_ETH_RSS_PROTO_MASK ( \ 769 RTE_ETH_RSS_FRAG_IPV4 | \ 770 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \ 771 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \ 772 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \ 773 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \ 775 RTE_ETH_RSS_FRAG_IPV6 | \ 776 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 777 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 778 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 779 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \ 780 RTE_ETH_RSS_L2_PAYLOAD | \ 781 RTE_ETH_RSS_IPV6_EX | \ 782 RTE_ETH_RSS_IPV6_TCP_EX | \ 783 RTE_ETH_RSS_IPV6_UDP_EX | \ 785 RTE_ETH_RSS_VXLAN | \ 786 RTE_ETH_RSS_GENEVE | \ 787 RTE_ETH_RSS_NVGRE | \ 795 #define RTE_ETH_RSS_RETA_SIZE_64 64 796 #define RTE_ETH_RSS_RETA_SIZE_128 128 797 #define RTE_ETH_RSS_RETA_SIZE_256 256 798 #define RTE_ETH_RSS_RETA_SIZE_512 512 799 #define RTE_ETH_RETA_GROUP_SIZE 64 802 #define RTE_ETH_VMDQ_MAX_VLAN_FILTERS 64 803 #define RTE_ETH_DCB_NUM_USER_PRIORITIES 8 804 #define RTE_ETH_VMDQ_DCB_NUM_QUEUES 128 805 #define RTE_ETH_DCB_NUM_QUEUES 128 809 #define RTE_ETH_DCB_PG_SUPPORT RTE_BIT32(0) 810 #define RTE_ETH_DCB_PFC_SUPPORT RTE_BIT32(1) 814 #define RTE_ETH_VLAN_STRIP_OFFLOAD 0x0001 815 #define RTE_ETH_VLAN_FILTER_OFFLOAD 0x0002 816 #define RTE_ETH_VLAN_EXTEND_OFFLOAD 0x0004 817 #define RTE_ETH_QINQ_STRIP_OFFLOAD 0x0008 819 #define RTE_ETH_VLAN_STRIP_MASK 0x0001 820 #define RTE_ETH_VLAN_FILTER_MASK 0x0002 821 #define RTE_ETH_VLAN_EXTEND_MASK 0x0004 822 #define RTE_ETH_QINQ_STRIP_MASK 0x0008 823 #define RTE_ETH_VLAN_ID_MAX 0x0FFF 827 #define RTE_ETH_NUM_RECEIVE_MAC_ADDR 128 830 #define RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY 128 836 #define RTE_ETH_VMDQ_ACCEPT_UNTAG RTE_BIT32(0) 838 #define RTE_ETH_VMDQ_ACCEPT_HASH_MC RTE_BIT32(1) 840 #define RTE_ETH_VMDQ_ACCEPT_HASH_UC RTE_BIT32(2) 842 #define RTE_ETH_VMDQ_ACCEPT_BROADCAST RTE_BIT32(3) 844 #define RTE_ETH_VMDQ_ACCEPT_MULTICAST RTE_BIT32(4) 857 uint16_t reta[RTE_ETH_RETA_GROUP_SIZE];
881 struct rte_eth_dcb_rx_conf {
887 struct rte_eth_vmdq_dcb_tx_conf {
893 struct rte_eth_dcb_tx_conf {
899 struct rte_eth_vmdq_tx_conf {
973 hw_vlan_reject_tagged : 1,
977 hw_vlan_insert_pvid : 1;
979 uint64_t reserved_64s[2];
980 void *reserved_ptrs[2];
1125 uint16_t rx_nmempool;
1127 uint64_t reserved_64s[2];
1128 void *reserved_ptrs[2];
1148 uint64_t reserved_64s[2];
1149 void *reserved_ptrs[2];
1192 #define RTE_ETH_MAX_HAIRPIN_PEERS 32 1406 RTE_ETH_TUNNEL_TYPE_NONE = 0,
1407 RTE_ETH_TUNNEL_TYPE_VXLAN,
1408 RTE_ETH_TUNNEL_TYPE_GENEVE,
1409 RTE_ETH_TUNNEL_TYPE_TEREDO,
1410 RTE_ETH_TUNNEL_TYPE_NVGRE,
1411 RTE_ETH_TUNNEL_TYPE_IP_IN_GRE,
1412 RTE_ETH_L2_TUNNEL_TYPE_E_TAG,
1413 RTE_ETH_TUNNEL_TYPE_VXLAN_GPE,
1414 RTE_ETH_TUNNEL_TYPE_ECPRI,
1415 RTE_ETH_TUNNEL_TYPE_MAX,
1447 #define rte_intr_conf rte_eth_intr_conf 1474 struct rte_eth_dcb_rx_conf dcb_rx_conf;
1480 struct rte_eth_vmdq_dcb_tx_conf vmdq_dcb_tx_conf;
1482 struct rte_eth_dcb_tx_conf dcb_tx_conf;
1484 struct rte_eth_vmdq_tx_conf vmdq_tx_conf;
1495 #define RTE_ETH_RX_OFFLOAD_VLAN_STRIP RTE_BIT64(0) 1496 #define RTE_ETH_RX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1) 1497 #define RTE_ETH_RX_OFFLOAD_UDP_CKSUM RTE_BIT64(2) 1498 #define RTE_ETH_RX_OFFLOAD_TCP_CKSUM RTE_BIT64(3) 1499 #define RTE_ETH_RX_OFFLOAD_TCP_LRO RTE_BIT64(4) 1500 #define RTE_ETH_RX_OFFLOAD_QINQ_STRIP RTE_BIT64(5) 1501 #define RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(6) 1502 #define RTE_ETH_RX_OFFLOAD_MACSEC_STRIP RTE_BIT64(7) 1503 #define RTE_ETH_RX_OFFLOAD_VLAN_FILTER RTE_BIT64(9) 1504 #define RTE_ETH_RX_OFFLOAD_VLAN_EXTEND RTE_BIT64(10) 1505 #define RTE_ETH_RX_OFFLOAD_SCATTER RTE_BIT64(13) 1511 #define RTE_ETH_RX_OFFLOAD_TIMESTAMP RTE_BIT64(14) 1512 #define RTE_ETH_RX_OFFLOAD_SECURITY RTE_BIT64(15) 1513 #define RTE_ETH_RX_OFFLOAD_KEEP_CRC RTE_BIT64(16) 1514 #define RTE_ETH_RX_OFFLOAD_SCTP_CKSUM RTE_BIT64(17) 1515 #define RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(18) 1516 #define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19) 1517 #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20) 1519 #define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \ 1520 RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \ 1521 RTE_ETH_RX_OFFLOAD_TCP_CKSUM) 1522 #define RTE_ETH_RX_OFFLOAD_VLAN (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \ 1523 RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \ 1524 RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \ 1525 RTE_ETH_RX_OFFLOAD_QINQ_STRIP) 1535 #define RTE_ETH_TX_OFFLOAD_VLAN_INSERT RTE_BIT64(0) 1536 #define RTE_ETH_TX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1) 1537 #define RTE_ETH_TX_OFFLOAD_UDP_CKSUM RTE_BIT64(2) 1538 #define RTE_ETH_TX_OFFLOAD_TCP_CKSUM RTE_BIT64(3) 1539 #define RTE_ETH_TX_OFFLOAD_SCTP_CKSUM RTE_BIT64(4) 1540 #define RTE_ETH_TX_OFFLOAD_TCP_TSO RTE_BIT64(5) 1541 #define RTE_ETH_TX_OFFLOAD_UDP_TSO RTE_BIT64(6) 1542 #define RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(7) 1543 #define RTE_ETH_TX_OFFLOAD_QINQ_INSERT RTE_BIT64(8) 1544 #define RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO RTE_BIT64(9) 1545 #define RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO RTE_BIT64(10) 1546 #define RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO RTE_BIT64(11) 1547 #define RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO RTE_BIT64(12) 1548 #define RTE_ETH_TX_OFFLOAD_MACSEC_INSERT RTE_BIT64(13) 1553 #define RTE_ETH_TX_OFFLOAD_MT_LOCKFREE RTE_BIT64(14) 1555 #define RTE_ETH_TX_OFFLOAD_MULTI_SEGS RTE_BIT64(15) 1561 #define RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE RTE_BIT64(16) 1562 #define RTE_ETH_TX_OFFLOAD_SECURITY RTE_BIT64(17) 1568 #define RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO RTE_BIT64(18) 1574 #define RTE_ETH_TX_OFFLOAD_IP_TNL_TSO RTE_BIT64(19) 1576 #define RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(20) 1582 #define RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP RTE_BIT64(21) 1592 #define RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP RTE_BIT64(0) 1594 #define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP RTE_BIT64(1) 1604 #define RTE_ETH_DEV_CAPA_RXQ_SHARE RTE_BIT64(2) 1606 #define RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP RTE_BIT64(3) 1608 #define RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP RTE_BIT64(4) 1616 #define RTE_ETH_DEV_FALLBACK_RX_RINGSIZE 512 1617 #define RTE_ETH_DEV_FALLBACK_TX_RINGSIZE 512 1618 #define RTE_ETH_DEV_FALLBACK_RX_NBQUEUES 1 1619 #define RTE_ETH_DEV_FALLBACK_TX_NBQUEUES 1 1636 #define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID (UINT16_MAX) 1781 uint64_t reserved_64s[2];
1782 void *reserved_ptrs[2];
1786 #define RTE_ETH_QUEUE_STATE_STOPPED 0 1787 #define RTE_ETH_QUEUE_STATE_STARTED 1 1788 #define RTE_ETH_QUEUE_STATE_HAIRPIN 2 1795 struct rte_eth_rxq_info { 1828 #define RTE_ETH_BURST_FLAG_PER_QUEUE RTE_BIT64(0) 1837 #define RTE_ETH_BURST_MODE_INFO_SIZE 1024 1838 char info[RTE_ETH_BURST_MODE_INFO_SIZE]; 1842 #define RTE_ETH_XSTATS_NAME_SIZE 64 1876 #define RTE_ETH_DCB_NUM_TCS 8 1877 #define RTE_ETH_MAX_VMDQ_POOL 64 1888 } tc_rxq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1893 } tc_txq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1903 uint8_t tc_bws[RTE_ETH_DCB_NUM_TCS];
1920 #define RTE_ETH_FEC_MODE_TO_CAPA(x) RTE_BIT32(x) 1923 #define RTE_ETH_FEC_MODE_CAPA_MASK(x) RTE_BIT32(RTE_ETH_FEC_ ## x) 1926 struct rte_eth_fec_capa {
1931 #define RTE_ETH_ALL RTE_MAX_ETHPORTS 1934 #define RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, retval) do { \ 1935 if (!rte_eth_dev_is_valid_port(port_id)) { \ 1936 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \ 1941 #define RTE_ETH_VALID_PORTID_OR_RET(port_id) do { \ 1942 if (!rte_eth_dev_is_valid_port(port_id)) { \ 1943 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \ 1971 struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts,
1995 struct rte_mbuf *pkts[], uint16_t nb_pkts,
void *user_param);
2009 struct rte_eth_dev_sriov {
2011 uint8_t nb_q_per_pool;
2012 uint16_t def_vmdq_idx;
2013 uint16_t def_pool_q_idx;
2015 #define RTE_ETH_DEV_SRIOV(dev) ((dev)->data->sriov) 2017 #define RTE_ETH_NAME_MAX_LEN RTE_DEV_NAME_MAX_LEN 2019 #define RTE_ETH_DEV_NO_OWNER 0 2021 #define RTE_ETH_MAX_OWNER_NAME_LEN 64 2023 struct rte_eth_dev_owner {
2025 char name[RTE_ETH_MAX_OWNER_NAME_LEN];
2033 #define RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE RTE_BIT32(0) 2035 #define RTE_ETH_DEV_INTR_LSC RTE_BIT32(1) 2037 #define RTE_ETH_DEV_BONDED_SLAVE RTE_BIT32(2) 2039 #define RTE_ETH_DEV_INTR_RMV RTE_BIT32(3) 2041 #define RTE_ETH_DEV_REPRESENTOR RTE_BIT32(4) 2043 #define RTE_ETH_DEV_NOLIVE_MAC_ADDR RTE_BIT32(5) 2048 #define RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS RTE_BIT32(6) 2063 const uint64_t owner_id);
2068 #define RTE_ETH_FOREACH_DEV_OWNED_BY(p, o) \ 2069 for (p = rte_eth_find_next_owned_by(0, o); \ 2070 (unsigned int)p < (unsigned int)RTE_MAX_ETHPORTS; \ 2071 p = rte_eth_find_next_owned_by(p + 1, o)) 2086 #define RTE_ETH_FOREACH_DEV(p) \ 2087 RTE_ETH_FOREACH_DEV_OWNED_BY(p, RTE_ETH_DEV_NO_OWNER) 2102 const struct rte_device *parent);
2112 #define RTE_ETH_FOREACH_DEV_OF(port_id, parent) \ 2113 for (port_id = rte_eth_find_next_of(0, parent); \ 2114 port_id < RTE_MAX_ETHPORTS; \ 2115 port_id = rte_eth_find_next_of(port_id + 1, parent)) 2141 #define RTE_ETH_FOREACH_DEV_SIBLING(port_id, ref_port_id) \ 2142 for (port_id = rte_eth_find_next_sibling(0, ref_port_id); \ 2143 port_id < RTE_MAX_ETHPORTS; \ 2144 port_id = rte_eth_find_next_sibling(port_id + 1, ref_port_id)) 2169 const struct rte_eth_dev_owner *owner);
2182 const uint64_t owner_id);
2205 struct rte_eth_dev_owner *owner);
2316 uint16_t nb_tx_queue,
const struct rte_eth_conf *eth_conf);
2392 uint16_t nb_rx_desc,
unsigned int socket_id,
2425 (uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc,
2477 uint16_t nb_tx_desc,
unsigned int socket_id,
2507 (uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc,
2538 size_t len, uint32_t direction);
3106 uint64_t *values,
unsigned int size);
3163 uint16_t tx_queue_id, uint8_t stat_idx);
3184 uint16_t rx_queue_id,
3310 char *fw_version,
size_t fw_size);
3352 uint32_t *ptypes,
int num);
3384 uint32_t *set_ptypes,
unsigned int num);
3558 uint8_t avail_thresh);
3588 uint8_t *avail_thresh);
3590 typedef void (*buffer_tx_error_fn)(
struct rte_mbuf **unsent, uint16_t count,
3598 buffer_tx_error_fn error_callback;
3599 void *error_userdata;
3612 #define RTE_ETH_TX_BUFFER_SIZE(sz) \ 3613 (sizeof(struct rte_eth_dev_tx_buffer) + (sz) * sizeof(struct rte_mbuf *)) 3654 buffer_tx_error_fn callback,
void *userdata);
4086 int epfd,
int op,
void *data);
4165 struct rte_eth_fec_capa *speed_fec_capa,
4394 uint16_t reta_size);
4416 uint16_t reta_size);
4583 struct rte_eth_rxtx_callback;
4610 const struct rte_eth_rxtx_callback *
4640 const struct rte_eth_rxtx_callback *
4669 const struct rte_eth_rxtx_callback *
4707 const struct rte_eth_rxtx_callback *user_cb);
4743 const struct rte_eth_rxtx_callback *user_cb);
4853 struct rte_power_monitor_cond *pmc);
4970 struct rte_dev_eeprom_info *info);
4993 uint32_t nb_mc_addr);
5042 struct timespec *timestamp, uint32_t flags);
5060 struct timespec *timestamp);
5220 uint16_t *nb_rx_desc,
5221 uint16_t *nb_tx_desc);
5288 char name[RTE_DEV_NAME_MAX_LEN];
5333 #define RTE_ETH_RX_METADATA_USER_FLAG RTE_BIT64(0) 5336 #define RTE_ETH_RX_METADATA_USER_MARK RTE_BIT64(1) 5339 #define RTE_ETH_RX_METADATA_TUNNEL_ID RTE_BIT64(2) 5383 #define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0)) 5385 #define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1)) 5554 uint16_t offset, uint16_t num, FILE *file);
5581 uint16_t offset, uint16_t num, FILE *file);
5646 uint8_t rsvd_obj_params[4];
5661 uint8_t rsvd_mode_params[4];
5772 uint16_t rte_eth_call_rx_callbacks(uint16_t port_id, uint16_t queue_id,
5773 struct rte_mbuf **rx_pkts, uint16_t nb_rx, uint16_t nb_pkts,
5863 static inline uint16_t
5865 struct rte_mbuf **rx_pkts,
const uint16_t nb_pkts)
5868 struct rte_eth_fp_ops *p;
5871 #ifdef RTE_ETHDEV_DEBUG_RX 5872 if (port_id >= RTE_MAX_ETHPORTS ||
5873 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5875 "Invalid port_id=%u or queue_id=%u\n",
5882 p = &rte_eth_fp_ops[port_id];
5883 qd = p->rxq.data[queue_id];
5885 #ifdef RTE_ETHDEV_DEBUG_RX 5886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
5889 RTE_ETHDEV_LOG(ERR,
"Invalid Rx queue_id=%u for port_id=%u\n",
5895 nb_rx = p->rx_pkt_burst(qd, rx_pkts, nb_pkts);
5897 #ifdef RTE_ETHDEV_RXTX_CALLBACKS 5907 cb = __atomic_load_n((
void **)&p->rxq.clbk[queue_id],
5910 nb_rx = rte_eth_call_rx_callbacks(port_id, queue_id,
5911 rx_pkts, nb_rx, nb_pkts, cb);
5915 rte_ethdev_trace_rx_burst(port_id, queue_id, (
void **)rx_pkts, nb_rx);
5939 struct rte_eth_fp_ops *p;
5942 #ifdef RTE_ETHDEV_DEBUG_RX 5943 if (port_id >= RTE_MAX_ETHPORTS ||
5944 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5946 "Invalid port_id=%u or queue_id=%u\n",
5953 p = &rte_eth_fp_ops[port_id];
5954 qd = p->rxq.data[queue_id];
5956 #ifdef RTE_ETHDEV_DEBUG_RX 5957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5962 if (*p->rx_queue_count == NULL)
5964 return (
int)(*p->rx_queue_count)(qd);
5970 #define RTE_ETH_RX_DESC_AVAIL 0 5971 #define RTE_ETH_RX_DESC_DONE 1 5972 #define RTE_ETH_RX_DESC_UNAVAIL 2 6012 struct rte_eth_fp_ops *p;
6015 #ifdef RTE_ETHDEV_DEBUG_RX 6016 if (port_id >= RTE_MAX_ETHPORTS ||
6017 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6019 "Invalid port_id=%u or queue_id=%u\n",
6026 p = &rte_eth_fp_ops[port_id];
6027 qd = p->rxq.data[queue_id];
6029 #ifdef RTE_ETHDEV_DEBUG_RX 6030 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6034 if (*p->rx_descriptor_status == NULL)
6036 return (*p->rx_descriptor_status)(qd, offset);
6042 #define RTE_ETH_TX_DESC_FULL 0 6043 #define RTE_ETH_TX_DESC_DONE 1 6044 #define RTE_ETH_TX_DESC_UNAVAIL 2 6080 static inline int rte_eth_tx_descriptor_status(uint16_t port_id, 6081 uint16_t queue_id, uint16_t offset)
6083 struct rte_eth_fp_ops *p;
6086 #ifdef RTE_ETHDEV_DEBUG_TX 6087 if (port_id >= RTE_MAX_ETHPORTS ||
6088 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6090 "Invalid port_id=%u or queue_id=%u\n",
6097 p = &rte_eth_fp_ops[port_id];
6098 qd = p->txq.data[queue_id];
6100 #ifdef RTE_ETHDEV_DEBUG_TX 6101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6105 if (*p->tx_descriptor_status == NULL)
6107 return (*p->tx_descriptor_status)(qd, offset);
6129 uint16_t rte_eth_call_tx_callbacks(uint16_t port_id, uint16_t queue_id,
6130 struct rte_mbuf **tx_pkts, uint16_t nb_pkts,
void *opaque);
6203 static inline uint16_t
6205 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6207 struct rte_eth_fp_ops *p;
6210 #ifdef RTE_ETHDEV_DEBUG_TX 6211 if (port_id >= RTE_MAX_ETHPORTS ||
6212 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6214 "Invalid port_id=%u or queue_id=%u\n",
6221 p = &rte_eth_fp_ops[port_id];
6222 qd = p->txq.data[queue_id];
6224 #ifdef RTE_ETHDEV_DEBUG_TX 6225 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
6228 RTE_ETHDEV_LOG(ERR,
"Invalid Tx queue_id=%u for port_id=%u\n",
6234 #ifdef RTE_ETHDEV_RXTX_CALLBACKS 6244 cb = __atomic_load_n((
void **)&p->txq.clbk[queue_id],
6247 nb_pkts = rte_eth_call_tx_callbacks(port_id, queue_id,
6248 tx_pkts, nb_pkts, cb);
6252 nb_pkts = p->tx_pkt_burst(qd, tx_pkts, nb_pkts);
6254 rte_ethdev_trace_tx_burst(port_id, queue_id, (
void **)tx_pkts, nb_pkts);
6312 #ifndef RTE_ETHDEV_TX_PREPARE_NOOP 6314 static inline uint16_t
6316 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6318 struct rte_eth_fp_ops *p;
6321 #ifdef RTE_ETHDEV_DEBUG_TX 6322 if (port_id >= RTE_MAX_ETHPORTS ||
6323 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6325 "Invalid port_id=%u or queue_id=%u\n",
6333 p = &rte_eth_fp_ops[port_id];
6334 qd = p->txq.data[queue_id];
6336 #ifdef RTE_ETHDEV_DEBUG_TX 6338 RTE_ETHDEV_LOG(ERR,
"Invalid Tx port_id=%u\n", port_id);
6343 RTE_ETHDEV_LOG(ERR,
"Invalid Tx queue_id=%u for port_id=%u\n",
6350 if (!p->tx_pkt_prepare)
6353 return p->tx_pkt_prepare(qd, tx_pkts, nb_pkts);
6367 static inline uint16_t
6399 static inline uint16_t
6404 uint16_t to_send = buffer->
length;
6415 buffer->error_callback(&buffer->
pkts[sent],
6416 (uint16_t)(to_send - sent),
6417 buffer->error_userdata);
int rte_eth_dev_stop(uint16_t port_id)
int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id, struct rte_eth_pfc_conf *pfc_conf)
int rte_eth_promiscuous_disable(uint16_t port_id)
__extension__ uint32_t multi_pools
int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
__rte_experimental int rte_eth_tx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
#define __rte_always_inline
#define RTE_ETH_DCB_NUM_USER_PRIORITIES
uint16_t rte_eth_dev_count_avail(void)
int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time)
rte_eth_event_macsec_type
const uint32_t * dev_flags
int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time)
uint64_t rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
__rte_experimental int rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)
#define __rte_cache_min_aligned
int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue, uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf)
int rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
static uint16_t rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
struct rte_device * device
const struct rte_eth_rxtx_callback * rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS]
uint16_t rte_eth_find_next(uint16_t port_id)
__rte_experimental int rte_eth_rx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
int rte_eth_led_off(uint16_t port_id)
int rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
static int rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id, uint16_t offset)
uint32_t locked_device_memory
__rte_experimental int rte_eth_dev_hairpin_capability_get(uint16_t port_id, struct rte_eth_hairpin_cap *cap)
int rte_eth_dev_rss_reta_update(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
int rte_eth_dev_rss_hash_update(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
__rte_experimental int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
uint64_t rx_queue_offload_capa
int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats, unsigned int n)
__rte_experimental int rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs)
int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id, int epfd, int op, void *data)
int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
uint64_t tx_queue_offload_capa
uint8_t enable_default_pool
uint32_t max_hash_mac_addrs
int rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
uint16_t rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id)
uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
int rte_eth_dev_get_eeprom_length(uint16_t port_id)
int rte_eth_dev_close(uint16_t port_id)
int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id)
__rte_experimental int rte_eth_rx_avail_thresh_set(uint16_t port_id, uint16_t queue_id, uint8_t avail_thresh)
int rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id, uint8_t stat_idx)
int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_txq_info *qinfo)
int rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
__rte_experimental int rte_eth_dev_get_module_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
uint32_t dcb_capability_en
uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
__rte_experimental int rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)
int rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
int rte_eth_dev_callback_unregister(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
int rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
int rte_eth_dev_set_link_up(uint16_t port_id)
int rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp, uint32_t flags)
int rte_eth_dev_get_vlan_offload(uint16_t port_id)
int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, unsigned int socket_id, const struct rte_eth_txconf *tx_conf)
int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
uint8_t rx_deferred_start
int(* rte_eth_dev_cb_fn)(uint16_t port_id, enum rte_eth_event_type event, void *cb_arg, void *ret_param)
uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
#define RTE_ETH_MQ_RX_RSS_FLAG
uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex)
int rte_eth_dev_owner_set(const uint16_t port_id, const struct rte_eth_dev_owner *owner)
#define RTE_ETH_XSTATS_NAME_SIZE
int rte_eth_dev_rss_hash_conf_get(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
__rte_experimental int rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma, unsigned int num)
int rte_eth_timesync_disable(uint16_t port_id)
int rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *mac_addr)
__rte_experimental int rte_eth_rx_avail_thresh_query(uint16_t port_id, uint16_t *queue_id, uint8_t *avail_thresh)
__rte_experimental int rte_eth_representor_info_get(uint16_t port_id, struct rte_eth_representor_info *info)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id, struct rte_eth_pfc_queue_conf *pfc_queue_conf)
void rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
void * rte_eth_dev_get_sec_ctx(uint16_t port_id)
__rte_experimental int rte_eth_fec_get_capability(uint16_t port_id, struct rte_eth_fec_capa *speed_fec_capa, unsigned int num)
struct rte_mempool ** rx_mempools
int rte_eth_stats_reset(uint16_t port_id)
int rte_eth_allmulticast_enable(uint16_t port_id)
__rte_experimental int rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id, struct rte_power_monitor_cond *pmc)
uint32_t offset_align_log2
int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *set_ptypes, unsigned int num)
void rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
int rte_eth_dev_udp_tunnel_port_add(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
__rte_experimental int rte_eth_buffer_split_get_supported_hdr_ptypes(uint16_t port_id, uint32_t *ptypes, int num)
uint16_t rte_eth_find_next_of(uint16_t port_id_start, const struct rte_device *parent)
int rte_eth_dev_callback_register(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
static uint16_t rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
int rte_eth_allmulticast_disable(uint16_t port_id)
__rte_experimental int rte_eth_dev_get_module_info(uint16_t port_id, struct rte_eth_dev_module_info *modinfo)
int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id, int on)
int rte_eth_dev_start(uint16_t port_id)
__rte_experimental int rte_eth_cman_config_get(uint16_t port_id, struct rte_eth_cman_config *config)
__rte_experimental int rte_eth_ip_reassembly_capability_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *capa)
int rte_eth_dev_reset(uint16_t port_id)
int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids, uint64_t *values, unsigned int size)
#define RTE_ETH_MQ_RX_DCB_FLAG
__rte_experimental int rte_eth_ip_reassembly_conf_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *conf)
int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id)
int rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer, buffer_tx_error_fn callback, void *userdata)
void rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
int rte_eth_dev_is_removed(uint16_t port_id)
uint16_t(* rte_tx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param)
int rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
__rte_experimental int rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
int rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id, uint16_t *nb_rx_desc, uint16_t *nb_tx_desc)
int rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *mac_addr)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id, struct rte_eth_pfc_queue_info *pfc_queue_info)
int rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr, uint32_t pool)
int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
struct rte_mbuf * next_frag
int rte_eth_xstats_reset(uint16_t port_id)
#define RTE_ETH_MQ_RX_VMDQ_FLAG
__rte_experimental int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports, size_t len, uint32_t direction)
int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name, uint64_t *id)
int rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
const struct rte_eth_rxtx_callback * rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id, rte_tx_callback_fn fn, void *user_param)
uint64_t flow_type_rss_offloads
#define RTE_ETH_VMDQ_MAX_VLAN_FILTERS
uint16_t rte_eth_dev_count_total(void)
int rte_eth_promiscuous_enable(uint16_t port_id)
int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
union rte_eth_rxseg * rx_seg
int rte_eth_dev_owner_new(uint64_t *owner_id)
const char * rte_eth_dev_tx_offload_name(uint64_t offload)
__rte_experimental int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link)
int rte_eth_dev_owner_delete(const uint64_t owner_id)
rte_eth_event_macsec_subtype
static __rte_always_inline uint16_t rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
__extension__ uint8_t hw_vlan_reject_untagged
int rte_eth_dev_set_mc_addr_list(uint16_t port_id, struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr)
uint32_t use_locked_device_memory
int rte_eth_dev_get_dcb_info(uint16_t port_id, struct rte_eth_dcb_info *dcb_info)
rte_eth_event_ipsec_subtype
int rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id, uint8_t stat_idx)
int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
__rte_experimental const char * rte_eth_link_speed_to_str(uint32_t link_speed)
static int rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_rxq_info *qinfo)
int rte_eth_dev_socket_id(uint16_t port_id)
int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx, uint32_t tx_rate)
uint8_t enable_default_pool
__extension__ struct rte_eth_link __rte_aligned(8)
int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link)
int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
int rte_eth_dev_set_vlan_ether_type(uint16_t port_id, enum rte_vlan_type vlan_type, uint16_t tag_type)
int rte_eth_xstats_get_names_by_id(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size, uint64_t *ids)
__rte_experimental const char * rte_eth_dev_capability_name(uint64_t capability)
__rte_experimental int rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, const struct rte_eth_hairpin_conf *conf)
static uint64_t rte_eth_rss_hf_refine(uint64_t rss_hf)
__rte_experimental int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
__rte_experimental int rte_eth_ip_reassembly_conf_set(uint16_t port_id, const struct rte_eth_ip_reassembly_params *conf)
int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr, uint8_t on)
__rte_experimental int rte_eth_cman_config_init(uint16_t port_id, struct rte_eth_cman_config *config)
int rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
int rte_eth_dev_rss_reta_query(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
int rte_eth_promiscuous_get(uint16_t port_id)
int rte_eth_led_on(uint16_t port_id)
int rte_eth_timesync_read_tx_timestamp(uint16_t port_id, struct timespec *timestamp)
int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *ptypes, int num)
int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
__rte_experimental int rte_eth_cman_config_set(uint16_t port_id, const struct rte_eth_cman_config *config)
__rte_experimental int rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, const struct rte_eth_hairpin_conf *conf)
uint8_t mac_ctrl_frame_fwd
uint16_t(* rte_rx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts, void *user_param)
int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
uint8_t tx_deferred_start
int rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
uint32_t max_lro_pkt_size
int rte_eth_xstats_get_names(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size)
const struct rte_eth_rxtx_callback * rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
int rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
int rte_eth_allmulticast_get(uint16_t port_id)
int rte_eth_dev_is_valid_port(uint16_t port_id)
int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
uint32_t max_lro_pkt_size
int rte_eth_timesync_enable(uint16_t port_id)
static uint16_t rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
__rte_experimental int rte_eth_cman_info_get(uint16_t port_id, struct rte_eth_cman_info *info)
int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
int rte_eth_dev_set_link_down(uint16_t port_id)
int rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
uint16_t rte_eth_iterator_next(struct rte_dev_iterator *iter)
__rte_experimental int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
const char * rte_eth_dev_rx_offload_name(uint64_t offload)
static uint16_t rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer)
int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id, const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mb_pool)