DPDK  22.07.0
rte_ethdev.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2017 Intel Corporation
3  */
4 
5 #ifndef _RTE_ETHDEV_H_
6 #define _RTE_ETHDEV_H_
7 
148 #ifdef __cplusplus
149 extern "C" {
150 #endif
151 
152 #include <stdint.h>
153 
154 /* Use this macro to check if LRO API is supported */
155 #define RTE_ETHDEV_HAS_LRO_SUPPORT
156 
157 /* Alias RTE_LIBRTE_ETHDEV_DEBUG for backward compatibility. */
158 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
159 #define RTE_ETHDEV_DEBUG_RX
160 #define RTE_ETHDEV_DEBUG_TX
161 #endif
162 
163 #include <rte_compat.h>
164 #include <rte_log.h>
165 #include <rte_interrupts.h>
166 #include <rte_dev.h>
167 #include <rte_devargs.h>
168 #include <rte_bitops.h>
169 #include <rte_errno.h>
170 #include <rte_common.h>
171 #include <rte_config.h>
172 #include <rte_power_intrinsics.h>
173 
174 #include "rte_ethdev_trace_fp.h"
175 #include "rte_dev_info.h"
176 
177 extern int rte_eth_dev_logtype;
178 
179 #define RTE_ETHDEV_LOG(level, ...) \
180  rte_log(RTE_LOG_ ## level, rte_eth_dev_logtype, "" __VA_ARGS__)
181 
182 struct rte_mbuf;
183 
200 int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs);
201 
216 uint16_t rte_eth_iterator_next(struct rte_dev_iterator *iter);
217 
230 void rte_eth_iterator_cleanup(struct rte_dev_iterator *iter);
231 
245 #define RTE_ETH_FOREACH_MATCHING_DEV(id, devargs, iter) \
246  for (rte_eth_iterator_init(iter, devargs), \
247  id = rte_eth_iterator_next(iter); \
248  id != RTE_MAX_ETHPORTS; \
249  id = rte_eth_iterator_next(iter))
250 
260 struct rte_eth_stats {
261  uint64_t ipackets;
262  uint64_t opackets;
263  uint64_t ibytes;
264  uint64_t obytes;
269  uint64_t imissed;
270  uint64_t ierrors;
271  uint64_t oerrors;
272  uint64_t rx_nombuf;
273  /* Queue stats are limited to max 256 queues */
275  uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
277  uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
279  uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
281  uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
283  uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS];
284 };
285 
289 #define RTE_ETH_LINK_SPEED_AUTONEG 0
290 #define RTE_ETH_LINK_SPEED_FIXED RTE_BIT32(0)
291 #define RTE_ETH_LINK_SPEED_10M_HD RTE_BIT32(1)
292 #define RTE_ETH_LINK_SPEED_10M RTE_BIT32(2)
293 #define RTE_ETH_LINK_SPEED_100M_HD RTE_BIT32(3)
294 #define RTE_ETH_LINK_SPEED_100M RTE_BIT32(4)
295 #define RTE_ETH_LINK_SPEED_1G RTE_BIT32(5)
296 #define RTE_ETH_LINK_SPEED_2_5G RTE_BIT32(6)
297 #define RTE_ETH_LINK_SPEED_5G RTE_BIT32(7)
298 #define RTE_ETH_LINK_SPEED_10G RTE_BIT32(8)
299 #define RTE_ETH_LINK_SPEED_20G RTE_BIT32(9)
300 #define RTE_ETH_LINK_SPEED_25G RTE_BIT32(10)
301 #define RTE_ETH_LINK_SPEED_40G RTE_BIT32(11)
302 #define RTE_ETH_LINK_SPEED_50G RTE_BIT32(12)
303 #define RTE_ETH_LINK_SPEED_56G RTE_BIT32(13)
304 #define RTE_ETH_LINK_SPEED_100G RTE_BIT32(14)
305 #define RTE_ETH_LINK_SPEED_200G RTE_BIT32(15)
308 #define ETH_LINK_SPEED_AUTONEG RTE_DEPRECATED(ETH_LINK_SPEED_AUTONEG) RTE_ETH_LINK_SPEED_AUTONEG
309 #define ETH_LINK_SPEED_FIXED RTE_DEPRECATED(ETH_LINK_SPEED_FIXED) RTE_ETH_LINK_SPEED_FIXED
310 #define ETH_LINK_SPEED_10M_HD RTE_DEPRECATED(ETH_LINK_SPEED_10M_HD) RTE_ETH_LINK_SPEED_10M_HD
311 #define ETH_LINK_SPEED_10M RTE_DEPRECATED(ETH_LINK_SPEED_10M) RTE_ETH_LINK_SPEED_10M
312 #define ETH_LINK_SPEED_100M_HD RTE_DEPRECATED(ETH_LINK_SPEED_100M_HD) RTE_ETH_LINK_SPEED_100M_HD
313 #define ETH_LINK_SPEED_100M RTE_DEPRECATED(ETH_LINK_SPEED_100M) RTE_ETH_LINK_SPEED_100M
314 #define ETH_LINK_SPEED_1G RTE_DEPRECATED(ETH_LINK_SPEED_1G) RTE_ETH_LINK_SPEED_1G
315 #define ETH_LINK_SPEED_2_5G RTE_DEPRECATED(ETH_LINK_SPEED_2_5G) RTE_ETH_LINK_SPEED_2_5G
316 #define ETH_LINK_SPEED_5G RTE_DEPRECATED(ETH_LINK_SPEED_5G) RTE_ETH_LINK_SPEED_5G
317 #define ETH_LINK_SPEED_10G RTE_DEPRECATED(ETH_LINK_SPEED_10G) RTE_ETH_LINK_SPEED_10G
318 #define ETH_LINK_SPEED_20G RTE_DEPRECATED(ETH_LINK_SPEED_20G) RTE_ETH_LINK_SPEED_20G
319 #define ETH_LINK_SPEED_25G RTE_DEPRECATED(ETH_LINK_SPEED_25G) RTE_ETH_LINK_SPEED_25G
320 #define ETH_LINK_SPEED_40G RTE_DEPRECATED(ETH_LINK_SPEED_40G) RTE_ETH_LINK_SPEED_40G
321 #define ETH_LINK_SPEED_50G RTE_DEPRECATED(ETH_LINK_SPEED_50G) RTE_ETH_LINK_SPEED_50G
322 #define ETH_LINK_SPEED_56G RTE_DEPRECATED(ETH_LINK_SPEED_56G) RTE_ETH_LINK_SPEED_56G
323 #define ETH_LINK_SPEED_100G RTE_DEPRECATED(ETH_LINK_SPEED_100G) RTE_ETH_LINK_SPEED_100G
324 #define ETH_LINK_SPEED_200G RTE_DEPRECATED(ETH_LINK_SPEED_200G) RTE_ETH_LINK_SPEED_200G
325 
329 #define RTE_ETH_SPEED_NUM_NONE 0
330 #define RTE_ETH_SPEED_NUM_10M 10
331 #define RTE_ETH_SPEED_NUM_100M 100
332 #define RTE_ETH_SPEED_NUM_1G 1000
333 #define RTE_ETH_SPEED_NUM_2_5G 2500
334 #define RTE_ETH_SPEED_NUM_5G 5000
335 #define RTE_ETH_SPEED_NUM_10G 10000
336 #define RTE_ETH_SPEED_NUM_20G 20000
337 #define RTE_ETH_SPEED_NUM_25G 25000
338 #define RTE_ETH_SPEED_NUM_40G 40000
339 #define RTE_ETH_SPEED_NUM_50G 50000
340 #define RTE_ETH_SPEED_NUM_56G 56000
341 #define RTE_ETH_SPEED_NUM_100G 100000
342 #define RTE_ETH_SPEED_NUM_200G 200000
343 #define RTE_ETH_SPEED_NUM_UNKNOWN UINT32_MAX
346 #define ETH_SPEED_NUM_NONE RTE_DEPRECATED(ETH_SPEED_NUM_NONE) RTE_ETH_SPEED_NUM_NONE
347 #define ETH_SPEED_NUM_10M RTE_DEPRECATED(ETH_SPEED_NUM_10M) RTE_ETH_SPEED_NUM_10M
348 #define ETH_SPEED_NUM_100M RTE_DEPRECATED(ETH_SPEED_NUM_100M) RTE_ETH_SPEED_NUM_100M
349 #define ETH_SPEED_NUM_1G RTE_DEPRECATED(ETH_SPEED_NUM_1G) RTE_ETH_SPEED_NUM_1G
350 #define ETH_SPEED_NUM_2_5G RTE_DEPRECATED(ETH_SPEED_NUM_2_5G) RTE_ETH_SPEED_NUM_2_5G
351 #define ETH_SPEED_NUM_5G RTE_DEPRECATED(ETH_SPEED_NUM_5G) RTE_ETH_SPEED_NUM_5G
352 #define ETH_SPEED_NUM_10G RTE_DEPRECATED(ETH_SPEED_NUM_10G) RTE_ETH_SPEED_NUM_10G
353 #define ETH_SPEED_NUM_20G RTE_DEPRECATED(ETH_SPEED_NUM_20G) RTE_ETH_SPEED_NUM_20G
354 #define ETH_SPEED_NUM_25G RTE_DEPRECATED(ETH_SPEED_NUM_25G) RTE_ETH_SPEED_NUM_25G
355 #define ETH_SPEED_NUM_40G RTE_DEPRECATED(ETH_SPEED_NUM_40G) RTE_ETH_SPEED_NUM_40G
356 #define ETH_SPEED_NUM_50G RTE_DEPRECATED(ETH_SPEED_NUM_50G) RTE_ETH_SPEED_NUM_50G
357 #define ETH_SPEED_NUM_56G RTE_DEPRECATED(ETH_SPEED_NUM_56G) RTE_ETH_SPEED_NUM_56G
358 #define ETH_SPEED_NUM_100G RTE_DEPRECATED(ETH_SPEED_NUM_100G) RTE_ETH_SPEED_NUM_100G
359 #define ETH_SPEED_NUM_200G RTE_DEPRECATED(ETH_SPEED_NUM_200G) RTE_ETH_SPEED_NUM_200G
360 #define ETH_SPEED_NUM_UNKNOWN RTE_DEPRECATED(ETH_SPEED_NUM_UNKNOWN) RTE_ETH_SPEED_NUM_UNKNOWN
361 
365 __extension__
366 struct rte_eth_link {
367  uint32_t link_speed;
368  uint16_t link_duplex : 1;
369  uint16_t link_autoneg : 1;
370  uint16_t link_status : 1;
371 } __rte_aligned(8);
376 #define RTE_ETH_LINK_HALF_DUPLEX 0
377 #define RTE_ETH_LINK_FULL_DUPLEX 1
378 #define RTE_ETH_LINK_DOWN 0
379 #define RTE_ETH_LINK_UP 1
380 #define RTE_ETH_LINK_FIXED 0
381 #define RTE_ETH_LINK_AUTONEG 1
382 #define RTE_ETH_LINK_MAX_STR_LEN 40
385 #define ETH_LINK_HALF_DUPLEX RTE_DEPRECATED(ETH_LINK_HALF_DUPLEX) RTE_ETH_LINK_HALF_DUPLEX
386 #define ETH_LINK_FULL_DUPLEX RTE_DEPRECATED(ETH_LINK_FULL_DUPLEX) RTE_ETH_LINK_FULL_DUPLEX
387 #define ETH_LINK_DOWN RTE_DEPRECATED(ETH_LINK_DOWN) RTE_ETH_LINK_DOWN
388 #define ETH_LINK_UP RTE_DEPRECATED(ETH_LINK_UP) RTE_ETH_LINK_UP
389 #define ETH_LINK_FIXED RTE_DEPRECATED(ETH_LINK_FIXED) RTE_ETH_LINK_FIXED
390 #define ETH_LINK_AUTONEG RTE_DEPRECATED(ETH_LINK_AUTONEG) RTE_ETH_LINK_AUTONEG
391 
396 struct rte_eth_thresh {
397  uint8_t pthresh;
398  uint8_t hthresh;
399  uint8_t wthresh;
400 };
401 
405 #define RTE_ETH_MQ_RX_RSS_FLAG RTE_BIT32(0)
406 #define RTE_ETH_MQ_RX_DCB_FLAG RTE_BIT32(1)
407 #define RTE_ETH_MQ_RX_VMDQ_FLAG RTE_BIT32(2)
410 #define ETH_MQ_RX_RSS_FLAG RTE_DEPRECATED(ETH_MQ_RX_RSS_FLAG) RTE_ETH_MQ_RX_RSS_FLAG
411 #define ETH_MQ_RX_DCB_FLAG RTE_DEPRECATED(ETH_MQ_RX_DCB_FLAG) RTE_ETH_MQ_RX_DCB_FLAG
412 #define ETH_MQ_RX_VMDQ_FLAG RTE_DEPRECATED(ETH_MQ_RX_VMDQ_FLAG) RTE_ETH_MQ_RX_VMDQ_FLAG
413 
418 enum rte_eth_rx_mq_mode {
420  RTE_ETH_MQ_RX_NONE = 0,
421 
423  RTE_ETH_MQ_RX_RSS = RTE_ETH_MQ_RX_RSS_FLAG,
425  RTE_ETH_MQ_RX_DCB = RTE_ETH_MQ_RX_DCB_FLAG,
427  RTE_ETH_MQ_RX_DCB_RSS = RTE_ETH_MQ_RX_RSS_FLAG | RTE_ETH_MQ_RX_DCB_FLAG,
428 
430  RTE_ETH_MQ_RX_VMDQ_ONLY = RTE_ETH_MQ_RX_VMDQ_FLAG,
432  RTE_ETH_MQ_RX_VMDQ_RSS = RTE_ETH_MQ_RX_RSS_FLAG | RTE_ETH_MQ_RX_VMDQ_FLAG,
434  RTE_ETH_MQ_RX_VMDQ_DCB = RTE_ETH_MQ_RX_VMDQ_FLAG | RTE_ETH_MQ_RX_DCB_FLAG,
436  RTE_ETH_MQ_RX_VMDQ_DCB_RSS = RTE_ETH_MQ_RX_RSS_FLAG | RTE_ETH_MQ_RX_DCB_FLAG |
437  RTE_ETH_MQ_RX_VMDQ_FLAG,
438 };
439 
440 #define ETH_MQ_RX_NONE RTE_DEPRECATED(ETH_MQ_RX_NONE) RTE_ETH_MQ_RX_NONE
441 #define ETH_MQ_RX_RSS RTE_DEPRECATED(ETH_MQ_RX_RSS) RTE_ETH_MQ_RX_RSS
442 #define ETH_MQ_RX_DCB RTE_DEPRECATED(ETH_MQ_RX_DCB) RTE_ETH_MQ_RX_DCB
443 #define ETH_MQ_RX_DCB_RSS RTE_DEPRECATED(ETH_MQ_RX_DCB_RSS) RTE_ETH_MQ_RX_DCB_RSS
444 #define ETH_MQ_RX_VMDQ_ONLY RTE_DEPRECATED(ETH_MQ_RX_VMDQ_ONLY) RTE_ETH_MQ_RX_VMDQ_ONLY
445 #define ETH_MQ_RX_VMDQ_RSS RTE_DEPRECATED(ETH_MQ_RX_VMDQ_RSS) RTE_ETH_MQ_RX_VMDQ_RSS
446 #define ETH_MQ_RX_VMDQ_DCB RTE_DEPRECATED(ETH_MQ_RX_VMDQ_DCB) RTE_ETH_MQ_RX_VMDQ_DCB
447 #define ETH_MQ_RX_VMDQ_DCB_RSS RTE_DEPRECATED(ETH_MQ_RX_VMDQ_DCB_RSS) RTE_ETH_MQ_RX_VMDQ_DCB_RSS
448 
453 enum rte_eth_tx_mq_mode {
454  RTE_ETH_MQ_TX_NONE = 0,
455  RTE_ETH_MQ_TX_DCB,
456  RTE_ETH_MQ_TX_VMDQ_DCB,
457  RTE_ETH_MQ_TX_VMDQ_ONLY,
458 };
459 
460 #define ETH_MQ_TX_NONE RTE_DEPRECATED(ETH_MQ_TX_NONE) RTE_ETH_MQ_TX_NONE
461 #define ETH_MQ_TX_DCB RTE_DEPRECATED(ETH_MQ_TX_DCB) RTE_ETH_MQ_TX_DCB
462 #define ETH_MQ_TX_VMDQ_DCB RTE_DEPRECATED(ETH_MQ_TX_VMDQ_DCB) RTE_ETH_MQ_TX_VMDQ_DCB
463 #define ETH_MQ_TX_VMDQ_ONLY RTE_DEPRECATED(ETH_MQ_TX_VMDQ_ONLY) RTE_ETH_MQ_TX_VMDQ_ONLY
464 
468 struct rte_eth_rxmode {
470  enum rte_eth_rx_mq_mode mq_mode;
471  uint32_t mtu;
473  uint32_t max_lro_pkt_size;
474  uint16_t split_hdr_size;
480  uint64_t offloads;
481 
482  uint64_t reserved_64s[2];
483  void *reserved_ptrs[2];
484 };
485 
490 enum rte_vlan_type {
491  RTE_ETH_VLAN_TYPE_UNKNOWN = 0,
492  RTE_ETH_VLAN_TYPE_INNER,
493  RTE_ETH_VLAN_TYPE_OUTER,
494  RTE_ETH_VLAN_TYPE_MAX,
495 };
496 
497 #define ETH_VLAN_TYPE_UNKNOWN RTE_DEPRECATED(ETH_VLAN_TYPE_UNKNOWN) RTE_ETH_VLAN_TYPE_UNKNOWN
498 #define ETH_VLAN_TYPE_INNER RTE_DEPRECATED(ETH_VLAN_TYPE_INNER) RTE_ETH_VLAN_TYPE_INNER
499 #define ETH_VLAN_TYPE_OUTER RTE_DEPRECATED(ETH_VLAN_TYPE_OUTER) RTE_ETH_VLAN_TYPE_OUTER
500 #define ETH_VLAN_TYPE_MAX RTE_DEPRECATED(ETH_VLAN_TYPE_MAX) RTE_ETH_VLAN_TYPE_MAX
501 
506 struct rte_vlan_filter_conf {
507  uint64_t ids[64];
508 };
509 
527 struct rte_eth_rss_conf {
528  uint8_t *rss_key;
529  uint8_t rss_key_len;
530  uint64_t rss_hf;
531 };
532 
533 /*
534  * A packet can be identified by hardware as different flow types. Different
535  * NIC hardware may support different flow types.
536  * Basically, the NIC hardware identifies the flow type as deep protocol as
537  * possible, and exclusively. For example, if a packet is identified as
538  * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
539  * though it is an actual IPV4 packet.
540  */
541 #define RTE_ETH_FLOW_UNKNOWN 0
542 #define RTE_ETH_FLOW_RAW 1
543 #define RTE_ETH_FLOW_IPV4 2
544 #define RTE_ETH_FLOW_FRAG_IPV4 3
545 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4
546 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5
547 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6
548 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7
549 #define RTE_ETH_FLOW_IPV6 8
550 #define RTE_ETH_FLOW_FRAG_IPV6 9
551 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10
552 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11
553 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12
554 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
555 #define RTE_ETH_FLOW_L2_PAYLOAD 14
556 #define RTE_ETH_FLOW_IPV6_EX 15
557 #define RTE_ETH_FLOW_IPV6_TCP_EX 16
558 #define RTE_ETH_FLOW_IPV6_UDP_EX 17
559 
560 #define RTE_ETH_FLOW_PORT 18
561 #define RTE_ETH_FLOW_VXLAN 19
562 #define RTE_ETH_FLOW_GENEVE 20
563 #define RTE_ETH_FLOW_NVGRE 21
564 #define RTE_ETH_FLOW_VXLAN_GPE 22
565 #define RTE_ETH_FLOW_GTPU 23
566 #define RTE_ETH_FLOW_MAX 24
567 
568 /*
569  * Below macros are defined for RSS offload types, they can be used to
570  * fill rte_eth_rss_conf.rss_hf or rte_flow_action_rss.types.
571  */
572 #define RTE_ETH_RSS_IPV4 RTE_BIT64(2)
573 #define RTE_ETH_RSS_FRAG_IPV4 RTE_BIT64(3)
574 #define RTE_ETH_RSS_NONFRAG_IPV4_TCP RTE_BIT64(4)
575 #define RTE_ETH_RSS_NONFRAG_IPV4_UDP RTE_BIT64(5)
576 #define RTE_ETH_RSS_NONFRAG_IPV4_SCTP RTE_BIT64(6)
577 #define RTE_ETH_RSS_NONFRAG_IPV4_OTHER RTE_BIT64(7)
578 #define RTE_ETH_RSS_IPV6 RTE_BIT64(8)
579 #define RTE_ETH_RSS_FRAG_IPV6 RTE_BIT64(9)
580 #define RTE_ETH_RSS_NONFRAG_IPV6_TCP RTE_BIT64(10)
581 #define RTE_ETH_RSS_NONFRAG_IPV6_UDP RTE_BIT64(11)
582 #define RTE_ETH_RSS_NONFRAG_IPV6_SCTP RTE_BIT64(12)
583 #define RTE_ETH_RSS_NONFRAG_IPV6_OTHER RTE_BIT64(13)
584 #define RTE_ETH_RSS_L2_PAYLOAD RTE_BIT64(14)
585 #define RTE_ETH_RSS_IPV6_EX RTE_BIT64(15)
586 #define RTE_ETH_RSS_IPV6_TCP_EX RTE_BIT64(16)
587 #define RTE_ETH_RSS_IPV6_UDP_EX RTE_BIT64(17)
588 #define RTE_ETH_RSS_PORT RTE_BIT64(18)
589 #define RTE_ETH_RSS_VXLAN RTE_BIT64(19)
590 #define RTE_ETH_RSS_GENEVE RTE_BIT64(20)
591 #define RTE_ETH_RSS_NVGRE RTE_BIT64(21)
592 #define RTE_ETH_RSS_GTPU RTE_BIT64(23)
593 #define RTE_ETH_RSS_ETH RTE_BIT64(24)
594 #define RTE_ETH_RSS_S_VLAN RTE_BIT64(25)
595 #define RTE_ETH_RSS_C_VLAN RTE_BIT64(26)
596 #define RTE_ETH_RSS_ESP RTE_BIT64(27)
597 #define RTE_ETH_RSS_AH RTE_BIT64(28)
598 #define RTE_ETH_RSS_L2TPV3 RTE_BIT64(29)
599 #define RTE_ETH_RSS_PFCP RTE_BIT64(30)
600 #define RTE_ETH_RSS_PPPOE RTE_BIT64(31)
601 #define RTE_ETH_RSS_ECPRI RTE_BIT64(32)
602 #define RTE_ETH_RSS_MPLS RTE_BIT64(33)
603 #define RTE_ETH_RSS_IPV4_CHKSUM RTE_BIT64(34)
604 
605 #define ETH_RSS_IPV4 RTE_DEPRECATED(ETH_RSS_IPV4) RTE_ETH_RSS_IPV4
606 #define ETH_RSS_FRAG_IPV4 RTE_DEPRECATED(ETH_RSS_FRAG_IPV4) RTE_ETH_RSS_FRAG_IPV4
607 #define ETH_RSS_NONFRAG_IPV4_TCP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV4_TCP) RTE_ETH_RSS_NONFRAG_IPV4_TCP
608 #define ETH_RSS_NONFRAG_IPV4_UDP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV4_UDP) RTE_ETH_RSS_NONFRAG_IPV4_UDP
609 #define ETH_RSS_NONFRAG_IPV4_SCTP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV4_SCTP) RTE_ETH_RSS_NONFRAG_IPV4_SCTP
610 #define ETH_RSS_NONFRAG_IPV4_OTHER RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV4_OTHER) RTE_ETH_RSS_NONFRAG_IPV4_OTHER
611 #define ETH_RSS_IPV6 RTE_DEPRECATED(ETH_RSS_IPV6) RTE_ETH_RSS_IPV6
612 #define ETH_RSS_FRAG_IPV6 RTE_DEPRECATED(ETH_RSS_FRAG_IPV6) RTE_ETH_RSS_FRAG_IPV6
613 #define ETH_RSS_NONFRAG_IPV6_TCP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV6_TCP) RTE_ETH_RSS_NONFRAG_IPV6_TCP
614 #define ETH_RSS_NONFRAG_IPV6_UDP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV6_UDP) RTE_ETH_RSS_NONFRAG_IPV6_UDP
615 #define ETH_RSS_NONFRAG_IPV6_SCTP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV6_SCTP) RTE_ETH_RSS_NONFRAG_IPV6_SCTP
616 #define ETH_RSS_NONFRAG_IPV6_OTHER RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV6_OTHER) RTE_ETH_RSS_NONFRAG_IPV6_OTHER
617 #define ETH_RSS_L2_PAYLOAD RTE_DEPRECATED(ETH_RSS_L2_PAYLOAD) RTE_ETH_RSS_L2_PAYLOAD
618 #define ETH_RSS_IPV6_EX RTE_DEPRECATED(ETH_RSS_IPV6_EX) RTE_ETH_RSS_IPV6_EX
619 #define ETH_RSS_IPV6_TCP_EX RTE_DEPRECATED(ETH_RSS_IPV6_TCP_EX) RTE_ETH_RSS_IPV6_TCP_EX
620 #define ETH_RSS_IPV6_UDP_EX RTE_DEPRECATED(ETH_RSS_IPV6_UDP_EX) RTE_ETH_RSS_IPV6_UDP_EX
621 #define ETH_RSS_PORT RTE_DEPRECATED(ETH_RSS_PORT) RTE_ETH_RSS_PORT
622 #define ETH_RSS_VXLAN RTE_DEPRECATED(ETH_RSS_VXLAN) RTE_ETH_RSS_VXLAN
623 #define ETH_RSS_GENEVE RTE_DEPRECATED(ETH_RSS_GENEVE) RTE_ETH_RSS_GENEVE
624 #define ETH_RSS_NVGRE RTE_DEPRECATED(ETH_RSS_NVGRE) RTE_ETH_RSS_NVGRE
625 #define ETH_RSS_GTPU RTE_DEPRECATED(ETH_RSS_GTPU) RTE_ETH_RSS_GTPU
626 #define ETH_RSS_ETH RTE_DEPRECATED(ETH_RSS_ETH) RTE_ETH_RSS_ETH
627 #define ETH_RSS_S_VLAN RTE_DEPRECATED(ETH_RSS_S_VLAN) RTE_ETH_RSS_S_VLAN
628 #define ETH_RSS_C_VLAN RTE_DEPRECATED(ETH_RSS_C_VLAN) RTE_ETH_RSS_C_VLAN
629 #define ETH_RSS_ESP RTE_DEPRECATED(ETH_RSS_ESP) RTE_ETH_RSS_ESP
630 #define ETH_RSS_AH RTE_DEPRECATED(ETH_RSS_AH) RTE_ETH_RSS_AH
631 #define ETH_RSS_L2TPV3 RTE_DEPRECATED(ETH_RSS_L2TPV3) RTE_ETH_RSS_L2TPV3
632 #define ETH_RSS_PFCP RTE_DEPRECATED(ETH_RSS_PFCP) RTE_ETH_RSS_PFCP
633 #define ETH_RSS_PPPOE RTE_DEPRECATED(ETH_RSS_PPPOE) RTE_ETH_RSS_PPPOE
634 #define ETH_RSS_ECPRI RTE_DEPRECATED(ETH_RSS_ECPRI) RTE_ETH_RSS_ECPRI
635 #define ETH_RSS_MPLS RTE_DEPRECATED(ETH_RSS_MPLS) RTE_ETH_RSS_MPLS
636 #define ETH_RSS_IPV4_CHKSUM RTE_DEPRECATED(ETH_RSS_IPV4_CHKSUM) RTE_ETH_RSS_IPV4_CHKSUM
637 
650 #define RTE_ETH_RSS_L4_CHKSUM RTE_BIT64(35)
651 #define ETH_RSS_L4_CHKSUM RTE_DEPRECATED(ETH_RSS_L4_CHKSUM) RTE_ETH_RSS_L4_CHKSUM
652 
653 #define RTE_ETH_RSS_L2TPV2 RTE_BIT64(36)
654 
655 /*
656  * We use the following macros to combine with above RTE_ETH_RSS_* for
657  * more specific input set selection. These bits are defined starting
658  * from the high end of the 64 bits.
659  * Note: If we use above RTE_ETH_RSS_* without SRC/DST_ONLY, it represents
660  * both SRC and DST are taken into account. If SRC_ONLY and DST_ONLY of
661  * the same level are used simultaneously, it is the same case as none of
662  * them are added.
663  */
664 #define RTE_ETH_RSS_L3_SRC_ONLY RTE_BIT64(63)
665 #define RTE_ETH_RSS_L3_DST_ONLY RTE_BIT64(62)
666 #define RTE_ETH_RSS_L4_SRC_ONLY RTE_BIT64(61)
667 #define RTE_ETH_RSS_L4_DST_ONLY RTE_BIT64(60)
668 #define RTE_ETH_RSS_L2_SRC_ONLY RTE_BIT64(59)
669 #define RTE_ETH_RSS_L2_DST_ONLY RTE_BIT64(58)
670 
671 #define ETH_RSS_L3_SRC_ONLY RTE_DEPRECATED(ETH_RSS_L3_SRC_ONLY) RTE_ETH_RSS_L3_SRC_ONLY
672 #define ETH_RSS_L3_DST_ONLY RTE_DEPRECATED(ETH_RSS_L3_DST_ONLY) RTE_ETH_RSS_L3_DST_ONLY
673 #define ETH_RSS_L4_SRC_ONLY RTE_DEPRECATED(ETH_RSS_L4_SRC_ONLY) RTE_ETH_RSS_L4_SRC_ONLY
674 #define ETH_RSS_L4_DST_ONLY RTE_DEPRECATED(ETH_RSS_L4_DST_ONLY) RTE_ETH_RSS_L4_DST_ONLY
675 #define ETH_RSS_L2_SRC_ONLY RTE_DEPRECATED(ETH_RSS_L2_SRC_ONLY) RTE_ETH_RSS_L2_SRC_ONLY
676 #define ETH_RSS_L2_DST_ONLY RTE_DEPRECATED(ETH_RSS_L2_DST_ONLY) RTE_ETH_RSS_L2_DST_ONLY
677 
678 /*
679  * Only select IPV6 address prefix as RSS input set according to
680  * https://tools.ietf.org/html/rfc6052
681  * Must be combined with RTE_ETH_RSS_IPV6, RTE_ETH_RSS_NONFRAG_IPV6_UDP,
682  * RTE_ETH_RSS_NONFRAG_IPV6_TCP, RTE_ETH_RSS_NONFRAG_IPV6_SCTP.
683  */
684 #define RTE_ETH_RSS_L3_PRE32 RTE_BIT64(57)
685 #define RTE_ETH_RSS_L3_PRE40 RTE_BIT64(56)
686 #define RTE_ETH_RSS_L3_PRE48 RTE_BIT64(55)
687 #define RTE_ETH_RSS_L3_PRE56 RTE_BIT64(54)
688 #define RTE_ETH_RSS_L3_PRE64 RTE_BIT64(53)
689 #define RTE_ETH_RSS_L3_PRE96 RTE_BIT64(52)
690 
691 /*
692  * Use the following macros to combine with the above layers
693  * to choose inner and outer layers or both for RSS computation.
694  * Bits 50 and 51 are reserved for this.
695  */
696 
704 #define RTE_ETH_RSS_LEVEL_PMD_DEFAULT (UINT64_C(0) << 50)
705 #define ETH_RSS_LEVEL_PMD_DEFAULT RTE_DEPRECATED(ETH_RSS_LEVEL_PMD_DEFAULT) RTE_ETH_RSS_LEVEL_PMD_DEFAULT
706 
711 #define RTE_ETH_RSS_LEVEL_OUTERMOST (UINT64_C(1) << 50)
712 #define ETH_RSS_LEVEL_OUTERMOST RTE_DEPRECATED(ETH_RSS_LEVEL_OUTERMOST) RTE_ETH_RSS_LEVEL_OUTERMOST
713 
718 #define RTE_ETH_RSS_LEVEL_INNERMOST (UINT64_C(2) << 50)
719 #define RTE_ETH_RSS_LEVEL_MASK (UINT64_C(3) << 50)
720 
721 #define ETH_RSS_LEVEL_INNERMOST RTE_DEPRECATED(ETH_RSS_LEVEL_INNERMOST) RTE_ETH_RSS_LEVEL_INNERMOST
722 #define ETH_RSS_LEVEL_MASK RTE_DEPRECATED(ETH_RSS_LEVEL_MASK) RTE_ETH_RSS_LEVEL_MASK
723 
724 #define RTE_ETH_RSS_LEVEL(rss_hf) ((rss_hf & RTE_ETH_RSS_LEVEL_MASK) >> 50)
725 #define ETH_RSS_LEVEL(rss_hf) RTE_DEPRECATED(ETH_RSS_LEVEL(rss_hf)) RTE_ETH_RSS_LEVEL(rss_hf)
726 
737 static inline uint64_t
738 rte_eth_rss_hf_refine(uint64_t rss_hf)
739 {
740  if ((rss_hf & RTE_ETH_RSS_L3_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L3_DST_ONLY))
741  rss_hf &= ~(RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY);
742 
743  if ((rss_hf & RTE_ETH_RSS_L4_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L4_DST_ONLY))
744  rss_hf &= ~(RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY);
745 
746  return rss_hf;
747 }
748 
749 #define RTE_ETH_RSS_IPV6_PRE32 ( \
750  RTE_ETH_RSS_IPV6 | \
751  RTE_ETH_RSS_L3_PRE32)
752 #define ETH_RSS_IPV6_PRE32 RTE_DEPRECATED(ETH_RSS_IPV6_PRE32) RTE_ETH_RSS_IPV6_PRE32
753 
754 #define RTE_ETH_RSS_IPV6_PRE40 ( \
755  RTE_ETH_RSS_IPV6 | \
756  RTE_ETH_RSS_L3_PRE40)
757 #define ETH_RSS_IPV6_PRE40 RTE_DEPRECATED(ETH_RSS_IPV6_PRE40) RTE_ETH_RSS_IPV6_PRE40
758 
759 #define RTE_ETH_RSS_IPV6_PRE48 ( \
760  RTE_ETH_RSS_IPV6 | \
761  RTE_ETH_RSS_L3_PRE48)
762 #define ETH_RSS_IPV6_PRE48 RTE_DEPRECATED(ETH_RSS_IPV6_PRE48) RTE_ETH_RSS_IPV6_PRE48
763 
764 #define RTE_ETH_RSS_IPV6_PRE56 ( \
765  RTE_ETH_RSS_IPV6 | \
766  RTE_ETH_RSS_L3_PRE56)
767 #define ETH_RSS_IPV6_PRE56 RTE_DEPRECATED(ETH_RSS_IPV6_PRE56) RTE_ETH_RSS_IPV6_PRE56
768 
769 #define RTE_ETH_RSS_IPV6_PRE64 ( \
770  RTE_ETH_RSS_IPV6 | \
771  RTE_ETH_RSS_L3_PRE64)
772 #define ETH_RSS_IPV6_PRE64 RTE_DEPRECATED(ETH_RSS_IPV6_PRE64) RTE_ETH_RSS_IPV6_PRE64
773 
774 #define RTE_ETH_RSS_IPV6_PRE96 ( \
775  RTE_ETH_RSS_IPV6 | \
776  RTE_ETH_RSS_L3_PRE96)
777 #define ETH_RSS_IPV6_PRE96 RTE_DEPRECATED(ETH_RSS_IPV6_PRE96) RTE_ETH_RSS_IPV6_PRE96
778 
779 #define RTE_ETH_RSS_IPV6_PRE32_UDP ( \
780  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
781  RTE_ETH_RSS_L3_PRE32)
782 #define ETH_RSS_IPV6_PRE32_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE32_UDP) RTE_ETH_RSS_IPV6_PRE32_UDP
783 
784 #define RTE_ETH_RSS_IPV6_PRE40_UDP ( \
785  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
786  RTE_ETH_RSS_L3_PRE40)
787 #define ETH_RSS_IPV6_PRE40_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE40_UDP) RTE_ETH_RSS_IPV6_PRE40_UDP
788 
789 #define RTE_ETH_RSS_IPV6_PRE48_UDP ( \
790  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
791  RTE_ETH_RSS_L3_PRE48)
792 #define ETH_RSS_IPV6_PRE48_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE48_UDP) RTE_ETH_RSS_IPV6_PRE48_UDP
793 
794 #define RTE_ETH_RSS_IPV6_PRE56_UDP ( \
795  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
796  RTE_ETH_RSS_L3_PRE56)
797 #define ETH_RSS_IPV6_PRE56_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE56_UDP) RTE_ETH_RSS_IPV6_PRE56_UDP
798 
799 #define RTE_ETH_RSS_IPV6_PRE64_UDP ( \
800  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
801  RTE_ETH_RSS_L3_PRE64)
802 #define ETH_RSS_IPV6_PRE64_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE64_UDP) RTE_ETH_RSS_IPV6_PRE64_UDP
803 
804 #define RTE_ETH_RSS_IPV6_PRE96_UDP ( \
805  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
806  RTE_ETH_RSS_L3_PRE96)
807 #define ETH_RSS_IPV6_PRE96_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE96_UDP) RTE_ETH_RSS_IPV6_PRE96_UDP
808 
809 #define RTE_ETH_RSS_IPV6_PRE32_TCP ( \
810  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
811  RTE_ETH_RSS_L3_PRE32)
812 #define ETH_RSS_IPV6_PRE32_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE32_TCP) RTE_ETH_RSS_IPV6_PRE32_TCP
813 
814 #define RTE_ETH_RSS_IPV6_PRE40_TCP ( \
815  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
816  RTE_ETH_RSS_L3_PRE40)
817 #define ETH_RSS_IPV6_PRE40_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE40_TCP) RTE_ETH_RSS_IPV6_PRE40_TCP
818 
819 #define RTE_ETH_RSS_IPV6_PRE48_TCP ( \
820  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
821  RTE_ETH_RSS_L3_PRE48)
822 #define ETH_RSS_IPV6_PRE48_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE48_TCP) RTE_ETH_RSS_IPV6_PRE48_TCP
823 
824 #define RTE_ETH_RSS_IPV6_PRE56_TCP ( \
825  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
826  RTE_ETH_RSS_L3_PRE56)
827 #define ETH_RSS_IPV6_PRE56_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE56_TCP) RTE_ETH_RSS_IPV6_PRE56_TCP
828 
829 #define RTE_ETH_RSS_IPV6_PRE64_TCP ( \
830  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
831  RTE_ETH_RSS_L3_PRE64)
832 #define ETH_RSS_IPV6_PRE64_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE64_TCP) RTE_ETH_RSS_IPV6_PRE64_TCP
833 
834 #define RTE_ETH_RSS_IPV6_PRE96_TCP ( \
835  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
836  RTE_ETH_RSS_L3_PRE96)
837 #define ETH_RSS_IPV6_PRE96_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE96_TCP) RTE_ETH_RSS_IPV6_PRE96_TCP
838 
839 #define RTE_ETH_RSS_IPV6_PRE32_SCTP ( \
840  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
841  RTE_ETH_RSS_L3_PRE32)
842 #define ETH_RSS_IPV6_PRE32_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE32_SCTP) RTE_ETH_RSS_IPV6_PRE32_SCTP
843 
844 #define RTE_ETH_RSS_IPV6_PRE40_SCTP ( \
845  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
846  RTE_ETH_RSS_L3_PRE40)
847 #define ETH_RSS_IPV6_PRE40_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE40_SCTP) RTE_ETH_RSS_IPV6_PRE40_SCTP
848 
849 #define RTE_ETH_RSS_IPV6_PRE48_SCTP ( \
850  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
851  RTE_ETH_RSS_L3_PRE48)
852 #define ETH_RSS_IPV6_PRE48_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE48_SCTP) RTE_ETH_RSS_IPV6_PRE48_SCTP
853 
854 #define RTE_ETH_RSS_IPV6_PRE56_SCTP ( \
855  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
856  RTE_ETH_RSS_L3_PRE56)
857 #define ETH_RSS_IPV6_PRE56_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE56_SCTP) RTE_ETH_RSS_IPV6_PRE56_SCTP
858 
859 #define RTE_ETH_RSS_IPV6_PRE64_SCTP ( \
860  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
861  RTE_ETH_RSS_L3_PRE64)
862 #define ETH_RSS_IPV6_PRE64_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE64_SCTP) RTE_ETH_RSS_IPV6_PRE64_SCTP
863 
864 #define RTE_ETH_RSS_IPV6_PRE96_SCTP ( \
865  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
866  RTE_ETH_RSS_L3_PRE96)
867 #define ETH_RSS_IPV6_PRE96_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE96_SCTP) RTE_ETH_RSS_IPV6_PRE96_SCTP
868 
869 #define RTE_ETH_RSS_IP ( \
870  RTE_ETH_RSS_IPV4 | \
871  RTE_ETH_RSS_FRAG_IPV4 | \
872  RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
873  RTE_ETH_RSS_IPV6 | \
874  RTE_ETH_RSS_FRAG_IPV6 | \
875  RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
876  RTE_ETH_RSS_IPV6_EX)
877 #define ETH_RSS_IP RTE_DEPRECATED(ETH_RSS_IP) RTE_ETH_RSS_IP
878 
879 #define RTE_ETH_RSS_UDP ( \
880  RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
881  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
882  RTE_ETH_RSS_IPV6_UDP_EX)
883 #define ETH_RSS_UDP RTE_DEPRECATED(ETH_RSS_UDP) RTE_ETH_RSS_UDP
884 
885 #define RTE_ETH_RSS_TCP ( \
886  RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
887  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
888  RTE_ETH_RSS_IPV6_TCP_EX)
889 #define ETH_RSS_TCP RTE_DEPRECATED(ETH_RSS_TCP) RTE_ETH_RSS_TCP
890 
891 #define RTE_ETH_RSS_SCTP ( \
892  RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
893  RTE_ETH_RSS_NONFRAG_IPV6_SCTP)
894 #define ETH_RSS_SCTP RTE_DEPRECATED(ETH_RSS_SCTP) RTE_ETH_RSS_SCTP
895 
896 #define RTE_ETH_RSS_TUNNEL ( \
897  RTE_ETH_RSS_VXLAN | \
898  RTE_ETH_RSS_GENEVE | \
899  RTE_ETH_RSS_NVGRE)
900 #define ETH_RSS_TUNNEL RTE_DEPRECATED(ETH_RSS_TUNNEL) RTE_ETH_RSS_TUNNEL
901 
902 #define RTE_ETH_RSS_VLAN ( \
903  RTE_ETH_RSS_S_VLAN | \
904  RTE_ETH_RSS_C_VLAN)
905 #define ETH_RSS_VLAN RTE_DEPRECATED(ETH_RSS_VLAN) RTE_ETH_RSS_VLAN
906 
908 #define RTE_ETH_RSS_PROTO_MASK ( \
909  RTE_ETH_RSS_IPV4 | \
910  RTE_ETH_RSS_FRAG_IPV4 | \
911  RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
912  RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
913  RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
914  RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
915  RTE_ETH_RSS_IPV6 | \
916  RTE_ETH_RSS_FRAG_IPV6 | \
917  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
918  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
919  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
920  RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
921  RTE_ETH_RSS_L2_PAYLOAD | \
922  RTE_ETH_RSS_IPV6_EX | \
923  RTE_ETH_RSS_IPV6_TCP_EX | \
924  RTE_ETH_RSS_IPV6_UDP_EX | \
925  RTE_ETH_RSS_PORT | \
926  RTE_ETH_RSS_VXLAN | \
927  RTE_ETH_RSS_GENEVE | \
928  RTE_ETH_RSS_NVGRE | \
929  RTE_ETH_RSS_MPLS)
930 #define ETH_RSS_PROTO_MASK RTE_DEPRECATED(ETH_RSS_PROTO_MASK) RTE_ETH_RSS_PROTO_MASK
931 
932 /*
933  * Definitions used for redirection table entry size.
934  * Some RSS RETA sizes may not be supported by some drivers, check the
935  * documentation or the description of relevant functions for more details.
936  */
937 #define RTE_ETH_RSS_RETA_SIZE_64 64
938 #define RTE_ETH_RSS_RETA_SIZE_128 128
939 #define RTE_ETH_RSS_RETA_SIZE_256 256
940 #define RTE_ETH_RSS_RETA_SIZE_512 512
941 #define RTE_ETH_RETA_GROUP_SIZE 64
942 
943 #define ETH_RSS_RETA_SIZE_64 RTE_DEPRECATED(ETH_RSS_RETA_SIZE_64) RTE_ETH_RSS_RETA_SIZE_64
944 #define ETH_RSS_RETA_SIZE_128 RTE_DEPRECATED(ETH_RSS_RETA_SIZE_128) RTE_ETH_RSS_RETA_SIZE_128
945 #define ETH_RSS_RETA_SIZE_256 RTE_DEPRECATED(ETH_RSS_RETA_SIZE_256) RTE_ETH_RSS_RETA_SIZE_256
946 #define ETH_RSS_RETA_SIZE_512 RTE_DEPRECATED(ETH_RSS_RETA_SIZE_512) RTE_ETH_RSS_RETA_SIZE_512
947 #define RTE_RETA_GROUP_SIZE RTE_DEPRECATED(RTE_RETA_GROUP_SIZE) RTE_ETH_RETA_GROUP_SIZE
948 
950 #define RTE_ETH_VMDQ_MAX_VLAN_FILTERS 64
951 #define RTE_ETH_DCB_NUM_USER_PRIORITIES 8
952 #define RTE_ETH_VMDQ_DCB_NUM_QUEUES 128
953 #define RTE_ETH_DCB_NUM_QUEUES 128
956 #define ETH_VMDQ_MAX_VLAN_FILTERS RTE_DEPRECATED(ETH_VMDQ_MAX_VLAN_FILTERS) RTE_ETH_VMDQ_MAX_VLAN_FILTERS
957 #define ETH_DCB_NUM_USER_PRIORITIES RTE_DEPRECATED(ETH_DCB_NUM_USER_PRIORITIES) RTE_ETH_DCB_NUM_USER_PRIORITIES
958 #define ETH_VMDQ_DCB_NUM_QUEUES RTE_DEPRECATED(ETH_VMDQ_DCB_NUM_QUEUES) RTE_ETH_VMDQ_DCB_NUM_QUEUES
959 #define ETH_DCB_NUM_QUEUES RTE_DEPRECATED(ETH_DCB_NUM_QUEUES) RTE_ETH_DCB_NUM_QUEUES
960 
962 #define RTE_ETH_DCB_PG_SUPPORT RTE_BIT32(0)
963 #define RTE_ETH_DCB_PFC_SUPPORT RTE_BIT32(1)
966 #define ETH_DCB_PG_SUPPORT RTE_DEPRECATED(ETH_DCB_PG_SUPPORT) RTE_ETH_DCB_PG_SUPPORT
967 #define ETH_DCB_PFC_SUPPORT RTE_DEPRECATED(ETH_DCB_PFC_SUPPORT) RTE_ETH_DCB_PFC_SUPPORT
968 
970 #define RTE_ETH_VLAN_STRIP_OFFLOAD 0x0001
971 #define RTE_ETH_VLAN_FILTER_OFFLOAD 0x0002
972 #define RTE_ETH_VLAN_EXTEND_OFFLOAD 0x0004
973 #define RTE_ETH_QINQ_STRIP_OFFLOAD 0x0008
975 #define ETH_VLAN_STRIP_OFFLOAD RTE_DEPRECATED(ETH_VLAN_STRIP_OFFLOAD) RTE_ETH_VLAN_STRIP_OFFLOAD
976 #define ETH_VLAN_FILTER_OFFLOAD RTE_DEPRECATED(ETH_VLAN_FILTER_OFFLOAD) RTE_ETH_VLAN_FILTER_OFFLOAD
977 #define ETH_VLAN_EXTEND_OFFLOAD RTE_DEPRECATED(ETH_VLAN_EXTEND_OFFLOAD) RTE_ETH_VLAN_EXTEND_OFFLOAD
978 #define ETH_QINQ_STRIP_OFFLOAD RTE_DEPRECATED(ETH_QINQ_STRIP_OFFLOAD) RTE_ETH_QINQ_STRIP_OFFLOAD
979 
980 #define RTE_ETH_VLAN_STRIP_MASK 0x0001
981 #define RTE_ETH_VLAN_FILTER_MASK 0x0002
982 #define RTE_ETH_VLAN_EXTEND_MASK 0x0004
983 #define RTE_ETH_QINQ_STRIP_MASK 0x0008
984 #define RTE_ETH_VLAN_ID_MAX 0x0FFF
987 #define ETH_VLAN_STRIP_MASK RTE_DEPRECATED(ETH_VLAN_STRIP_MASK) RTE_ETH_VLAN_STRIP_MASK
988 #define ETH_VLAN_FILTER_MASK RTE_DEPRECATED(ETH_VLAN_FILTER_MASK) RTE_ETH_VLAN_FILTER_MASK
989 #define ETH_VLAN_EXTEND_MASK RTE_DEPRECATED(ETH_VLAN_EXTEND_MASK) RTE_ETH_VLAN_EXTEND_MASK
990 #define ETH_QINQ_STRIP_MASK RTE_DEPRECATED(ETH_QINQ_STRIP_MASK) RTE_ETH_QINQ_STRIP_MASK
991 #define ETH_VLAN_ID_MAX RTE_DEPRECATED(ETH_VLAN_ID_MAX) RTE_ETH_VLAN_ID_MAX
992 
993 /* Definitions used for receive MAC address */
994 #define RTE_ETH_NUM_RECEIVE_MAC_ADDR 128
995 #define ETH_NUM_RECEIVE_MAC_ADDR RTE_DEPRECATED(ETH_NUM_RECEIVE_MAC_ADDR) RTE_ETH_NUM_RECEIVE_MAC_ADDR
996 
997 /* Definitions used for unicast hash */
998 #define RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY 128
999 #define ETH_VMDQ_NUM_UC_HASH_ARRAY RTE_DEPRECATED(ETH_VMDQ_NUM_UC_HASH_ARRAY) RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY
1000 
1005 #define RTE_ETH_VMDQ_ACCEPT_UNTAG RTE_BIT32(0)
1006 
1007 #define RTE_ETH_VMDQ_ACCEPT_HASH_MC RTE_BIT32(1)
1008 
1009 #define RTE_ETH_VMDQ_ACCEPT_HASH_UC RTE_BIT32(2)
1010 
1011 #define RTE_ETH_VMDQ_ACCEPT_BROADCAST RTE_BIT32(3)
1012 
1013 #define RTE_ETH_VMDQ_ACCEPT_MULTICAST RTE_BIT32(4)
1014 
1016 #define ETH_VMDQ_ACCEPT_UNTAG RTE_DEPRECATED(ETH_VMDQ_ACCEPT_UNTAG) RTE_ETH_VMDQ_ACCEPT_UNTAG
1017 #define ETH_VMDQ_ACCEPT_HASH_MC RTE_DEPRECATED(ETH_VMDQ_ACCEPT_HASH_MC) RTE_ETH_VMDQ_ACCEPT_HASH_MC
1018 #define ETH_VMDQ_ACCEPT_HASH_UC RTE_DEPRECATED(ETH_VMDQ_ACCEPT_HASH_UC) RTE_ETH_VMDQ_ACCEPT_HASH_UC
1019 #define ETH_VMDQ_ACCEPT_BROADCAST RTE_DEPRECATED(ETH_VMDQ_ACCEPT_BROADCAST) RTE_ETH_VMDQ_ACCEPT_BROADCAST
1020 #define ETH_VMDQ_ACCEPT_MULTICAST RTE_DEPRECATED(ETH_VMDQ_ACCEPT_MULTICAST) RTE_ETH_VMDQ_ACCEPT_MULTICAST
1021 
1028 struct rte_eth_rss_reta_entry64 {
1030  uint64_t mask;
1032  uint16_t reta[RTE_ETH_RETA_GROUP_SIZE];
1033 };
1034 
1039 enum rte_eth_nb_tcs {
1040  RTE_ETH_4_TCS = 4,
1041  RTE_ETH_8_TCS = 8
1042 };
1043 #define ETH_4_TCS RTE_DEPRECATED(ETH_4_TCS) RTE_ETH_4_TCS
1044 #define ETH_8_TCS RTE_DEPRECATED(ETH_8_TCS) RTE_ETH_8_TCS
1045 
1050 enum rte_eth_nb_pools {
1051  RTE_ETH_8_POOLS = 8,
1052  RTE_ETH_16_POOLS = 16,
1053  RTE_ETH_32_POOLS = 32,
1054  RTE_ETH_64_POOLS = 64
1055 };
1056 #define ETH_8_POOLS RTE_DEPRECATED(ETH_8_POOLS) RTE_ETH_8_POOLS
1057 #define ETH_16_POOLS RTE_DEPRECATED(ETH_16_POOLS) RTE_ETH_16_POOLS
1058 #define ETH_32_POOLS RTE_DEPRECATED(ETH_32_POOLS) RTE_ETH_32_POOLS
1059 #define ETH_64_POOLS RTE_DEPRECATED(ETH_64_POOLS) RTE_ETH_64_POOLS
1060 
1061 /* This structure may be extended in future. */
1062 struct rte_eth_dcb_rx_conf {
1063  enum rte_eth_nb_tcs nb_tcs;
1065  uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
1066 };
1067 
1068 struct rte_eth_vmdq_dcb_tx_conf {
1069  enum rte_eth_nb_pools nb_queue_pools;
1071  uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
1072 };
1073 
1074 struct rte_eth_dcb_tx_conf {
1075  enum rte_eth_nb_tcs nb_tcs;
1077  uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
1078 };
1079 
1080 struct rte_eth_vmdq_tx_conf {
1081  enum rte_eth_nb_pools nb_queue_pools;
1082 };
1083 
1095 struct rte_eth_vmdq_dcb_conf {
1096  enum rte_eth_nb_pools nb_queue_pools;
1097  uint8_t enable_default_pool;
1098  uint8_t default_pool;
1099  uint8_t nb_pool_maps;
1100  struct {
1101  uint16_t vlan_id;
1102  uint64_t pools;
1103  } pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS];
1105  uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
1106 };
1107 
1126 struct rte_eth_vmdq_rx_conf {
1127  enum rte_eth_nb_pools nb_queue_pools;
1128  uint8_t enable_default_pool;
1129  uint8_t default_pool;
1130  uint8_t enable_loop_back;
1131  uint8_t nb_pool_maps;
1132  uint32_t rx_mode;
1133  struct {
1134  uint16_t vlan_id;
1135  uint64_t pools;
1136  } pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS];
1137 };
1138 
1142 struct rte_eth_txmode {
1143  enum rte_eth_tx_mq_mode mq_mode;
1149  uint64_t offloads;
1150 
1151  uint16_t pvid;
1152  __extension__
1153  uint8_t
1154  hw_vlan_reject_tagged : 1,
1156  hw_vlan_reject_untagged : 1,
1158  hw_vlan_insert_pvid : 1;
1159 
1160  uint64_t reserved_64s[2];
1161  void *reserved_ptrs[2];
1162 };
1163 
1200 struct rte_eth_rxseg_split {
1201  struct rte_mempool *mp;
1202  uint16_t length;
1203  uint16_t offset;
1204  uint32_t reserved;
1205 };
1206 
1213 union rte_eth_rxseg {
1214  /* The settings for buffer split offload. */
1215  struct rte_eth_rxseg_split split;
1216  /* The other features settings should be added here. */
1217 };
1218 
1222 struct rte_eth_rxconf {
1223  struct rte_eth_thresh rx_thresh;
1224  uint16_t rx_free_thresh;
1225  uint8_t rx_drop_en;
1226  uint8_t rx_deferred_start;
1227  uint16_t rx_nseg;
1234  uint16_t share_group;
1235  uint16_t share_qid;
1241  uint64_t offloads;
1249  union rte_eth_rxseg *rx_seg;
1250 
1251  uint64_t reserved_64s[2];
1252  void *reserved_ptrs[2];
1253 };
1254 
1258 struct rte_eth_txconf {
1259  struct rte_eth_thresh tx_thresh;
1260  uint16_t tx_rs_thresh;
1261  uint16_t tx_free_thresh;
1264  uint8_t tx_deferred_start;
1270  uint64_t offloads;
1271 
1272  uint64_t reserved_64s[2];
1273  void *reserved_ptrs[2];
1274 };
1275 
1282 struct rte_eth_hairpin_cap {
1284  uint16_t max_nb_queues;
1286  uint16_t max_rx_2_tx;
1288  uint16_t max_tx_2_rx;
1289  uint16_t max_nb_desc;
1290 };
1291 
1292 #define RTE_ETH_MAX_HAIRPIN_PEERS 32
1293 
1300 struct rte_eth_hairpin_peer {
1301  uint16_t port;
1302  uint16_t queue;
1303 };
1304 
1311 struct rte_eth_hairpin_conf {
1312  uint32_t peer_count:16;
1323  uint32_t tx_explicit:1;
1324 
1336  uint32_t manual_bind:1;
1337  uint32_t reserved:14;
1338  struct rte_eth_hairpin_peer peers[RTE_ETH_MAX_HAIRPIN_PEERS];
1339 };
1340 
1344 struct rte_eth_desc_lim {
1345  uint16_t nb_max;
1346  uint16_t nb_min;
1347  uint16_t nb_align;
1357  uint16_t nb_seg_max;
1358 
1370  uint16_t nb_mtu_seg_max;
1371 };
1372 
1376 enum rte_eth_fc_mode {
1377  RTE_ETH_FC_NONE = 0,
1378  RTE_ETH_FC_RX_PAUSE,
1379  RTE_ETH_FC_TX_PAUSE,
1380  RTE_ETH_FC_FULL
1381 };
1382 #define RTE_FC_NONE RTE_DEPRECATED(RTE_FC_NONE) RTE_ETH_FC_NONE
1383 #define RTE_FC_RX_PAUSE RTE_DEPRECATED(RTE_FC_RX_PAUSE) RTE_ETH_FC_RX_PAUSE
1384 #define RTE_FC_TX_PAUSE RTE_DEPRECATED(RTE_FC_TX_PAUSE) RTE_ETH_FC_TX_PAUSE
1385 #define RTE_FC_FULL RTE_DEPRECATED(RTE_FC_FULL) RTE_ETH_FC_FULL
1386 
1392 struct rte_eth_fc_conf {
1393  uint32_t high_water;
1394  uint32_t low_water;
1395  uint16_t pause_time;
1396  uint16_t send_xon;
1397  enum rte_eth_fc_mode mode;
1398  uint8_t mac_ctrl_frame_fwd;
1399  uint8_t autoneg;
1400 };
1401 
1407 struct rte_eth_pfc_conf {
1408  struct rte_eth_fc_conf fc;
1409  uint8_t priority;
1410 };
1411 
1418 struct rte_eth_pfc_queue_info {
1422  uint8_t tc_max;
1424  enum rte_eth_fc_mode mode_capa;
1425 };
1426 
1444 struct rte_eth_pfc_queue_conf {
1445  enum rte_eth_fc_mode mode;
1447  struct {
1448  uint16_t tx_qid;
1452  uint8_t tc;
1453  } rx_pause; /* Valid when (mode == FC_RX_PAUSE || mode == FC_FULL) */
1454 
1455  struct {
1456  uint16_t pause_time;
1457  uint16_t rx_qid;
1461  uint8_t tc;
1462  } tx_pause; /* Valid when (mode == FC_TX_PAUSE || mode == FC_FULL) */
1463 };
1464 
1469 enum rte_eth_tunnel_type {
1470  RTE_ETH_TUNNEL_TYPE_NONE = 0,
1471  RTE_ETH_TUNNEL_TYPE_VXLAN,
1472  RTE_ETH_TUNNEL_TYPE_GENEVE,
1473  RTE_ETH_TUNNEL_TYPE_TEREDO,
1474  RTE_ETH_TUNNEL_TYPE_NVGRE,
1475  RTE_ETH_TUNNEL_TYPE_IP_IN_GRE,
1476  RTE_ETH_L2_TUNNEL_TYPE_E_TAG,
1477  RTE_ETH_TUNNEL_TYPE_VXLAN_GPE,
1478  RTE_ETH_TUNNEL_TYPE_ECPRI,
1479  RTE_ETH_TUNNEL_TYPE_MAX,
1480 };
1481 #define RTE_TUNNEL_TYPE_NONE RTE_DEPRECATED(RTE_TUNNEL_TYPE_NONE) RTE_ETH_TUNNEL_TYPE_NONE
1482 #define RTE_TUNNEL_TYPE_VXLAN RTE_DEPRECATED(RTE_TUNNEL_TYPE_VXLAN) RTE_ETH_TUNNEL_TYPE_VXLAN
1483 #define RTE_TUNNEL_TYPE_GENEVE RTE_DEPRECATED(RTE_TUNNEL_TYPE_GENEVE) RTE_ETH_TUNNEL_TYPE_GENEVE
1484 #define RTE_TUNNEL_TYPE_TEREDO RTE_DEPRECATED(RTE_TUNNEL_TYPE_TEREDO) RTE_ETH_TUNNEL_TYPE_TEREDO
1485 #define RTE_TUNNEL_TYPE_NVGRE RTE_DEPRECATED(RTE_TUNNEL_TYPE_NVGRE) RTE_ETH_TUNNEL_TYPE_NVGRE
1486 #define RTE_TUNNEL_TYPE_IP_IN_GRE RTE_DEPRECATED(RTE_TUNNEL_TYPE_IP_IN_GRE) RTE_ETH_TUNNEL_TYPE_IP_IN_GRE
1487 #define RTE_L2_TUNNEL_TYPE_E_TAG RTE_DEPRECATED(RTE_L2_TUNNEL_TYPE_E_TAG) RTE_ETH_L2_TUNNEL_TYPE_E_TAG
1488 #define RTE_TUNNEL_TYPE_VXLAN_GPE RTE_DEPRECATED(RTE_TUNNEL_TYPE_VXLAN_GPE) RTE_ETH_TUNNEL_TYPE_VXLAN_GPE
1489 #define RTE_TUNNEL_TYPE_ECPRI RTE_DEPRECATED(RTE_TUNNEL_TYPE_ECPRI) RTE_ETH_TUNNEL_TYPE_ECPRI
1490 #define RTE_TUNNEL_TYPE_MAX RTE_DEPRECATED(RTE_TUNNEL_TYPE_MAX) RTE_ETH_TUNNEL_TYPE_MAX
1491 
1492 /* Deprecated API file for rte_eth_dev_filter_* functions */
1493 #include "rte_eth_ctrl.h"
1494 
1499 enum rte_eth_fdir_pballoc_type {
1500  RTE_ETH_FDIR_PBALLOC_64K = 0,
1501  RTE_ETH_FDIR_PBALLOC_128K,
1502  RTE_ETH_FDIR_PBALLOC_256K,
1503 };
1504 #define rte_fdir_pballoc_type rte_eth_fdir_pballoc_type
1505 
1506 #define RTE_FDIR_PBALLOC_64K RTE_DEPRECATED(RTE_FDIR_PBALLOC_64K) RTE_ETH_FDIR_PBALLOC_64K
1507 #define RTE_FDIR_PBALLOC_128K RTE_DEPRECATED(RTE_FDIR_PBALLOC_128K) RTE_ETH_FDIR_PBALLOC_128K
1508 #define RTE_FDIR_PBALLOC_256K RTE_DEPRECATED(RTE_FDIR_PBALLOC_256K) RTE_ETH_FDIR_PBALLOC_256K
1509 
1513 enum rte_fdir_status_mode {
1514  RTE_FDIR_NO_REPORT_STATUS = 0,
1515  RTE_FDIR_REPORT_STATUS,
1516  RTE_FDIR_REPORT_STATUS_ALWAYS,
1517 };
1518 
1525 struct rte_eth_fdir_conf {
1526  enum rte_fdir_mode mode;
1527  enum rte_eth_fdir_pballoc_type pballoc;
1528  enum rte_fdir_status_mode status;
1530  uint8_t drop_queue;
1531  struct rte_eth_fdir_masks mask;
1533  struct rte_eth_fdir_flex_conf flex_conf;
1534 };
1535 #define rte_fdir_conf rte_eth_fdir_conf
1536 
1546 struct rte_eth_udp_tunnel {
1547  uint16_t udp_port;
1548  uint8_t prot_type;
1549 };
1550 
1554 struct rte_eth_intr_conf {
1556  uint32_t lsc:1;
1558  uint32_t rxq:1;
1560  uint32_t rmv:1;
1561 };
1562 
1563 #define rte_intr_conf rte_eth_intr_conf
1564 
1570 struct rte_eth_conf {
1571  uint32_t link_speeds;
1578  struct rte_eth_rxmode rxmode;
1579  struct rte_eth_txmode txmode;
1580  uint32_t lpbk_mode;
1585  struct {
1586  struct rte_eth_rss_conf rss_conf;
1588  struct rte_eth_vmdq_dcb_conf vmdq_dcb_conf;
1590  struct rte_eth_dcb_rx_conf dcb_rx_conf;
1592  struct rte_eth_vmdq_rx_conf vmdq_rx_conf;
1593  } rx_adv_conf;
1594  union {
1596  struct rte_eth_vmdq_dcb_tx_conf vmdq_dcb_tx_conf;
1598  struct rte_eth_dcb_tx_conf dcb_tx_conf;
1600  struct rte_eth_vmdq_tx_conf vmdq_tx_conf;
1601  } tx_adv_conf;
1604  uint32_t dcb_capability_en;
1605  struct rte_eth_fdir_conf fdir_conf;
1606  struct rte_eth_intr_conf intr_conf;
1607 };
1608 
1612 #define RTE_ETH_RX_OFFLOAD_VLAN_STRIP RTE_BIT64(0)
1613 #define RTE_ETH_RX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1614 #define RTE_ETH_RX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1615 #define RTE_ETH_RX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1616 #define RTE_ETH_RX_OFFLOAD_TCP_LRO RTE_BIT64(4)
1617 #define RTE_ETH_RX_OFFLOAD_QINQ_STRIP RTE_BIT64(5)
1618 #define RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(6)
1619 #define RTE_ETH_RX_OFFLOAD_MACSEC_STRIP RTE_BIT64(7)
1620 #define RTE_ETH_RX_OFFLOAD_HEADER_SPLIT RTE_BIT64(8)
1621 #define RTE_ETH_RX_OFFLOAD_VLAN_FILTER RTE_BIT64(9)
1622 #define RTE_ETH_RX_OFFLOAD_VLAN_EXTEND RTE_BIT64(10)
1623 #define RTE_ETH_RX_OFFLOAD_SCATTER RTE_BIT64(13)
1624 
1629 #define RTE_ETH_RX_OFFLOAD_TIMESTAMP RTE_BIT64(14)
1630 #define RTE_ETH_RX_OFFLOAD_SECURITY RTE_BIT64(15)
1631 #define RTE_ETH_RX_OFFLOAD_KEEP_CRC RTE_BIT64(16)
1632 #define RTE_ETH_RX_OFFLOAD_SCTP_CKSUM RTE_BIT64(17)
1633 #define RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(18)
1634 #define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19)
1635 #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20)
1636 
1637 #define DEV_RX_OFFLOAD_VLAN_STRIP RTE_DEPRECATED(DEV_RX_OFFLOAD_VLAN_STRIP) RTE_ETH_RX_OFFLOAD_VLAN_STRIP
1638 #define DEV_RX_OFFLOAD_IPV4_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_IPV4_CKSUM) RTE_ETH_RX_OFFLOAD_IPV4_CKSUM
1639 #define DEV_RX_OFFLOAD_UDP_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_UDP_CKSUM) RTE_ETH_RX_OFFLOAD_UDP_CKSUM
1640 #define DEV_RX_OFFLOAD_TCP_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_TCP_CKSUM) RTE_ETH_RX_OFFLOAD_TCP_CKSUM
1641 #define DEV_RX_OFFLOAD_TCP_LRO RTE_DEPRECATED(DEV_RX_OFFLOAD_TCP_LRO) RTE_ETH_RX_OFFLOAD_TCP_LRO
1642 #define DEV_RX_OFFLOAD_QINQ_STRIP RTE_DEPRECATED(DEV_RX_OFFLOAD_QINQ_STRIP) RTE_ETH_RX_OFFLOAD_QINQ_STRIP
1643 #define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM
1644 #define DEV_RX_OFFLOAD_MACSEC_STRIP RTE_DEPRECATED(DEV_RX_OFFLOAD_MACSEC_STRIP) RTE_ETH_RX_OFFLOAD_MACSEC_STRIP
1645 #define DEV_RX_OFFLOAD_HEADER_SPLIT RTE_DEPRECATED(DEV_RX_OFFLOAD_HEADER_SPLIT) RTE_ETH_RX_OFFLOAD_HEADER_SPLIT
1646 #define DEV_RX_OFFLOAD_VLAN_FILTER RTE_DEPRECATED(DEV_RX_OFFLOAD_VLAN_FILTER) RTE_ETH_RX_OFFLOAD_VLAN_FILTER
1647 #define DEV_RX_OFFLOAD_VLAN_EXTEND RTE_DEPRECATED(DEV_RX_OFFLOAD_VLAN_EXTEND) RTE_ETH_RX_OFFLOAD_VLAN_EXTEND
1648 #define DEV_RX_OFFLOAD_SCATTER RTE_DEPRECATED(DEV_RX_OFFLOAD_SCATTER) RTE_ETH_RX_OFFLOAD_SCATTER
1649 #define DEV_RX_OFFLOAD_TIMESTAMP RTE_DEPRECATED(DEV_RX_OFFLOAD_TIMESTAMP) RTE_ETH_RX_OFFLOAD_TIMESTAMP
1650 #define DEV_RX_OFFLOAD_SECURITY RTE_DEPRECATED(DEV_RX_OFFLOAD_SECURITY) RTE_ETH_RX_OFFLOAD_SECURITY
1651 #define DEV_RX_OFFLOAD_KEEP_CRC RTE_DEPRECATED(DEV_RX_OFFLOAD_KEEP_CRC) RTE_ETH_RX_OFFLOAD_KEEP_CRC
1652 #define DEV_RX_OFFLOAD_SCTP_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_SCTP_CKSUM) RTE_ETH_RX_OFFLOAD_SCTP_CKSUM
1653 #define DEV_RX_OFFLOAD_OUTER_UDP_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_OUTER_UDP_CKSUM) RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM
1654 #define DEV_RX_OFFLOAD_RSS_HASH RTE_DEPRECATED(DEV_RX_OFFLOAD_RSS_HASH) RTE_ETH_RX_OFFLOAD_RSS_HASH
1655 
1656 #define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
1657  RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
1658  RTE_ETH_RX_OFFLOAD_TCP_CKSUM)
1659 #define DEV_RX_OFFLOAD_CHECKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_CHECKSUM) RTE_ETH_RX_OFFLOAD_CHECKSUM
1660 #define RTE_ETH_RX_OFFLOAD_VLAN (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
1661  RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \
1662  RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \
1663  RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
1664 #define DEV_RX_OFFLOAD_VLAN RTE_DEPRECATED(DEV_RX_OFFLOAD_VLAN) RTE_ETH_RX_OFFLOAD_VLAN
1665 
1666 /*
1667  * If new Rx offload capabilities are defined, they also must be
1668  * mentioned in rte_rx_offload_names in rte_ethdev.c file.
1669  */
1670 
1674 #define RTE_ETH_TX_OFFLOAD_VLAN_INSERT RTE_BIT64(0)
1675 #define RTE_ETH_TX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1676 #define RTE_ETH_TX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1677 #define RTE_ETH_TX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1678 #define RTE_ETH_TX_OFFLOAD_SCTP_CKSUM RTE_BIT64(4)
1679 #define RTE_ETH_TX_OFFLOAD_TCP_TSO RTE_BIT64(5)
1680 #define RTE_ETH_TX_OFFLOAD_UDP_TSO RTE_BIT64(6)
1681 #define RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(7)
1682 #define RTE_ETH_TX_OFFLOAD_QINQ_INSERT RTE_BIT64(8)
1683 #define RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO RTE_BIT64(9)
1684 #define RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO RTE_BIT64(10)
1685 #define RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO RTE_BIT64(11)
1686 #define RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO RTE_BIT64(12)
1687 #define RTE_ETH_TX_OFFLOAD_MACSEC_INSERT RTE_BIT64(13)
1688 
1692 #define RTE_ETH_TX_OFFLOAD_MT_LOCKFREE RTE_BIT64(14)
1693 
1694 #define RTE_ETH_TX_OFFLOAD_MULTI_SEGS RTE_BIT64(15)
1695 
1700 #define RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE RTE_BIT64(16)
1701 #define RTE_ETH_TX_OFFLOAD_SECURITY RTE_BIT64(17)
1702 
1707 #define RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO RTE_BIT64(18)
1708 
1713 #define RTE_ETH_TX_OFFLOAD_IP_TNL_TSO RTE_BIT64(19)
1714 
1715 #define RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(20)
1716 
1721 #define RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP RTE_BIT64(21)
1722 /*
1723  * If new Tx offload capabilities are defined, they also must be
1724  * mentioned in rte_tx_offload_names in rte_ethdev.c file.
1725  */
1726 
1727 #define DEV_TX_OFFLOAD_VLAN_INSERT RTE_DEPRECATED(DEV_TX_OFFLOAD_VLAN_INSERT) RTE_ETH_TX_OFFLOAD_VLAN_INSERT
1728 #define DEV_TX_OFFLOAD_IPV4_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_IPV4_CKSUM) RTE_ETH_TX_OFFLOAD_IPV4_CKSUM
1729 #define DEV_TX_OFFLOAD_UDP_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_UDP_CKSUM) RTE_ETH_TX_OFFLOAD_UDP_CKSUM
1730 #define DEV_TX_OFFLOAD_TCP_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_TCP_CKSUM) RTE_ETH_TX_OFFLOAD_TCP_CKSUM
1731 #define DEV_TX_OFFLOAD_SCTP_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_SCTP_CKSUM) RTE_ETH_TX_OFFLOAD_SCTP_CKSUM
1732 #define DEV_TX_OFFLOAD_TCP_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_TCP_TSO) RTE_ETH_TX_OFFLOAD_TCP_TSO
1733 #define DEV_TX_OFFLOAD_UDP_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_UDP_TSO) RTE_ETH_TX_OFFLOAD_UDP_TSO
1734 #define DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM) RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM
1735 #define DEV_TX_OFFLOAD_QINQ_INSERT RTE_DEPRECATED(DEV_TX_OFFLOAD_QINQ_INSERT) RTE_ETH_TX_OFFLOAD_QINQ_INSERT
1736 #define DEV_TX_OFFLOAD_VXLAN_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_VXLAN_TNL_TSO) RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO
1737 #define DEV_TX_OFFLOAD_GRE_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_GRE_TNL_TSO) RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO
1738 #define DEV_TX_OFFLOAD_IPIP_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_IPIP_TNL_TSO) RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO
1739 #define DEV_TX_OFFLOAD_GENEVE_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_GENEVE_TNL_TSO) RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO
1740 #define DEV_TX_OFFLOAD_MACSEC_INSERT RTE_DEPRECATED(DEV_TX_OFFLOAD_MACSEC_INSERT) RTE_ETH_TX_OFFLOAD_MACSEC_INSERT
1741 #define DEV_TX_OFFLOAD_MT_LOCKFREE RTE_DEPRECATED(DEV_TX_OFFLOAD_MT_LOCKFREE) RTE_ETH_TX_OFFLOAD_MT_LOCKFREE
1742 #define DEV_TX_OFFLOAD_MULTI_SEGS RTE_DEPRECATED(DEV_TX_OFFLOAD_MULTI_SEGS) RTE_ETH_TX_OFFLOAD_MULTI_SEGS
1743 #define DEV_TX_OFFLOAD_MBUF_FAST_FREE RTE_DEPRECATED(DEV_TX_OFFLOAD_MBUF_FAST_FREE) RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE
1744 #define DEV_TX_OFFLOAD_SECURITY RTE_DEPRECATED(DEV_TX_OFFLOAD_SECURITY) RTE_ETH_TX_OFFLOAD_SECURITY
1745 #define DEV_TX_OFFLOAD_UDP_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_UDP_TNL_TSO) RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO
1746 #define DEV_TX_OFFLOAD_IP_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_IP_TNL_TSO) RTE_ETH_TX_OFFLOAD_IP_TNL_TSO
1747 #define DEV_TX_OFFLOAD_OUTER_UDP_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_OUTER_UDP_CKSUM) RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM
1748 #define DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP RTE_DEPRECATED(DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP) RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP
1749 
1754 #define RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP RTE_BIT64(0)
1755 
1756 #define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP RTE_BIT64(1)
1757 
1766 #define RTE_ETH_DEV_CAPA_RXQ_SHARE RTE_BIT64(2)
1767 
1768 #define RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP RTE_BIT64(3)
1769 
1770 #define RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP RTE_BIT64(4)
1771 
1773 /*
1774  * Fallback default preferred Rx/Tx port parameters.
1775  * These are used if an application requests default parameters
1776  * but the PMD does not provide preferred values.
1777  */
1778 #define RTE_ETH_DEV_FALLBACK_RX_RINGSIZE 512
1779 #define RTE_ETH_DEV_FALLBACK_TX_RINGSIZE 512
1780 #define RTE_ETH_DEV_FALLBACK_RX_NBQUEUES 1
1781 #define RTE_ETH_DEV_FALLBACK_TX_NBQUEUES 1
1782 
1788 struct rte_eth_dev_portconf {
1789  uint16_t burst_size;
1790  uint16_t ring_size;
1791  uint16_t nb_queues;
1792 };
1793 
1798 #define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID (UINT16_MAX)
1799 
1803 struct rte_eth_switch_info {
1804  const char *name;
1805  uint16_t domain_id;
1813  uint16_t port_id;
1819  uint16_t rx_domain;
1820 };
1821 
1828 struct rte_eth_rxseg_capa {
1829  __extension__
1830  uint32_t multi_pools:1;
1831  uint32_t offset_allowed:1;
1832  uint32_t offset_align_log2:4;
1833  uint16_t max_nseg;
1834  uint16_t reserved;
1835 };
1836 
1844 enum rte_eth_representor_type {
1845  RTE_ETH_REPRESENTOR_NONE,
1846  RTE_ETH_REPRESENTOR_VF,
1847  RTE_ETH_REPRESENTOR_SF,
1848  RTE_ETH_REPRESENTOR_PF,
1849 };
1850 
1856 struct rte_eth_dev_info {
1857  struct rte_device *device;
1858  const char *driver_name;
1859  unsigned int if_index;
1861  uint16_t min_mtu;
1862  uint16_t max_mtu;
1863  const uint32_t *dev_flags;
1864  uint32_t min_rx_bufsize;
1865  uint32_t max_rx_pktlen;
1867  uint32_t max_lro_pkt_size;
1868  uint16_t max_rx_queues;
1869  uint16_t max_tx_queues;
1870  uint32_t max_mac_addrs;
1872  uint32_t max_hash_mac_addrs;
1873  uint16_t max_vfs;
1874  uint16_t max_vmdq_pools;
1875  struct rte_eth_rxseg_capa rx_seg_capa;
1877  uint64_t rx_offload_capa;
1879  uint64_t tx_offload_capa;
1881  uint64_t rx_queue_offload_capa;
1883  uint64_t tx_queue_offload_capa;
1885  uint16_t reta_size;
1886  uint8_t hash_key_size;
1888  uint64_t flow_type_rss_offloads;
1889  struct rte_eth_rxconf default_rxconf;
1890  struct rte_eth_txconf default_txconf;
1891  uint16_t vmdq_queue_base;
1892  uint16_t vmdq_queue_num;
1893  uint16_t vmdq_pool_base;
1894  struct rte_eth_desc_lim rx_desc_lim;
1895  struct rte_eth_desc_lim tx_desc_lim;
1896  uint32_t speed_capa;
1898  uint16_t nb_rx_queues;
1899  uint16_t nb_tx_queues;
1901  struct rte_eth_dev_portconf default_rxportconf;
1903  struct rte_eth_dev_portconf default_txportconf;
1905  uint64_t dev_capa;
1910  struct rte_eth_switch_info switch_info;
1911 
1912  uint64_t reserved_64s[2];
1913  void *reserved_ptrs[2];
1914 };
1915 
1917 #define RTE_ETH_QUEUE_STATE_STOPPED 0
1918 #define RTE_ETH_QUEUE_STATE_STARTED 1
1919 #define RTE_ETH_QUEUE_STATE_HAIRPIN 2
1926 struct rte_eth_rxq_info {
1927  struct rte_mempool *mp;
1928  struct rte_eth_rxconf conf;
1929  uint8_t scattered_rx;
1930  uint8_t queue_state;
1931  uint16_t nb_desc;
1932  uint16_t rx_buf_size;
1939  uint8_t avail_thresh;
1940 } __rte_cache_min_aligned;
1941 
1946 struct rte_eth_txq_info {
1947  struct rte_eth_txconf conf;
1948  uint16_t nb_desc;
1949  uint8_t queue_state;
1950 } __rte_cache_min_aligned;
1951 
1952 /* Generic Burst mode flag definition, values can be ORed. */
1953 
1959 #define RTE_ETH_BURST_FLAG_PER_QUEUE RTE_BIT64(0)
1960 
1965 struct rte_eth_burst_mode {
1966  uint64_t flags;
1968 #define RTE_ETH_BURST_MODE_INFO_SIZE 1024
1969  char info[RTE_ETH_BURST_MODE_INFO_SIZE];
1970 };
1971 
1973 #define RTE_ETH_XSTATS_NAME_SIZE 64
1974 
1984 struct rte_eth_xstat {
1985  uint64_t id;
1986  uint64_t value;
1987 };
1988 
2003 struct rte_eth_xstat_name {
2004  char name[RTE_ETH_XSTATS_NAME_SIZE];
2005 };
2006 
2007 #define RTE_ETH_DCB_NUM_TCS 8
2008 #define RTE_ETH_MAX_VMDQ_POOL 64
2009 
2010 #define ETH_DCB_NUM_TCS RTE_DEPRECATED(ETH_DCB_NUM_TCS) RTE_ETH_DCB_NUM_TCS
2011 #define ETH_MAX_VMDQ_POOL RTE_DEPRECATED(ETH_MAX_VMDQ_POOL) RTE_ETH_MAX_VMDQ_POOL
2012 
2017 struct rte_eth_dcb_tc_queue_mapping {
2019  struct {
2020  uint16_t base;
2021  uint16_t nb_queue;
2022  } tc_rxq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
2024  struct {
2025  uint16_t base;
2026  uint16_t nb_queue;
2027  } tc_txq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
2028 };
2029 
2034 struct rte_eth_dcb_info {
2035  uint8_t nb_tcs;
2036  uint8_t prio_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
2037  uint8_t tc_bws[RTE_ETH_DCB_NUM_TCS];
2039  struct rte_eth_dcb_tc_queue_mapping tc_queue;
2040 };
2041 
2046 enum rte_eth_fec_mode {
2047  RTE_ETH_FEC_NOFEC = 0,
2048  RTE_ETH_FEC_AUTO,
2049  RTE_ETH_FEC_BASER,
2050  RTE_ETH_FEC_RS,
2051 };
2052 
2053 /* Translate from FEC mode to FEC capa */
2054 #define RTE_ETH_FEC_MODE_TO_CAPA(x) RTE_BIT32(x)
2055 
2056 /* This macro indicates FEC capa mask */
2057 #define RTE_ETH_FEC_MODE_CAPA_MASK(x) RTE_BIT32(RTE_ETH_FEC_ ## x)
2058 
2059 /* A structure used to get capabilities per link speed */
2060 struct rte_eth_fec_capa {
2061  uint32_t speed;
2062  uint32_t capa;
2063 };
2064 
2065 #define RTE_ETH_ALL RTE_MAX_ETHPORTS
2066 
2067 /* Macros to check for valid port */
2068 #define RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, retval) do { \
2069  if (!rte_eth_dev_is_valid_port(port_id)) { \
2070  RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
2071  return retval; \
2072  } \
2073 } while (0)
2074 
2075 #define RTE_ETH_VALID_PORTID_OR_RET(port_id) do { \
2076  if (!rte_eth_dev_is_valid_port(port_id)) { \
2077  RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
2078  return; \
2079  } \
2080 } while (0)
2081 
2104 typedef uint16_t (*rte_rx_callback_fn)(uint16_t port_id, uint16_t queue,
2105  struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts,
2106  void *user_param);
2107 
2128 typedef uint16_t (*rte_tx_callback_fn)(uint16_t port_id, uint16_t queue,
2129  struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param);
2130 
2134 enum rte_eth_dev_state {
2136  RTE_ETH_DEV_UNUSED = 0,
2138  RTE_ETH_DEV_ATTACHED,
2140  RTE_ETH_DEV_REMOVED,
2141 };
2142 
2143 struct rte_eth_dev_sriov {
2144  uint8_t active;
2145  uint8_t nb_q_per_pool;
2146  uint16_t def_vmdq_idx;
2147  uint16_t def_pool_q_idx;
2148 };
2149 #define RTE_ETH_DEV_SRIOV(dev) ((dev)->data->sriov)
2150 
2151 #define RTE_ETH_NAME_MAX_LEN RTE_DEV_NAME_MAX_LEN
2152 
2153 #define RTE_ETH_DEV_NO_OWNER 0
2154 
2155 #define RTE_ETH_MAX_OWNER_NAME_LEN 64
2156 
2157 struct rte_eth_dev_owner {
2158  uint64_t id;
2159  char name[RTE_ETH_MAX_OWNER_NAME_LEN];
2160 };
2161 
2167 #define RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE RTE_BIT32(0)
2168 
2169 #define RTE_ETH_DEV_INTR_LSC RTE_BIT32(1)
2170 
2171 #define RTE_ETH_DEV_BONDED_SLAVE RTE_BIT32(2)
2172 
2173 #define RTE_ETH_DEV_INTR_RMV RTE_BIT32(3)
2174 
2175 #define RTE_ETH_DEV_REPRESENTOR RTE_BIT32(4)
2176 
2177 #define RTE_ETH_DEV_NOLIVE_MAC_ADDR RTE_BIT32(5)
2178 
2182 #define RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS RTE_BIT32(6)
2183 
2196 uint64_t rte_eth_find_next_owned_by(uint16_t port_id,
2197  const uint64_t owner_id);
2198 
2202 #define RTE_ETH_FOREACH_DEV_OWNED_BY(p, o) \
2203  for (p = rte_eth_find_next_owned_by(0, o); \
2204  (unsigned int)p < (unsigned int)RTE_MAX_ETHPORTS; \
2205  p = rte_eth_find_next_owned_by(p + 1, o))
2206 
2215 uint16_t rte_eth_find_next(uint16_t port_id);
2216 
2220 #define RTE_ETH_FOREACH_DEV(p) \
2221  RTE_ETH_FOREACH_DEV_OWNED_BY(p, RTE_ETH_DEV_NO_OWNER)
2222 
2234 uint16_t
2235 rte_eth_find_next_of(uint16_t port_id_start,
2236  const struct rte_device *parent);
2237 
2246 #define RTE_ETH_FOREACH_DEV_OF(port_id, parent) \
2247  for (port_id = rte_eth_find_next_of(0, parent); \
2248  port_id < RTE_MAX_ETHPORTS; \
2249  port_id = rte_eth_find_next_of(port_id + 1, parent))
2250 
2262 uint16_t
2263 rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id);
2264 
2275 #define RTE_ETH_FOREACH_DEV_SIBLING(port_id, ref_port_id) \
2276  for (port_id = rte_eth_find_next_sibling(0, ref_port_id); \
2277  port_id < RTE_MAX_ETHPORTS; \
2278  port_id = rte_eth_find_next_sibling(port_id + 1, ref_port_id))
2279 
2290 int rte_eth_dev_owner_new(uint64_t *owner_id);
2291 
2302 int rte_eth_dev_owner_set(const uint16_t port_id,
2303  const struct rte_eth_dev_owner *owner);
2304 
2315 int rte_eth_dev_owner_unset(const uint16_t port_id,
2316  const uint64_t owner_id);
2317 
2326 int rte_eth_dev_owner_delete(const uint64_t owner_id);
2327 
2338 int rte_eth_dev_owner_get(const uint16_t port_id,
2339  struct rte_eth_dev_owner *owner);
2340 
2351 uint16_t rte_eth_dev_count_avail(void);
2352 
2361 uint16_t rte_eth_dev_count_total(void);
2362 
2374 uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex);
2375 
2384 const char *rte_eth_dev_rx_offload_name(uint64_t offload);
2385 
2394 const char *rte_eth_dev_tx_offload_name(uint64_t offload);
2395 
2407 __rte_experimental
2408 const char *rte_eth_dev_capability_name(uint64_t capability);
2409 
2449 int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue,
2450  uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf);
2451 
2460 int
2461 rte_eth_dev_is_removed(uint16_t port_id);
2462 
2525 int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2526  uint16_t nb_rx_desc, unsigned int socket_id,
2527  const struct rte_eth_rxconf *rx_conf,
2528  struct rte_mempool *mb_pool);
2529 
2557 __rte_experimental
2558 int rte_eth_rx_hairpin_queue_setup
2559  (uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc,
2560  const struct rte_eth_hairpin_conf *conf);
2561 
2610 int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2611  uint16_t nb_tx_desc, unsigned int socket_id,
2612  const struct rte_eth_txconf *tx_conf);
2613 
2639 __rte_experimental
2640 int rte_eth_tx_hairpin_queue_setup
2641  (uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc,
2642  const struct rte_eth_hairpin_conf *conf);
2643 
2670 __rte_experimental
2671 int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2672  size_t len, uint32_t direction);
2673 
2696 __rte_experimental
2697 int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port);
2698 
2723 __rte_experimental
2724 int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port);
2725 
2736 int rte_eth_dev_socket_id(uint16_t port_id);
2737 
2747 int rte_eth_dev_is_valid_port(uint16_t port_id);
2748 
2766 int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id);
2767 
2784 int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id);
2785 
2803 int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id);
2804 
2821 int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id);
2822 
2842 int rte_eth_dev_start(uint16_t port_id);
2843 
2854 int rte_eth_dev_stop(uint16_t port_id);
2855 
2868 int rte_eth_dev_set_link_up(uint16_t port_id);
2869 
2879 int rte_eth_dev_set_link_down(uint16_t port_id);
2880 
2891 int rte_eth_dev_close(uint16_t port_id);
2892 
2930 int rte_eth_dev_reset(uint16_t port_id);
2931 
2943 int rte_eth_promiscuous_enable(uint16_t port_id);
2944 
2956 int rte_eth_promiscuous_disable(uint16_t port_id);
2957 
2968 int rte_eth_promiscuous_get(uint16_t port_id);
2969 
2981 int rte_eth_allmulticast_enable(uint16_t port_id);
2982 
2994 int rte_eth_allmulticast_disable(uint16_t port_id);
2995 
3006 int rte_eth_allmulticast_get(uint16_t port_id);
3007 
3025 int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link);
3026 
3041 int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link);
3042 
3056 __rte_experimental
3057 const char *rte_eth_link_speed_to_str(uint32_t link_speed);
3058 
3077 __rte_experimental
3078 int rte_eth_link_to_str(char *str, size_t len,
3079  const struct rte_eth_link *eth_link);
3080 
3098 int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats);
3099 
3111 int rte_eth_stats_reset(uint16_t port_id);
3112 
3142 int rte_eth_xstats_get_names(uint16_t port_id,
3143  struct rte_eth_xstat_name *xstats_names,
3144  unsigned int size);
3145 
3179 int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3180  unsigned int n);
3181 
3206 int
3207 rte_eth_xstats_get_names_by_id(uint16_t port_id,
3208  struct rte_eth_xstat_name *xstats_names, unsigned int size,
3209  uint64_t *ids);
3210 
3235 int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3236  uint64_t *values, unsigned int size);
3237 
3257 int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
3258  uint64_t *id);
3259 
3272 int rte_eth_xstats_reset(uint16_t port_id);
3273 
3292 int rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id,
3293  uint16_t tx_queue_id, uint8_t stat_idx);
3294 
3313 int rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id,
3314  uint16_t rx_queue_id,
3315  uint8_t stat_idx);
3316 
3330 int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr);
3331 
3352 __rte_experimental
3353 int rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,
3354  unsigned int num);
3355 
3399 int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info);
3400 
3416 __rte_experimental
3417 int rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf);
3418 
3439 int rte_eth_dev_fw_version_get(uint16_t port_id,
3440  char *fw_version, size_t fw_size);
3441 
3481 int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3482  uint32_t *ptypes, int num);
3513 int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3514  uint32_t *set_ptypes, unsigned int num);
3515 
3528 int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu);
3529 
3547 int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu);
3548 
3568 int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on);
3569 
3588 int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3589  int on);
3590 
3607 int rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3608  enum rte_vlan_type vlan_type,
3609  uint16_t tag_type);
3610 
3628 int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask);
3629 
3643 int rte_eth_dev_get_vlan_offload(uint16_t port_id);
3644 
3659 int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on);
3660 
3686 __rte_experimental
3687 int rte_eth_rx_avail_thresh_set(uint16_t port_id, uint16_t queue_id,
3688  uint8_t avail_thresh);
3689 
3716 __rte_experimental
3717 int rte_eth_rx_avail_thresh_query(uint16_t port_id, uint16_t *queue_id,
3718  uint8_t *avail_thresh);
3719 
3720 typedef void (*buffer_tx_error_fn)(struct rte_mbuf **unsent, uint16_t count,
3721  void *userdata);
3722 
3727 struct rte_eth_dev_tx_buffer {
3728  buffer_tx_error_fn error_callback;
3729  void *error_userdata;
3730  uint16_t size;
3731  uint16_t length;
3733  struct rte_mbuf *pkts[];
3734 };
3735 
3742 #define RTE_ETH_TX_BUFFER_SIZE(sz) \
3743  (sizeof(struct rte_eth_dev_tx_buffer) + (sz) * sizeof(struct rte_mbuf *))
3744 
3755 int
3756 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size);
3757 
3782 int
3783 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
3784  buffer_tx_error_fn callback, void *userdata);
3785 
3808 void
3809 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
3810  void *userdata);
3811 
3835 void
3836 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
3837  void *userdata);
3838 
3864 int
3865 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt);
3866 
3871 enum rte_eth_event_ipsec_subtype {
3873  RTE_ETH_EVENT_IPSEC_UNKNOWN = 0,
3875  RTE_ETH_EVENT_IPSEC_ESN_OVERFLOW,
3877  RTE_ETH_EVENT_IPSEC_SA_TIME_EXPIRY,
3879  RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY,
3881  RTE_ETH_EVENT_IPSEC_MAX
3882 };
3883 
3888 struct rte_eth_event_ipsec_desc {
3890  enum rte_eth_event_ipsec_subtype subtype;
3905  uint64_t metadata;
3906 };
3907 
3911 enum rte_eth_event_type {
3912  RTE_ETH_EVENT_UNKNOWN,
3913  RTE_ETH_EVENT_INTR_LSC,
3915  RTE_ETH_EVENT_QUEUE_STATE,
3917  RTE_ETH_EVENT_INTR_RESET,
3918  RTE_ETH_EVENT_VF_MBOX,
3919  RTE_ETH_EVENT_MACSEC,
3920  RTE_ETH_EVENT_INTR_RMV,
3921  RTE_ETH_EVENT_NEW,
3922  RTE_ETH_EVENT_DESTROY,
3923  RTE_ETH_EVENT_IPSEC,
3924  RTE_ETH_EVENT_FLOW_AGED,
3929  RTE_ETH_EVENT_RX_AVAIL_THRESH,
3930  RTE_ETH_EVENT_MAX
3931 };
3932 
3934 typedef int (*rte_eth_dev_cb_fn)(uint16_t port_id,
3935  enum rte_eth_event_type event, void *cb_arg, void *ret_param);
3936 
3954 int rte_eth_dev_callback_register(uint16_t port_id,
3955  enum rte_eth_event_type event,
3956  rte_eth_dev_cb_fn cb_fn, void *cb_arg);
3957 
3976 int rte_eth_dev_callback_unregister(uint16_t port_id,
3977  enum rte_eth_event_type event,
3978  rte_eth_dev_cb_fn cb_fn, void *cb_arg);
3979 
4001 int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id);
4002 
4023 int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id);
4024 
4042 int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data);
4043 
4065 int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4066  int epfd, int op, void *data);
4067 
4082 int
4083 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id);
4084 
4098 int rte_eth_led_on(uint16_t port_id);
4099 
4113 int rte_eth_led_off(uint16_t port_id);
4114 
4143 __rte_experimental
4144 int rte_eth_fec_get_capability(uint16_t port_id,
4145  struct rte_eth_fec_capa *speed_fec_capa,
4146  unsigned int num);
4147 
4171 __rte_experimental
4172 int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa);
4173 
4194 __rte_experimental
4195 int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa);
4196 
4211 int rte_eth_dev_flow_ctrl_get(uint16_t port_id,
4212  struct rte_eth_fc_conf *fc_conf);
4213 
4228 int rte_eth_dev_flow_ctrl_set(uint16_t port_id,
4229  struct rte_eth_fc_conf *fc_conf);
4230 
4246 int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
4247  struct rte_eth_pfc_conf *pfc_conf);
4248 
4267 int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr,
4268  uint32_t pool);
4269 
4287 __rte_experimental
4288 int rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id,
4289  struct rte_eth_pfc_queue_info *pfc_queue_info);
4290 
4314 __rte_experimental
4315 int rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id,
4316  struct rte_eth_pfc_queue_conf *pfc_queue_conf);
4317 
4332 int rte_eth_dev_mac_addr_remove(uint16_t port_id,
4333  struct rte_ether_addr *mac_addr);
4334 
4348 int rte_eth_dev_default_mac_addr_set(uint16_t port_id,
4349  struct rte_ether_addr *mac_addr);
4350 
4368 int rte_eth_dev_rss_reta_update(uint16_t port_id,
4369  struct rte_eth_rss_reta_entry64 *reta_conf,
4370  uint16_t reta_size);
4371 
4390 int rte_eth_dev_rss_reta_query(uint16_t port_id,
4391  struct rte_eth_rss_reta_entry64 *reta_conf,
4392  uint16_t reta_size);
4393 
4413 int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4414  uint8_t on);
4415 
4434 int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on);
4435 
4452 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4453  uint16_t tx_rate);
4454 
4469 int rte_eth_dev_rss_hash_update(uint16_t port_id,
4470  struct rte_eth_rss_conf *rss_conf);
4471 
4487 int
4488 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4489  struct rte_eth_rss_conf *rss_conf);
4490 
4515 int
4516 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4517  struct rte_eth_udp_tunnel *tunnel_udp);
4518 
4538 int
4539 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4540  struct rte_eth_udp_tunnel *tunnel_udp);
4541 
4556 int rte_eth_dev_get_dcb_info(uint16_t port_id,
4557  struct rte_eth_dcb_info *dcb_info);
4558 
4559 struct rte_eth_rxtx_callback;
4560 
4586 const struct rte_eth_rxtx_callback *
4587 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4588  rte_rx_callback_fn fn, void *user_param);
4589 
4616 const struct rte_eth_rxtx_callback *
4617 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4618  rte_rx_callback_fn fn, void *user_param);
4619 
4645 const struct rte_eth_rxtx_callback *
4646 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4647  rte_tx_callback_fn fn, void *user_param);
4648 
4682 int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4683  const struct rte_eth_rxtx_callback *user_cb);
4684 
4718 int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4719  const struct rte_eth_rxtx_callback *user_cb);
4720 
4740 int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4741  struct rte_eth_rxq_info *qinfo);
4742 
4762 int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4763  struct rte_eth_txq_info *qinfo);
4764 
4783 int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4784  struct rte_eth_burst_mode *mode);
4785 
4804 int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4805  struct rte_eth_burst_mode *mode);
4806 
4827 __rte_experimental
4828 int rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
4829  struct rte_power_monitor_cond *pmc);
4830 
4849 int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info);
4850 
4863 int rte_eth_dev_get_eeprom_length(uint16_t port_id);
4864 
4881 int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info);
4882 
4899 int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info);
4900 
4919 __rte_experimental
4920 int
4921 rte_eth_dev_get_module_info(uint16_t port_id,
4922  struct rte_eth_dev_module_info *modinfo);
4923 
4943 __rte_experimental
4944 int
4945 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4946  struct rte_dev_eeprom_info *info);
4947 
4967 int rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4968  struct rte_ether_addr *mc_addr_set,
4969  uint32_t nb_mc_addr);
4970 
4983 int rte_eth_timesync_enable(uint16_t port_id);
4984 
4997 int rte_eth_timesync_disable(uint16_t port_id);
4998 
5017 int rte_eth_timesync_read_rx_timestamp(uint16_t port_id,
5018  struct timespec *timestamp, uint32_t flags);
5019 
5035 int rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5036  struct timespec *timestamp);
5037 
5055 int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta);
5056 
5072 int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time);
5073 
5092 int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time);
5093 
5139 __rte_experimental
5140 int
5141 rte_eth_read_clock(uint16_t port_id, uint64_t *clock);
5142 
5158 int
5159 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id);
5160 
5176 int
5177 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name);
5178 
5195 int rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5196  uint16_t *nb_rx_desc,
5197  uint16_t *nb_tx_desc);
5198 
5213 int
5214 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool);
5215 
5225 void *
5226 rte_eth_dev_get_sec_ctx(uint16_t port_id);
5227 
5243 __rte_experimental
5244 int rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5245  struct rte_eth_hairpin_cap *cap);
5246 
5253 struct rte_eth_representor_range {
5254  enum rte_eth_representor_type type;
5255  int controller;
5256  int pf;
5257  __extension__
5258  union {
5259  int vf;
5260  int sf;
5261  };
5262  uint32_t id_base;
5263  uint32_t id_end;
5264  char name[RTE_DEV_NAME_MAX_LEN];
5265 };
5266 
5273 struct rte_eth_representor_info {
5274  uint16_t controller;
5275  uint16_t pf;
5276  uint32_t nb_ranges_alloc;
5277  uint32_t nb_ranges;
5278  struct rte_eth_representor_range ranges[];
5279 };
5280 
5304 __rte_experimental
5305 int rte_eth_representor_info_get(uint16_t port_id,
5306  struct rte_eth_representor_info *info);
5307 
5309 #define RTE_ETH_RX_METADATA_USER_FLAG RTE_BIT64(0)
5310 
5312 #define RTE_ETH_RX_METADATA_USER_MARK RTE_BIT64(1)
5313 
5315 #define RTE_ETH_RX_METADATA_TUNNEL_ID RTE_BIT64(2)
5316 
5359 __rte_experimental
5360 int rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features);
5361 
5363 #define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0))
5364 
5365 #define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1))
5366 
5375 struct rte_eth_ip_reassembly_params {
5377  uint32_t timeout_ms;
5379  uint16_t max_frags;
5384  uint16_t flags;
5385 };
5386 
5407 __rte_experimental
5408 int rte_eth_ip_reassembly_capability_get(uint16_t port_id,
5409  struct rte_eth_ip_reassembly_params *capa);
5410 
5432 __rte_experimental
5433 int rte_eth_ip_reassembly_conf_get(uint16_t port_id,
5434  struct rte_eth_ip_reassembly_params *conf);
5435 
5465 __rte_experimental
5466 int rte_eth_ip_reassembly_conf_set(uint16_t port_id,
5467  const struct rte_eth_ip_reassembly_params *conf);
5468 
5476 typedef struct {
5481  struct rte_mbuf *next_frag;
5483  uint16_t time_spent;
5485  uint16_t nb_frags;
5486 } rte_eth_ip_reassembly_dynfield_t;
5487 
5506 __rte_experimental
5507 int rte_eth_dev_priv_dump(uint16_t port_id, FILE *file);
5508 
5509 #include <rte_ethdev_core.h>
5510 
5534 uint16_t rte_eth_call_rx_callbacks(uint16_t port_id, uint16_t queue_id,
5535  struct rte_mbuf **rx_pkts, uint16_t nb_rx, uint16_t nb_pkts,
5536  void *opaque);
5537 
5625 static inline uint16_t
5626 rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,
5627  struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
5628 {
5629  uint16_t nb_rx;
5630  struct rte_eth_fp_ops *p;
5631  void *qd;
5632 
5633 #ifdef RTE_ETHDEV_DEBUG_RX
5634  if (port_id >= RTE_MAX_ETHPORTS ||
5635  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5636  RTE_ETHDEV_LOG(ERR,
5637  "Invalid port_id=%u or queue_id=%u\n",
5638  port_id, queue_id);
5639  return 0;
5640  }
5641 #endif
5642 
5643  /* fetch pointer to queue data */
5644  p = &rte_eth_fp_ops[port_id];
5645  qd = p->rxq.data[queue_id];
5646 
5647 #ifdef RTE_ETHDEV_DEBUG_RX
5648  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
5649 
5650  if (qd == NULL) {
5651  RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u for port_id=%u\n",
5652  queue_id, port_id);
5653  return 0;
5654  }
5655 #endif
5656 
5657  nb_rx = p->rx_pkt_burst(qd, rx_pkts, nb_pkts);
5658 
5659 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
5660  {
5661  void *cb;
5662 
5663  /* __ATOMIC_RELEASE memory order was used when the
5664  * call back was inserted into the list.
5665  * Since there is a clear dependency between loading
5666  * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
5667  * not required.
5668  */
5669  cb = __atomic_load_n((void **)&p->rxq.clbk[queue_id],
5670  __ATOMIC_RELAXED);
5671  if (unlikely(cb != NULL))
5672  nb_rx = rte_eth_call_rx_callbacks(port_id, queue_id,
5673  rx_pkts, nb_rx, nb_pkts, cb);
5674  }
5675 #endif
5676 
5677  rte_ethdev_trace_rx_burst(port_id, queue_id, (void **)rx_pkts, nb_rx);
5678  return nb_rx;
5679 }
5680 
5694 static inline int
5695 rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
5696 {
5697  struct rte_eth_fp_ops *p;
5698  void *qd;
5699 
5700  if (port_id >= RTE_MAX_ETHPORTS ||
5701  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5702  RTE_ETHDEV_LOG(ERR,
5703  "Invalid port_id=%u or queue_id=%u\n",
5704  port_id, queue_id);
5705  return -EINVAL;
5706  }
5707 
5708  /* fetch pointer to queue data */
5709  p = &rte_eth_fp_ops[port_id];
5710  qd = p->rxq.data[queue_id];
5711 
5712  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5713  RTE_FUNC_PTR_OR_ERR_RET(*p->rx_queue_count, -ENOTSUP);
5714  if (qd == NULL)
5715  return -EINVAL;
5716 
5717  return (int)(*p->rx_queue_count)(qd);
5718 }
5719 
5723 #define RTE_ETH_RX_DESC_AVAIL 0
5724 #define RTE_ETH_RX_DESC_DONE 1
5725 #define RTE_ETH_RX_DESC_UNAVAIL 2
5761 static inline int
5762 rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id,
5763  uint16_t offset)
5764 {
5765  struct rte_eth_fp_ops *p;
5766  void *qd;
5767 
5768 #ifdef RTE_ETHDEV_DEBUG_RX
5769  if (port_id >= RTE_MAX_ETHPORTS ||
5770  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5771  RTE_ETHDEV_LOG(ERR,
5772  "Invalid port_id=%u or queue_id=%u\n",
5773  port_id, queue_id);
5774  return -EINVAL;
5775  }
5776 #endif
5777 
5778  /* fetch pointer to queue data */
5779  p = &rte_eth_fp_ops[port_id];
5780  qd = p->rxq.data[queue_id];
5781 
5782 #ifdef RTE_ETHDEV_DEBUG_RX
5783  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5784  if (qd == NULL)
5785  return -ENODEV;
5786 #endif
5787  RTE_FUNC_PTR_OR_ERR_RET(*p->rx_descriptor_status, -ENOTSUP);
5788  return (*p->rx_descriptor_status)(qd, offset);
5789 }
5790 
5794 #define RTE_ETH_TX_DESC_FULL 0
5795 #define RTE_ETH_TX_DESC_DONE 1
5796 #define RTE_ETH_TX_DESC_UNAVAIL 2
5832 static inline int rte_eth_tx_descriptor_status(uint16_t port_id,
5833  uint16_t queue_id, uint16_t offset)
5834 {
5835  struct rte_eth_fp_ops *p;
5836  void *qd;
5837 
5838 #ifdef RTE_ETHDEV_DEBUG_TX
5839  if (port_id >= RTE_MAX_ETHPORTS ||
5840  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5841  RTE_ETHDEV_LOG(ERR,
5842  "Invalid port_id=%u or queue_id=%u\n",
5843  port_id, queue_id);
5844  return -EINVAL;
5845  }
5846 #endif
5847 
5848  /* fetch pointer to queue data */
5849  p = &rte_eth_fp_ops[port_id];
5850  qd = p->txq.data[queue_id];
5851 
5852 #ifdef RTE_ETHDEV_DEBUG_TX
5853  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5854  if (qd == NULL)
5855  return -ENODEV;
5856 #endif
5857  RTE_FUNC_PTR_OR_ERR_RET(*p->tx_descriptor_status, -ENOTSUP);
5858  return (*p->tx_descriptor_status)(qd, offset);
5859 }
5860 
5880 uint16_t rte_eth_call_tx_callbacks(uint16_t port_id, uint16_t queue_id,
5881  struct rte_mbuf **tx_pkts, uint16_t nb_pkts, void *opaque);
5882 
5949 static inline uint16_t
5950 rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id,
5951  struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
5952 {
5953  struct rte_eth_fp_ops *p;
5954  void *qd;
5955 
5956 #ifdef RTE_ETHDEV_DEBUG_TX
5957  if (port_id >= RTE_MAX_ETHPORTS ||
5958  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5959  RTE_ETHDEV_LOG(ERR,
5960  "Invalid port_id=%u or queue_id=%u\n",
5961  port_id, queue_id);
5962  return 0;
5963  }
5964 #endif
5965 
5966  /* fetch pointer to queue data */
5967  p = &rte_eth_fp_ops[port_id];
5968  qd = p->txq.data[queue_id];
5969 
5970 #ifdef RTE_ETHDEV_DEBUG_TX
5971  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
5972 
5973  if (qd == NULL) {
5974  RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u for port_id=%u\n",
5975  queue_id, port_id);
5976  return 0;
5977  }
5978 #endif
5979 
5980 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
5981  {
5982  void *cb;
5983 
5984  /* __ATOMIC_RELEASE memory order was used when the
5985  * call back was inserted into the list.
5986  * Since there is a clear dependency between loading
5987  * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
5988  * not required.
5989  */
5990  cb = __atomic_load_n((void **)&p->txq.clbk[queue_id],
5991  __ATOMIC_RELAXED);
5992  if (unlikely(cb != NULL))
5993  nb_pkts = rte_eth_call_tx_callbacks(port_id, queue_id,
5994  tx_pkts, nb_pkts, cb);
5995  }
5996 #endif
5997 
5998  nb_pkts = p->tx_pkt_burst(qd, tx_pkts, nb_pkts);
5999 
6000  rte_ethdev_trace_tx_burst(port_id, queue_id, (void **)tx_pkts, nb_pkts);
6001  return nb_pkts;
6002 }
6003 
6058 #ifndef RTE_ETHDEV_TX_PREPARE_NOOP
6059 
6060 static inline uint16_t
6061 rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id,
6062  struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6063 {
6064  struct rte_eth_fp_ops *p;
6065  void *qd;
6066 
6067 #ifdef RTE_ETHDEV_DEBUG_TX
6068  if (port_id >= RTE_MAX_ETHPORTS ||
6069  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6070  RTE_ETHDEV_LOG(ERR,
6071  "Invalid port_id=%u or queue_id=%u\n",
6072  port_id, queue_id);
6073  rte_errno = ENODEV;
6074  return 0;
6075  }
6076 #endif
6077 
6078  /* fetch pointer to queue data */
6079  p = &rte_eth_fp_ops[port_id];
6080  qd = p->txq.data[queue_id];
6081 
6082 #ifdef RTE_ETHDEV_DEBUG_TX
6083  if (!rte_eth_dev_is_valid_port(port_id)) {
6084  RTE_ETHDEV_LOG(ERR, "Invalid Tx port_id=%u\n", port_id);
6085  rte_errno = ENODEV;
6086  return 0;
6087  }
6088  if (qd == NULL) {
6089  RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u for port_id=%u\n",
6090  queue_id, port_id);
6091  rte_errno = EINVAL;
6092  return 0;
6093  }
6094 #endif
6095 
6096  if (!p->tx_pkt_prepare)
6097  return nb_pkts;
6098 
6099  return p->tx_pkt_prepare(qd, tx_pkts, nb_pkts);
6100 }
6101 
6102 #else
6103 
6104 /*
6105  * Native NOOP operation for compilation targets which doesn't require any
6106  * preparations steps, and functional NOOP may introduce unnecessary performance
6107  * drop.
6108  *
6109  * Generally this is not a good idea to turn it on globally and didn't should
6110  * be used if behavior of tx_preparation can change.
6111  */
6112 
6113 static inline uint16_t
6114 rte_eth_tx_prepare(__rte_unused uint16_t port_id,
6115  __rte_unused uint16_t queue_id,
6116  __rte_unused struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6117 {
6118  return nb_pkts;
6119 }
6120 
6121 #endif
6122 
6145 static inline uint16_t
6146 rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id,
6147  struct rte_eth_dev_tx_buffer *buffer)
6148 {
6149  uint16_t sent;
6150  uint16_t to_send = buffer->length;
6151 
6152  if (to_send == 0)
6153  return 0;
6154 
6155  sent = rte_eth_tx_burst(port_id, queue_id, buffer->pkts, to_send);
6156 
6157  buffer->length = 0;
6158 
6159  /* All packets sent, or to be dealt with by callback below */
6160  if (unlikely(sent != to_send))
6161  buffer->error_callback(&buffer->pkts[sent],
6162  (uint16_t)(to_send - sent),
6163  buffer->error_userdata);
6164 
6165  return sent;
6166 }
6167 
6198 static __rte_always_inline uint16_t
6199 rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id,
6200  struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
6201 {
6202  buffer->pkts[buffer->length++] = tx_pkt;
6203  if (buffer->length < buffer->size)
6204  return 0;
6205 
6206  return rte_eth_tx_buffer_flush(port_id, queue_id, buffer);
6207 }
6208 
6209 #ifdef __cplusplus
6210 }
6211 #endif
6212 
6213 #endif /* _RTE_ETHDEV_H_ */
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Definition: rte_ethdev.h:1898
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__rte_experimental int rte_eth_dev_get_module_info(uint16_t port_id, struct rte_eth_dev_module_info *modinfo)
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__rte_experimental int rte_eth_ip_reassembly_capability_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *capa)
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__rte_experimental int rte_eth_ip_reassembly_conf_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *conf)
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Definition: rte_ethdev.h:1126
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Definition: rte_ethdev.h:407
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__rte_experimental int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports, size_t len, uint32_t direction)
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__rte_experimental int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
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Definition: rte_ethdev.h:260
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Definition: rte_ethdev.h:261
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Definition: rte_ethdev.h:6199
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Definition: rte_ethdev.h:396
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Definition: rte_ethdev.h:418
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__rte_experimental const char * rte_eth_link_speed_to_str(uint32_t link_speed)
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Definition: rte_ethdev.h:1858
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Definition: rte_ethdev.h:5695
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int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_rxq_info *qinfo)
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Definition: rte_ethdev.h:5256
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Definition: rte_dev_info.h:38
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Definition: rte_ethdev.h:1899
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Definition: rte_ethdev.h:5483
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Definition: rte_ethdev.h:492
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__rte_experimental const char * rte_eth_dev_capability_name(uint64_t capability)
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__rte_experimental int rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, const struct rte_eth_hairpin_conf *conf)
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__rte_experimental int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
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__rte_experimental int rte_eth_ip_reassembly_conf_set(uint16_t port_id, const struct rte_eth_ip_reassembly_params *conf)
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int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr, uint8_t on)
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Definition: rte_ethdev.h:370
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Definition: rte_ethdev.h:1845
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__rte_experimental int rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, const struct rte_eth_hairpin_conf *conf)
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Definition: rte_ethdev.h:3929
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Definition: rte_ethdev.h:3930
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Definition: rte_ethdev.h:1264
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Definition: rte_ethdev.h:399
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Definition: rte_ethdev.h:1868
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Definition: rte_ethdev.h:527
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Definition: rte_ethdev.h:1516
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Definition: rte_ethdev.h:1813
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Definition: rte_ethdev.h:1844
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Definition: rte_ethdev.h:2136
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Definition: rte_ethdev.h:473
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Definition: rte_ethdev.h:1570
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Definition: rte_ethdev.h:1301
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int rte_eth_xstats_get_names(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size)
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const struct rte_eth_rxtx_callback * rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
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Definition: rte_ethdev.h:432
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Definition: rte_ethdev.h:1556
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Definition: rte_ethdev.h:1225
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Definition: rte_ethdev.h:5273
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int rte_eth_dev_is_valid_port(uint16_t port_id)
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Definition: rte_ethdev.h:1227
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Definition: rte_ethdev.h:457
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Definition: rte_ethdev.h:1867
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Definition: rte_ethdev.h:1346
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Definition: rte_ethdev.h:423
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Definition: rte_ethdev.h:397
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Definition: rte_ethdev.h:1132
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Definition: rte_ethdev.h:1234
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Definition: rte_ethdev.h:1984
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Definition: rte_ethdev.h:3888
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Definition: rte_ethdev.h:1896
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Definition: rte_ethdev.h:1418
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Definition: rte_ethdev.h:5950
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Definition: rte_ethdev.h:1547
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Definition: rte_ethdev.h:1051
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Definition: rte_ethdev.h:1457
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Definition: rte_ethdev.h:456
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__rte_experimental int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
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Definition: rte_ethdev.h:1399
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Definition: rte_ethdev.h:1864
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static uint16_t rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer)
Definition: rte_ethdev.h:6146
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int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id, const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mb_pool)
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Definition: rte_ethdev.h:5260
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Definition: rte_ethdev.h:3911
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Definition: rte_ethdev.h:1966
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