155 #define RTE_ETHDEV_HAS_LRO_SUPPORT 158 #ifdef RTE_LIBRTE_ETHDEV_DEBUG 159 #define RTE_ETHDEV_DEBUG_RX 160 #define RTE_ETHDEV_DEBUG_TX 164 #include <rte_compat.h> 172 #include <rte_config.h> 176 #include "rte_dev_info.h" 178 extern int rte_eth_dev_logtype;
179 #define RTE_LOGTYPE_ETHDEV rte_eth_dev_logtype 181 #define RTE_ETHDEV_LOG_LINE(level, ...) \ 182 RTE_LOG_LINE(level, ETHDEV, "" __VA_ARGS__) 247 #define RTE_ETH_FOREACH_MATCHING_DEV(id, devargs, iter) \ 248 for (rte_eth_iterator_init(iter, devargs), \ 249 id = rte_eth_iterator_next(iter); \ 250 id != RTE_MAX_ETHPORTS; \ 251 id = rte_eth_iterator_next(iter)) 291 #define RTE_ETH_LINK_SPEED_AUTONEG 0 292 #define RTE_ETH_LINK_SPEED_FIXED RTE_BIT32(0) 293 #define RTE_ETH_LINK_SPEED_10M_HD RTE_BIT32(1) 294 #define RTE_ETH_LINK_SPEED_10M RTE_BIT32(2) 295 #define RTE_ETH_LINK_SPEED_100M_HD RTE_BIT32(3) 296 #define RTE_ETH_LINK_SPEED_100M RTE_BIT32(4) 297 #define RTE_ETH_LINK_SPEED_1G RTE_BIT32(5) 298 #define RTE_ETH_LINK_SPEED_2_5G RTE_BIT32(6) 299 #define RTE_ETH_LINK_SPEED_5G RTE_BIT32(7) 300 #define RTE_ETH_LINK_SPEED_10G RTE_BIT32(8) 301 #define RTE_ETH_LINK_SPEED_20G RTE_BIT32(9) 302 #define RTE_ETH_LINK_SPEED_25G RTE_BIT32(10) 303 #define RTE_ETH_LINK_SPEED_40G RTE_BIT32(11) 304 #define RTE_ETH_LINK_SPEED_50G RTE_BIT32(12) 305 #define RTE_ETH_LINK_SPEED_56G RTE_BIT32(13) 306 #define RTE_ETH_LINK_SPEED_100G RTE_BIT32(14) 307 #define RTE_ETH_LINK_SPEED_200G RTE_BIT32(15) 308 #define RTE_ETH_LINK_SPEED_400G RTE_BIT32(16) 314 #define RTE_ETH_SPEED_NUM_NONE 0 315 #define RTE_ETH_SPEED_NUM_10M 10 316 #define RTE_ETH_SPEED_NUM_100M 100 317 #define RTE_ETH_SPEED_NUM_1G 1000 318 #define RTE_ETH_SPEED_NUM_2_5G 2500 319 #define RTE_ETH_SPEED_NUM_5G 5000 320 #define RTE_ETH_SPEED_NUM_10G 10000 321 #define RTE_ETH_SPEED_NUM_20G 20000 322 #define RTE_ETH_SPEED_NUM_25G 25000 323 #define RTE_ETH_SPEED_NUM_40G 40000 324 #define RTE_ETH_SPEED_NUM_50G 50000 325 #define RTE_ETH_SPEED_NUM_56G 56000 326 #define RTE_ETH_SPEED_NUM_100G 100000 327 #define RTE_ETH_SPEED_NUM_200G 200000 328 #define RTE_ETH_SPEED_NUM_400G 400000 329 #define RTE_ETH_SPEED_NUM_UNKNOWN UINT32_MAX 338 uint16_t link_duplex : 1;
339 uint16_t link_autoneg : 1;
340 uint16_t link_status : 1;
346 #define RTE_ETH_LINK_HALF_DUPLEX 0 347 #define RTE_ETH_LINK_FULL_DUPLEX 1 348 #define RTE_ETH_LINK_DOWN 0 349 #define RTE_ETH_LINK_UP 1 350 #define RTE_ETH_LINK_FIXED 0 351 #define RTE_ETH_LINK_AUTONEG 1 352 #define RTE_ETH_LINK_MAX_STR_LEN 40 359 struct rte_eth_thresh { 368 #define RTE_ETH_MQ_RX_RSS_FLAG RTE_BIT32(0) 369 #define RTE_ETH_MQ_RX_DCB_FLAG RTE_BIT32(1) 370 #define RTE_ETH_MQ_RX_VMDQ_FLAG RTE_BIT32(2) 377 enum rte_eth_rx_mq_mode { 426 uint64_t reserved_64s[2];
427 void *reserved_ptrs[2];
435 RTE_ETH_VLAN_TYPE_UNKNOWN = 0,
438 RTE_ETH_VLAN_TYPE_MAX,
470 RTE_ETH_HASH_FUNCTION_MAX,
473 #define RTE_ETH_HASH_ALGO_TO_CAPA(x) RTE_BIT32(x) 474 #define RTE_ETH_HASH_ALGO_CAPA_MASK(x) RTE_BIT32(RTE_ETH_HASH_FUNCTION_ ## x) 511 #define RTE_ETH_FLOW_UNKNOWN 0 512 #define RTE_ETH_FLOW_RAW 1 513 #define RTE_ETH_FLOW_IPV4 2 514 #define RTE_ETH_FLOW_FRAG_IPV4 3 515 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4 516 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5 517 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6 518 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7 519 #define RTE_ETH_FLOW_IPV6 8 520 #define RTE_ETH_FLOW_FRAG_IPV6 9 521 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10 522 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11 523 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12 524 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13 525 #define RTE_ETH_FLOW_L2_PAYLOAD 14 526 #define RTE_ETH_FLOW_IPV6_EX 15 527 #define RTE_ETH_FLOW_IPV6_TCP_EX 16 528 #define RTE_ETH_FLOW_IPV6_UDP_EX 17 530 #define RTE_ETH_FLOW_PORT 18 531 #define RTE_ETH_FLOW_VXLAN 19 532 #define RTE_ETH_FLOW_GENEVE 20 533 #define RTE_ETH_FLOW_NVGRE 21 534 #define RTE_ETH_FLOW_VXLAN_GPE 22 535 #define RTE_ETH_FLOW_GTPU 23 536 #define RTE_ETH_FLOW_MAX 24 542 #define RTE_ETH_RSS_IPV4 RTE_BIT64(2) 543 #define RTE_ETH_RSS_FRAG_IPV4 RTE_BIT64(3) 544 #define RTE_ETH_RSS_NONFRAG_IPV4_TCP RTE_BIT64(4) 545 #define RTE_ETH_RSS_NONFRAG_IPV4_UDP RTE_BIT64(5) 546 #define RTE_ETH_RSS_NONFRAG_IPV4_SCTP RTE_BIT64(6) 547 #define RTE_ETH_RSS_NONFRAG_IPV4_OTHER RTE_BIT64(7) 548 #define RTE_ETH_RSS_IPV6 RTE_BIT64(8) 549 #define RTE_ETH_RSS_FRAG_IPV6 RTE_BIT64(9) 550 #define RTE_ETH_RSS_NONFRAG_IPV6_TCP RTE_BIT64(10) 551 #define RTE_ETH_RSS_NONFRAG_IPV6_UDP RTE_BIT64(11) 552 #define RTE_ETH_RSS_NONFRAG_IPV6_SCTP RTE_BIT64(12) 553 #define RTE_ETH_RSS_NONFRAG_IPV6_OTHER RTE_BIT64(13) 554 #define RTE_ETH_RSS_L2_PAYLOAD RTE_BIT64(14) 555 #define RTE_ETH_RSS_IPV6_EX RTE_BIT64(15) 556 #define RTE_ETH_RSS_IPV6_TCP_EX RTE_BIT64(16) 557 #define RTE_ETH_RSS_IPV6_UDP_EX RTE_BIT64(17) 558 #define RTE_ETH_RSS_PORT RTE_BIT64(18) 559 #define RTE_ETH_RSS_VXLAN RTE_BIT64(19) 560 #define RTE_ETH_RSS_GENEVE RTE_BIT64(20) 561 #define RTE_ETH_RSS_NVGRE RTE_BIT64(21) 562 #define RTE_ETH_RSS_GTPU RTE_BIT64(23) 563 #define RTE_ETH_RSS_ETH RTE_BIT64(24) 564 #define RTE_ETH_RSS_S_VLAN RTE_BIT64(25) 565 #define RTE_ETH_RSS_C_VLAN RTE_BIT64(26) 566 #define RTE_ETH_RSS_ESP RTE_BIT64(27) 567 #define RTE_ETH_RSS_AH RTE_BIT64(28) 568 #define RTE_ETH_RSS_L2TPV3 RTE_BIT64(29) 569 #define RTE_ETH_RSS_PFCP RTE_BIT64(30) 570 #define RTE_ETH_RSS_PPPOE RTE_BIT64(31) 571 #define RTE_ETH_RSS_ECPRI RTE_BIT64(32) 572 #define RTE_ETH_RSS_MPLS RTE_BIT64(33) 573 #define RTE_ETH_RSS_IPV4_CHKSUM RTE_BIT64(34) 587 #define RTE_ETH_RSS_L4_CHKSUM RTE_BIT64(35) 589 #define RTE_ETH_RSS_L2TPV2 RTE_BIT64(36) 590 #define RTE_ETH_RSS_IPV6_FLOW_LABEL RTE_BIT64(37) 601 #define RTE_ETH_RSS_L3_SRC_ONLY RTE_BIT64(63) 602 #define RTE_ETH_RSS_L3_DST_ONLY RTE_BIT64(62) 603 #define RTE_ETH_RSS_L4_SRC_ONLY RTE_BIT64(61) 604 #define RTE_ETH_RSS_L4_DST_ONLY RTE_BIT64(60) 605 #define RTE_ETH_RSS_L2_SRC_ONLY RTE_BIT64(59) 606 #define RTE_ETH_RSS_L2_DST_ONLY RTE_BIT64(58) 614 #define RTE_ETH_RSS_L3_PRE32 RTE_BIT64(57) 615 #define RTE_ETH_RSS_L3_PRE40 RTE_BIT64(56) 616 #define RTE_ETH_RSS_L3_PRE48 RTE_BIT64(55) 617 #define RTE_ETH_RSS_L3_PRE56 RTE_BIT64(54) 618 #define RTE_ETH_RSS_L3_PRE64 RTE_BIT64(53) 619 #define RTE_ETH_RSS_L3_PRE96 RTE_BIT64(52) 634 #define RTE_ETH_RSS_LEVEL_PMD_DEFAULT (UINT64_C(0) << 50) 640 #define RTE_ETH_RSS_LEVEL_OUTERMOST (UINT64_C(1) << 50) 646 #define RTE_ETH_RSS_LEVEL_INNERMOST (UINT64_C(2) << 50) 647 #define RTE_ETH_RSS_LEVEL_MASK (UINT64_C(3) << 50) 649 #define RTE_ETH_RSS_LEVEL(rss_hf) ((rss_hf & RTE_ETH_RSS_LEVEL_MASK) >> 50) 661 static inline uint64_t
664 if ((rss_hf & RTE_ETH_RSS_L3_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L3_DST_ONLY))
665 rss_hf &= ~(RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY);
667 if ((rss_hf & RTE_ETH_RSS_L4_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L4_DST_ONLY))
668 rss_hf &= ~(RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY);
673 #define RTE_ETH_RSS_IPV6_PRE32 ( \ 675 RTE_ETH_RSS_L3_PRE32) 677 #define RTE_ETH_RSS_IPV6_PRE40 ( \ 679 RTE_ETH_RSS_L3_PRE40) 681 #define RTE_ETH_RSS_IPV6_PRE48 ( \ 683 RTE_ETH_RSS_L3_PRE48) 685 #define RTE_ETH_RSS_IPV6_PRE56 ( \ 687 RTE_ETH_RSS_L3_PRE56) 689 #define RTE_ETH_RSS_IPV6_PRE64 ( \ 691 RTE_ETH_RSS_L3_PRE64) 693 #define RTE_ETH_RSS_IPV6_PRE96 ( \ 695 RTE_ETH_RSS_L3_PRE96) 697 #define RTE_ETH_RSS_IPV6_PRE32_UDP ( \ 698 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 699 RTE_ETH_RSS_L3_PRE32) 701 #define RTE_ETH_RSS_IPV6_PRE40_UDP ( \ 702 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 703 RTE_ETH_RSS_L3_PRE40) 705 #define RTE_ETH_RSS_IPV6_PRE48_UDP ( \ 706 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 707 RTE_ETH_RSS_L3_PRE48) 709 #define RTE_ETH_RSS_IPV6_PRE56_UDP ( \ 710 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 711 RTE_ETH_RSS_L3_PRE56) 713 #define RTE_ETH_RSS_IPV6_PRE64_UDP ( \ 714 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 715 RTE_ETH_RSS_L3_PRE64) 717 #define RTE_ETH_RSS_IPV6_PRE96_UDP ( \ 718 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 719 RTE_ETH_RSS_L3_PRE96) 721 #define RTE_ETH_RSS_IPV6_PRE32_TCP ( \ 722 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 723 RTE_ETH_RSS_L3_PRE32) 725 #define RTE_ETH_RSS_IPV6_PRE40_TCP ( \ 726 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 727 RTE_ETH_RSS_L3_PRE40) 729 #define RTE_ETH_RSS_IPV6_PRE48_TCP ( \ 730 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 731 RTE_ETH_RSS_L3_PRE48) 733 #define RTE_ETH_RSS_IPV6_PRE56_TCP ( \ 734 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 735 RTE_ETH_RSS_L3_PRE56) 737 #define RTE_ETH_RSS_IPV6_PRE64_TCP ( \ 738 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 739 RTE_ETH_RSS_L3_PRE64) 741 #define RTE_ETH_RSS_IPV6_PRE96_TCP ( \ 742 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 743 RTE_ETH_RSS_L3_PRE96) 745 #define RTE_ETH_RSS_IPV6_PRE32_SCTP ( \ 746 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 747 RTE_ETH_RSS_L3_PRE32) 749 #define RTE_ETH_RSS_IPV6_PRE40_SCTP ( \ 750 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 751 RTE_ETH_RSS_L3_PRE40) 753 #define RTE_ETH_RSS_IPV6_PRE48_SCTP ( \ 754 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 755 RTE_ETH_RSS_L3_PRE48) 757 #define RTE_ETH_RSS_IPV6_PRE56_SCTP ( \ 758 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 759 RTE_ETH_RSS_L3_PRE56) 761 #define RTE_ETH_RSS_IPV6_PRE64_SCTP ( \ 762 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 763 RTE_ETH_RSS_L3_PRE64) 765 #define RTE_ETH_RSS_IPV6_PRE96_SCTP ( \ 766 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 767 RTE_ETH_RSS_L3_PRE96) 769 #define RTE_ETH_RSS_IP ( \ 771 RTE_ETH_RSS_FRAG_IPV4 | \ 772 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \ 774 RTE_ETH_RSS_FRAG_IPV6 | \ 775 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \ 778 #define RTE_ETH_RSS_UDP ( \ 779 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \ 780 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 781 RTE_ETH_RSS_IPV6_UDP_EX) 783 #define RTE_ETH_RSS_TCP ( \ 784 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \ 785 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 786 RTE_ETH_RSS_IPV6_TCP_EX) 788 #define RTE_ETH_RSS_SCTP ( \ 789 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \ 790 RTE_ETH_RSS_NONFRAG_IPV6_SCTP) 792 #define RTE_ETH_RSS_TUNNEL ( \ 793 RTE_ETH_RSS_VXLAN | \ 794 RTE_ETH_RSS_GENEVE | \ 797 #define RTE_ETH_RSS_VLAN ( \ 798 RTE_ETH_RSS_S_VLAN | \ 802 #define RTE_ETH_RSS_PROTO_MASK ( \ 804 RTE_ETH_RSS_FRAG_IPV4 | \ 805 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \ 806 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \ 807 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \ 808 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \ 810 RTE_ETH_RSS_FRAG_IPV6 | \ 811 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 812 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 813 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \ 814 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \ 815 RTE_ETH_RSS_L2_PAYLOAD | \ 816 RTE_ETH_RSS_IPV6_EX | \ 817 RTE_ETH_RSS_IPV6_TCP_EX | \ 818 RTE_ETH_RSS_IPV6_UDP_EX | \ 820 RTE_ETH_RSS_VXLAN | \ 821 RTE_ETH_RSS_GENEVE | \ 822 RTE_ETH_RSS_NVGRE | \ 830 #define RTE_ETH_RSS_RETA_SIZE_64 64 831 #define RTE_ETH_RSS_RETA_SIZE_128 128 832 #define RTE_ETH_RSS_RETA_SIZE_256 256 833 #define RTE_ETH_RSS_RETA_SIZE_512 512 834 #define RTE_ETH_RETA_GROUP_SIZE 64 837 #define RTE_ETH_VMDQ_MAX_VLAN_FILTERS 64 838 #define RTE_ETH_DCB_NUM_USER_PRIORITIES 8 839 #define RTE_ETH_VMDQ_DCB_NUM_QUEUES 128 840 #define RTE_ETH_DCB_NUM_QUEUES 128 844 #define RTE_ETH_DCB_PG_SUPPORT RTE_BIT32(0) 845 #define RTE_ETH_DCB_PFC_SUPPORT RTE_BIT32(1) 849 #define RTE_ETH_VLAN_STRIP_OFFLOAD 0x0001 850 #define RTE_ETH_VLAN_FILTER_OFFLOAD 0x0002 851 #define RTE_ETH_VLAN_EXTEND_OFFLOAD 0x0004 852 #define RTE_ETH_QINQ_STRIP_OFFLOAD 0x0008 854 #define RTE_ETH_VLAN_STRIP_MASK 0x0001 855 #define RTE_ETH_VLAN_FILTER_MASK 0x0002 856 #define RTE_ETH_VLAN_EXTEND_MASK 0x0004 857 #define RTE_ETH_QINQ_STRIP_MASK 0x0008 858 #define RTE_ETH_VLAN_ID_MAX 0x0FFF 862 #define RTE_ETH_NUM_RECEIVE_MAC_ADDR 128 865 #define RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY 128 871 #define RTE_ETH_VMDQ_ACCEPT_UNTAG RTE_BIT32(0) 873 #define RTE_ETH_VMDQ_ACCEPT_HASH_MC RTE_BIT32(1) 875 #define RTE_ETH_VMDQ_ACCEPT_HASH_UC RTE_BIT32(2) 877 #define RTE_ETH_VMDQ_ACCEPT_BROADCAST RTE_BIT32(3) 879 #define RTE_ETH_VMDQ_ACCEPT_MULTICAST RTE_BIT32(4) 892 uint16_t reta[RTE_ETH_RETA_GROUP_SIZE];
916 struct rte_eth_dcb_rx_conf {
922 struct rte_eth_vmdq_dcb_tx_conf {
928 struct rte_eth_dcb_tx_conf {
934 struct rte_eth_vmdq_tx_conf {
1008 hw_vlan_reject_tagged : 1,
1012 hw_vlan_insert_pvid : 1;
1014 uint64_t reserved_64s[2];
1015 void *reserved_ptrs[2];
1160 uint16_t rx_nmempool;
1162 uint64_t reserved_64s[2];
1163 void *reserved_ptrs[2];
1183 uint64_t reserved_64s[2];
1184 void *reserved_ptrs[2];
1227 #define RTE_ETH_MAX_HAIRPIN_PEERS 32 1441 RTE_ETH_TUNNEL_TYPE_NONE = 0,
1442 RTE_ETH_TUNNEL_TYPE_VXLAN,
1443 RTE_ETH_TUNNEL_TYPE_GENEVE,
1444 RTE_ETH_TUNNEL_TYPE_TEREDO,
1445 RTE_ETH_TUNNEL_TYPE_NVGRE,
1446 RTE_ETH_TUNNEL_TYPE_IP_IN_GRE,
1447 RTE_ETH_L2_TUNNEL_TYPE_E_TAG,
1448 RTE_ETH_TUNNEL_TYPE_VXLAN_GPE,
1449 RTE_ETH_TUNNEL_TYPE_ECPRI,
1450 RTE_ETH_TUNNEL_TYPE_MAX,
1482 #define rte_intr_conf rte_eth_intr_conf 1509 struct rte_eth_dcb_rx_conf dcb_rx_conf;
1515 struct rte_eth_vmdq_dcb_tx_conf vmdq_dcb_tx_conf;
1517 struct rte_eth_dcb_tx_conf dcb_tx_conf;
1519 struct rte_eth_vmdq_tx_conf vmdq_tx_conf;
1530 #define RTE_ETH_RX_OFFLOAD_VLAN_STRIP RTE_BIT64(0) 1531 #define RTE_ETH_RX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1) 1532 #define RTE_ETH_RX_OFFLOAD_UDP_CKSUM RTE_BIT64(2) 1533 #define RTE_ETH_RX_OFFLOAD_TCP_CKSUM RTE_BIT64(3) 1534 #define RTE_ETH_RX_OFFLOAD_TCP_LRO RTE_BIT64(4) 1535 #define RTE_ETH_RX_OFFLOAD_QINQ_STRIP RTE_BIT64(5) 1536 #define RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(6) 1537 #define RTE_ETH_RX_OFFLOAD_MACSEC_STRIP RTE_BIT64(7) 1538 #define RTE_ETH_RX_OFFLOAD_VLAN_FILTER RTE_BIT64(9) 1539 #define RTE_ETH_RX_OFFLOAD_VLAN_EXTEND RTE_BIT64(10) 1540 #define RTE_ETH_RX_OFFLOAD_SCATTER RTE_BIT64(13) 1546 #define RTE_ETH_RX_OFFLOAD_TIMESTAMP RTE_BIT64(14) 1547 #define RTE_ETH_RX_OFFLOAD_SECURITY RTE_BIT64(15) 1548 #define RTE_ETH_RX_OFFLOAD_KEEP_CRC RTE_BIT64(16) 1549 #define RTE_ETH_RX_OFFLOAD_SCTP_CKSUM RTE_BIT64(17) 1550 #define RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(18) 1551 #define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19) 1552 #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20) 1554 #define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \ 1555 RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \ 1556 RTE_ETH_RX_OFFLOAD_TCP_CKSUM) 1557 #define RTE_ETH_RX_OFFLOAD_VLAN (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \ 1558 RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \ 1559 RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \ 1560 RTE_ETH_RX_OFFLOAD_QINQ_STRIP) 1570 #define RTE_ETH_TX_OFFLOAD_VLAN_INSERT RTE_BIT64(0) 1571 #define RTE_ETH_TX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1) 1572 #define RTE_ETH_TX_OFFLOAD_UDP_CKSUM RTE_BIT64(2) 1573 #define RTE_ETH_TX_OFFLOAD_TCP_CKSUM RTE_BIT64(3) 1574 #define RTE_ETH_TX_OFFLOAD_SCTP_CKSUM RTE_BIT64(4) 1575 #define RTE_ETH_TX_OFFLOAD_TCP_TSO RTE_BIT64(5) 1576 #define RTE_ETH_TX_OFFLOAD_UDP_TSO RTE_BIT64(6) 1577 #define RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(7) 1578 #define RTE_ETH_TX_OFFLOAD_QINQ_INSERT RTE_BIT64(8) 1579 #define RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO RTE_BIT64(9) 1580 #define RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO RTE_BIT64(10) 1581 #define RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO RTE_BIT64(11) 1582 #define RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO RTE_BIT64(12) 1583 #define RTE_ETH_TX_OFFLOAD_MACSEC_INSERT RTE_BIT64(13) 1588 #define RTE_ETH_TX_OFFLOAD_MT_LOCKFREE RTE_BIT64(14) 1590 #define RTE_ETH_TX_OFFLOAD_MULTI_SEGS RTE_BIT64(15) 1596 #define RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE RTE_BIT64(16) 1597 #define RTE_ETH_TX_OFFLOAD_SECURITY RTE_BIT64(17) 1603 #define RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO RTE_BIT64(18) 1609 #define RTE_ETH_TX_OFFLOAD_IP_TNL_TSO RTE_BIT64(19) 1611 #define RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(20) 1617 #define RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP RTE_BIT64(21) 1627 #define RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP RTE_BIT64(0) 1629 #define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP RTE_BIT64(1) 1639 #define RTE_ETH_DEV_CAPA_RXQ_SHARE RTE_BIT64(2) 1641 #define RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP RTE_BIT64(3) 1643 #define RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP RTE_BIT64(4) 1651 #define RTE_ETH_DEV_FALLBACK_RX_RINGSIZE 512 1652 #define RTE_ETH_DEV_FALLBACK_TX_RINGSIZE 512 1653 #define RTE_ETH_DEV_FALLBACK_RX_NBQUEUES 1 1654 #define RTE_ETH_DEV_FALLBACK_TX_NBQUEUES 1 1671 #define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID (UINT16_MAX) 1790 uint32_t rss_algo_capa;
1825 uint64_t reserved_64s[2];
1826 void *reserved_ptrs[2];
1830 #define RTE_ETH_QUEUE_STATE_STOPPED 0 1831 #define RTE_ETH_QUEUE_STATE_STARTED 1 1832 #define RTE_ETH_QUEUE_STATE_HAIRPIN 2 1839 struct __rte_cache_min_aligned rte_eth_rxq_info { 1896 #define RTE_ETH_BURST_FLAG_PER_QUEUE RTE_BIT64(0) 1905 #define RTE_ETH_BURST_MODE_INFO_SIZE 1024 1906 char info[RTE_ETH_BURST_MODE_INFO_SIZE]; 1910 #define RTE_ETH_XSTATS_NAME_SIZE 64 1944 #define RTE_ETH_DCB_NUM_TCS 8 1945 #define RTE_ETH_MAX_VMDQ_POOL 64 1956 } tc_rxq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1961 } tc_txq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1971 uint8_t tc_bws[RTE_ETH_DCB_NUM_TCS];
1989 #define RTE_ETH_FEC_MODE_TO_CAPA(x) RTE_BIT32(x) 1992 #define RTE_ETH_FEC_MODE_CAPA_MASK(x) RTE_BIT32(RTE_ETH_FEC_ ## x) 1995 struct rte_eth_fec_capa {
2000 #define RTE_ETH_ALL RTE_MAX_ETHPORTS 2003 #define RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, retval) do { \ 2004 if (!rte_eth_dev_is_valid_port(port_id)) { \ 2005 RTE_ETHDEV_LOG_LINE(ERR, "Invalid port_id=%u", port_id); \ 2010 #define RTE_ETH_VALID_PORTID_OR_RET(port_id) do { \ 2011 if (!rte_eth_dev_is_valid_port(port_id)) { \ 2012 RTE_ETHDEV_LOG_LINE(ERR, "Invalid port_id=%u", port_id); \ 2040 struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts,
2064 struct rte_mbuf *pkts[], uint16_t nb_pkts,
void *user_param);
2078 struct rte_eth_dev_sriov {
2080 uint8_t nb_q_per_pool;
2081 uint16_t def_vmdq_idx;
2082 uint16_t def_pool_q_idx;
2084 #define RTE_ETH_DEV_SRIOV(dev) ((dev)->data->sriov) 2086 #define RTE_ETH_NAME_MAX_LEN RTE_DEV_NAME_MAX_LEN 2088 #define RTE_ETH_DEV_NO_OWNER 0 2090 #define RTE_ETH_MAX_OWNER_NAME_LEN 64 2092 struct rte_eth_dev_owner {
2094 char name[RTE_ETH_MAX_OWNER_NAME_LEN];
2102 #define RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE RTE_BIT32(0) 2104 #define RTE_ETH_DEV_INTR_LSC RTE_BIT32(1) 2106 #define RTE_ETH_DEV_BONDING_MEMBER RTE_BIT32(2) 2108 #define RTE_ETH_DEV_INTR_RMV RTE_BIT32(3) 2110 #define RTE_ETH_DEV_REPRESENTOR RTE_BIT32(4) 2112 #define RTE_ETH_DEV_NOLIVE_MAC_ADDR RTE_BIT32(5) 2117 #define RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS RTE_BIT32(6) 2132 const uint64_t owner_id);
2137 #define RTE_ETH_FOREACH_DEV_OWNED_BY(p, o) \ 2138 for (p = rte_eth_find_next_owned_by(0, o); \ 2139 (unsigned int)p < (unsigned int)RTE_MAX_ETHPORTS; \ 2140 p = rte_eth_find_next_owned_by(p + 1, o)) 2155 #define RTE_ETH_FOREACH_DEV(p) \ 2156 RTE_ETH_FOREACH_DEV_OWNED_BY(p, RTE_ETH_DEV_NO_OWNER) 2171 const struct rte_device *parent);
2181 #define RTE_ETH_FOREACH_DEV_OF(port_id, parent) \ 2182 for (port_id = rte_eth_find_next_of(0, parent); \ 2183 port_id < RTE_MAX_ETHPORTS; \ 2184 port_id = rte_eth_find_next_of(port_id + 1, parent)) 2210 #define RTE_ETH_FOREACH_DEV_SIBLING(port_id, ref_port_id) \ 2211 for (port_id = rte_eth_find_next_sibling(0, ref_port_id); \ 2212 port_id < RTE_MAX_ETHPORTS; \ 2213 port_id = rte_eth_find_next_sibling(port_id + 1, ref_port_id)) 2238 const struct rte_eth_dev_owner *owner);
2251 const uint64_t owner_id);
2274 struct rte_eth_dev_owner *owner);
2385 uint16_t nb_tx_queue,
const struct rte_eth_conf *eth_conf);
2461 uint16_t nb_rx_desc,
unsigned int socket_id,
2494 (uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc,
2546 uint16_t nb_tx_desc,
unsigned int socket_id,
2576 (uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc,
2607 size_t len, uint32_t direction);
3110 const struct rte_eth_link *eth_link);
3267 uint64_t *values,
unsigned int size);
3324 uint16_t tx_queue_id, uint8_t stat_idx);
3345 uint16_t rx_queue_id,
3447 char *fw_version,
size_t fw_size);
3489 uint32_t *ptypes,
int num);
3521 uint32_t *set_ptypes,
unsigned int num);
3695 uint8_t avail_thresh);
3725 uint8_t *avail_thresh);
3727 typedef void (*buffer_tx_error_fn)(
struct rte_mbuf **unsent, uint16_t count,
3735 buffer_tx_error_fn error_callback;
3736 void *error_userdata;
3749 #define RTE_ETH_TX_BUFFER_SIZE(sz) \ 3750 (sizeof(struct rte_eth_dev_tx_buffer) + (sz) * sizeof(struct rte_mbuf *)) 3791 buffer_tx_error_fn callback,
void *userdata);
4239 int epfd,
int op,
void *data);
4318 struct rte_eth_fec_capa *speed_fec_capa,
4506 struct rte_ether_addr *mac_addr);
4526 struct rte_ether_addr *mac_addr);
4547 uint16_t reta_size);
4569 uint16_t reta_size);
4772 struct rte_eth_rxtx_callback;
4799 const struct rte_eth_rxtx_callback *
4829 const struct rte_eth_rxtx_callback *
4858 const struct rte_eth_rxtx_callback *
4896 const struct rte_eth_rxtx_callback *user_cb);
4932 const struct rte_eth_rxtx_callback *user_cb);
5067 struct rte_power_monitor_cond *pmc);
5184 struct rte_dev_eeprom_info *info);
5206 struct rte_ether_addr *mc_addr_set,
5207 uint32_t nb_mc_addr);
5256 struct timespec *timestamp, uint32_t flags);
5274 struct timespec *timestamp);
5435 uint16_t *nb_rx_desc,
5436 uint16_t *nb_tx_desc);
5503 char name[RTE_DEV_NAME_MAX_LEN];
5548 #define RTE_ETH_RX_METADATA_USER_FLAG RTE_BIT64(0) 5551 #define RTE_ETH_RX_METADATA_USER_MARK RTE_BIT64(1) 5554 #define RTE_ETH_RX_METADATA_TUNNEL_ID RTE_BIT64(2) 5598 #define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0)) 5600 #define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1)) 5769 uint16_t offset, uint16_t num, FILE *file);
5796 uint16_t offset, uint16_t num, FILE *file);
5861 uint8_t rsvd_obj_params[4];
5876 uint8_t rsvd_mode_params[4];
5987 uint16_t rte_eth_call_rx_callbacks(uint16_t port_id, uint16_t queue_id,
5988 struct rte_mbuf **rx_pkts, uint16_t nb_rx, uint16_t nb_pkts,
6078 static inline uint16_t
6080 struct rte_mbuf **rx_pkts,
const uint16_t nb_pkts)
6083 struct rte_eth_fp_ops *p;
6086 #ifdef RTE_ETHDEV_DEBUG_RX 6087 if (port_id >= RTE_MAX_ETHPORTS ||
6088 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6089 RTE_ETHDEV_LOG_LINE(ERR,
6090 "Invalid port_id=%u or queue_id=%u",
6097 p = &rte_eth_fp_ops[port_id];
6098 qd = p->rxq.data[queue_id];
6100 #ifdef RTE_ETHDEV_DEBUG_RX 6101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
6104 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Rx queue_id=%u for port_id=%u",
6110 nb_rx = p->rx_pkt_burst(qd, rx_pkts, nb_pkts);
6112 #ifdef RTE_ETHDEV_RXTX_CALLBACKS 6122 cb = rte_atomic_load_explicit(&p->rxq.clbk[queue_id],
6123 rte_memory_order_relaxed);
6125 nb_rx = rte_eth_call_rx_callbacks(port_id, queue_id,
6126 rx_pkts, nb_rx, nb_pkts, cb);
6130 rte_ethdev_trace_rx_burst(port_id, queue_id, (
void **)rx_pkts, nb_rx);
6154 struct rte_eth_fp_ops *p;
6157 #ifdef RTE_ETHDEV_DEBUG_RX 6158 if (port_id >= RTE_MAX_ETHPORTS ||
6159 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6160 RTE_ETHDEV_LOG_LINE(ERR,
6161 "Invalid port_id=%u or queue_id=%u",
6168 p = &rte_eth_fp_ops[port_id];
6169 qd = p->rxq.data[queue_id];
6171 #ifdef RTE_ETHDEV_DEBUG_RX 6172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6177 if (*p->rx_queue_count == NULL)
6179 return (
int)(*p->rx_queue_count)(qd);
6185 #define RTE_ETH_RX_DESC_AVAIL 0 6186 #define RTE_ETH_RX_DESC_DONE 1 6187 #define RTE_ETH_RX_DESC_UNAVAIL 2 6227 struct rte_eth_fp_ops *p;
6230 #ifdef RTE_ETHDEV_DEBUG_RX 6231 if (port_id >= RTE_MAX_ETHPORTS ||
6232 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6233 RTE_ETHDEV_LOG_LINE(ERR,
6234 "Invalid port_id=%u or queue_id=%u",
6241 p = &rte_eth_fp_ops[port_id];
6242 qd = p->rxq.data[queue_id];
6244 #ifdef RTE_ETHDEV_DEBUG_RX 6245 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6249 if (*p->rx_descriptor_status == NULL)
6251 return (*p->rx_descriptor_status)(qd, offset);
6257 #define RTE_ETH_TX_DESC_FULL 0 6258 #define RTE_ETH_TX_DESC_DONE 1 6259 #define RTE_ETH_TX_DESC_UNAVAIL 2 6295 static inline int rte_eth_tx_descriptor_status(uint16_t port_id, 6296 uint16_t queue_id, uint16_t offset)
6298 struct rte_eth_fp_ops *p;
6301 #ifdef RTE_ETHDEV_DEBUG_TX 6302 if (port_id >= RTE_MAX_ETHPORTS ||
6303 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6304 RTE_ETHDEV_LOG_LINE(ERR,
6305 "Invalid port_id=%u or queue_id=%u",
6312 p = &rte_eth_fp_ops[port_id];
6313 qd = p->txq.data[queue_id];
6315 #ifdef RTE_ETHDEV_DEBUG_TX 6316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6320 if (*p->tx_descriptor_status == NULL)
6322 return (*p->tx_descriptor_status)(qd, offset);
6344 uint16_t rte_eth_call_tx_callbacks(uint16_t port_id, uint16_t queue_id,
6345 struct rte_mbuf **tx_pkts, uint16_t nb_pkts,
void *opaque);
6418 static inline uint16_t
6420 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6422 struct rte_eth_fp_ops *p;
6425 #ifdef RTE_ETHDEV_DEBUG_TX 6426 if (port_id >= RTE_MAX_ETHPORTS ||
6427 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6428 RTE_ETHDEV_LOG_LINE(ERR,
6429 "Invalid port_id=%u or queue_id=%u",
6436 p = &rte_eth_fp_ops[port_id];
6437 qd = p->txq.data[queue_id];
6439 #ifdef RTE_ETHDEV_DEBUG_TX 6440 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
6443 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Tx queue_id=%u for port_id=%u",
6449 #ifdef RTE_ETHDEV_RXTX_CALLBACKS 6459 cb = rte_atomic_load_explicit(&p->txq.clbk[queue_id],
6460 rte_memory_order_relaxed);
6462 nb_pkts = rte_eth_call_tx_callbacks(port_id, queue_id,
6463 tx_pkts, nb_pkts, cb);
6467 nb_pkts = p->tx_pkt_burst(qd, tx_pkts, nb_pkts);
6469 rte_ethdev_trace_tx_burst(port_id, queue_id, (
void **)tx_pkts, nb_pkts);
6526 #ifndef RTE_ETHDEV_TX_PREPARE_NOOP 6528 static inline uint16_t
6530 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6532 struct rte_eth_fp_ops *p;
6535 #ifdef RTE_ETHDEV_DEBUG_TX 6536 if (port_id >= RTE_MAX_ETHPORTS ||
6537 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6538 RTE_ETHDEV_LOG_LINE(ERR,
6539 "Invalid port_id=%u or queue_id=%u",
6547 p = &rte_eth_fp_ops[port_id];
6548 qd = p->txq.data[queue_id];
6550 #ifdef RTE_ETHDEV_DEBUG_TX 6552 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Tx port_id=%u", port_id);
6557 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Tx queue_id=%u for port_id=%u",
6564 if (!p->tx_pkt_prepare)
6567 return p->tx_pkt_prepare(qd, tx_pkts, nb_pkts);
6581 static inline uint16_t
6613 static inline uint16_t
6618 uint16_t to_send = buffer->
length;
6629 buffer->error_callback(&buffer->
pkts[sent],
6630 (uint16_t)(to_send - sent),
6631 buffer->error_userdata);
6731 static inline uint16_t
6733 uint16_t tx_port_id, uint16_t tx_queue_id,
6736 struct rte_eth_fp_ops *p1, *p2;
6740 #ifdef RTE_ETHDEV_DEBUG_TX 6741 if (tx_port_id >= RTE_MAX_ETHPORTS ||
6742 tx_queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6743 RTE_ETHDEV_LOG_LINE(ERR,
6744 "Invalid tx_port_id=%u or tx_queue_id=%u",
6745 tx_port_id, tx_queue_id);
6751 p1 = &rte_eth_fp_ops[tx_port_id];
6752 qd1 = p1->txq.data[tx_queue_id];
6754 #ifdef RTE_ETHDEV_DEBUG_TX 6755 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port_id, 0);
6758 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Tx queue_id=%u for port_id=%u",
6759 tx_queue_id, tx_port_id);
6763 if (p1->recycle_tx_mbufs_reuse == NULL)
6766 #ifdef RTE_ETHDEV_DEBUG_RX 6767 if (rx_port_id >= RTE_MAX_ETHPORTS ||
6768 rx_queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6769 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid rx_port_id=%u or rx_queue_id=%u",
6770 rx_port_id, rx_queue_id);
6776 p2 = &rte_eth_fp_ops[rx_port_id];
6777 qd2 = p2->rxq.data[rx_queue_id];
6779 #ifdef RTE_ETHDEV_DEBUG_RX 6780 RTE_ETH_VALID_PORTID_OR_ERR_RET(rx_port_id, 0);
6783 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Rx queue_id=%u for port_id=%u",
6784 rx_queue_id, rx_port_id);
6788 if (p2->recycle_rx_descriptors_refill == NULL)
6794 nb_mbufs = p1->recycle_tx_mbufs_reuse(qd1, recycle_rxq_info);
6803 p2->recycle_rx_descriptors_refill(qd2, nb_mbufs);
6877 struct rte_eth_fp_ops *fops;
6881 #ifdef RTE_ETHDEV_DEBUG_TX 6883 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid port_id=%u", port_id);
6888 if (queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6889 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid queue_id=%u for port_id=%u",
6897 fops = &rte_eth_fp_ops[port_id];
6898 qd = fops->txq.data[queue_id];
6900 #ifdef RTE_ETHDEV_DEBUG_TX 6902 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid queue_id=%u for port_id=%u",
6908 if (fops->tx_queue_count == NULL) {
6913 rc = fops->tx_queue_count(qd);
6916 rte_eth_trace_tx_queue_count(port_id, queue_id, rc);
int rte_eth_dev_stop(uint16_t port_id)
int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id, struct rte_eth_pfc_conf *pfc_conf)
int rte_eth_promiscuous_disable(uint16_t port_id)
__extension__ uint32_t multi_pools
int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
__rte_experimental int rte_eth_tx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
__extension__ struct __rte_aligned(8) rte_eth_link
#define __rte_always_inline
#define RTE_ETH_DCB_NUM_USER_PRIORITIES
uint16_t rte_eth_dev_count_avail(void)
int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time)
rte_eth_event_macsec_type
const uint32_t * dev_flags
int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time)
uint64_t rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
__rte_experimental int rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)
int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue, uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf)
int rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
static uint16_t rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
struct rte_device * device
const struct rte_eth_rxtx_callback * rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS]
static __rte_experimental int rte_eth_tx_queue_count(uint16_t port_id, uint16_t queue_id)
uint16_t rte_eth_find_next(uint16_t port_id)
__rte_experimental int rte_eth_rx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
int rte_eth_led_off(uint16_t port_id)
int rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
static int rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id, uint16_t offset)
uint32_t locked_device_memory
__rte_experimental int rte_eth_dev_hairpin_capability_get(uint16_t port_id, struct rte_eth_hairpin_cap *cap)
__rte_experimental int rte_eth_dev_map_aggr_tx_affinity(uint16_t port_id, uint16_t tx_queue_id, uint8_t affinity)
int rte_eth_dev_rss_reta_update(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
static __rte_experimental uint16_t rte_eth_recycle_mbufs(uint16_t rx_port_id, uint16_t rx_queue_id, uint16_t tx_port_id, uint16_t tx_queue_id, struct rte_eth_recycle_rxq_info *recycle_rxq_info)
int rte_eth_dev_rss_hash_update(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
__rte_experimental int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
uint64_t rx_queue_offload_capa
int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats, unsigned int n)
__rte_experimental int rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
__rte_experimental int rte_eth_dev_count_aggr_ports(uint16_t port_id)
int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs)
int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id, int epfd, int op, void *data)
int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
uint64_t tx_queue_offload_capa
uint8_t enable_default_pool
uint32_t max_hash_mac_addrs
int rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
uint16_t rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id)
uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
int rte_eth_dev_get_eeprom_length(uint16_t port_id)
int rte_eth_dev_close(uint16_t port_id)
int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id)
__rte_experimental int rte_eth_rx_avail_thresh_set(uint16_t port_id, uint16_t queue_id, uint8_t avail_thresh)
int rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id, uint8_t stat_idx)
int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_txq_info *qinfo)
__rte_experimental const char * rte_eth_dev_rss_algo_name(enum rte_eth_hash_function rss_algo)
int rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
__rte_experimental int rte_eth_dev_get_module_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
uint32_t dcb_capability_en
uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
__rte_experimental int rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)
int rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
int rte_eth_dev_callback_unregister(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
int rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
int rte_eth_dev_set_link_up(uint16_t port_id)
int rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp, uint32_t flags)
__rte_experimental int rte_eth_tx_queue_is_valid(uint16_t port_id, uint16_t queue_id)
int rte_eth_dev_get_vlan_offload(uint16_t port_id)
int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, unsigned int socket_id, const struct rte_eth_txconf *tx_conf)
int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
uint8_t rx_deferred_start
int(* rte_eth_dev_cb_fn)(uint16_t port_id, enum rte_eth_event_type event, void *cb_arg, void *ret_param)
uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
#define RTE_ETH_MQ_RX_RSS_FLAG
uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex)
int rte_eth_dev_owner_set(const uint16_t port_id, const struct rte_eth_dev_owner *owner)
#define RTE_ETH_XSTATS_NAME_SIZE
int rte_eth_dev_rss_hash_conf_get(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
__rte_experimental int rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma, unsigned int num)
int rte_eth_timesync_disable(uint16_t port_id)
int rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *mac_addr)
__rte_experimental int rte_eth_rx_avail_thresh_query(uint16_t port_id, uint16_t *queue_id, uint8_t *avail_thresh)
__rte_experimental int rte_eth_representor_info_get(uint16_t port_id, struct rte_eth_representor_info *info)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id, struct rte_eth_pfc_queue_conf *pfc_queue_conf)
void rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
void * rte_eth_dev_get_sec_ctx(uint16_t port_id)
__rte_experimental int rte_eth_fec_get_capability(uint16_t port_id, struct rte_eth_fec_capa *speed_fec_capa, unsigned int num)
struct rte_mempool ** rx_mempools
int rte_eth_stats_reset(uint16_t port_id)
int rte_eth_allmulticast_enable(uint16_t port_id)
__rte_experimental int rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id, struct rte_power_monitor_cond *pmc)
uint32_t offset_align_log2
int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *set_ptypes, unsigned int num)
void rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
int rte_eth_dev_udp_tunnel_port_add(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
#define __rte_cache_min_aligned
__rte_experimental int rte_eth_buffer_split_get_supported_hdr_ptypes(uint16_t port_id, uint32_t *ptypes, int num)
uint16_t rte_eth_find_next_of(uint16_t port_id_start, const struct rte_device *parent)
int rte_eth_dev_callback_register(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
static uint16_t rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
int rte_eth_allmulticast_disable(uint16_t port_id)
__rte_experimental int rte_eth_dev_get_module_info(uint16_t port_id, struct rte_eth_dev_module_info *modinfo)
int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id, int on)
int rte_eth_dev_start(uint16_t port_id)
__rte_experimental int rte_eth_cman_config_get(uint16_t port_id, struct rte_eth_cman_config *config)
__rte_experimental int rte_eth_ip_reassembly_capability_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *capa)
int rte_eth_dev_reset(uint16_t port_id)
int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids, uint64_t *values, unsigned int size)
#define RTE_ETH_MQ_RX_DCB_FLAG
__rte_experimental int rte_eth_ip_reassembly_conf_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *conf)
int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id)
int rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer, buffer_tx_error_fn callback, void *userdata)
void rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
int rte_eth_dev_is_removed(uint16_t port_id)
uint16_t(* rte_tx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param)
int rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
__rte_experimental int rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
int rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id, uint16_t *nb_rx_desc, uint16_t *nb_tx_desc)
int rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *mac_addr)
__rte_experimental int rte_eth_recycle_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_recycle_rxq_info *recycle_rxq_info)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id, struct rte_eth_pfc_queue_info *pfc_queue_info)
int rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr, uint32_t pool)
int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
struct rte_mbuf * next_frag
int rte_eth_xstats_reset(uint16_t port_id)
#define RTE_ETH_MQ_RX_VMDQ_FLAG
__rte_experimental int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports, size_t len, uint32_t direction)
uint16_t refill_requirement
int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name, uint64_t *id)
int rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
const struct rte_eth_rxtx_callback * rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id, rte_tx_callback_fn fn, void *user_param)
uint64_t flow_type_rss_offloads
#define RTE_ETH_VMDQ_MAX_VLAN_FILTERS
uint16_t rte_eth_dev_count_total(void)
int rte_eth_promiscuous_enable(uint16_t port_id)
int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
union rte_eth_rxseg * rx_seg
int rte_eth_dev_owner_new(uint64_t *owner_id)
const char * rte_eth_dev_tx_offload_name(uint64_t offload)
__rte_experimental int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link)
int rte_eth_dev_owner_delete(const uint64_t owner_id)
rte_eth_event_macsec_subtype
static __rte_always_inline uint16_t rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
__extension__ uint8_t hw_vlan_reject_untagged
int rte_eth_dev_set_mc_addr_list(uint16_t port_id, struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr)
uint32_t use_locked_device_memory
int rte_eth_dev_get_dcb_info(uint16_t port_id, struct rte_eth_dcb_info *dcb_info)
rte_eth_event_ipsec_subtype
int rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id, uint8_t stat_idx)
int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
__rte_experimental const char * rte_eth_link_speed_to_str(uint32_t link_speed)
static int rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_rxq_info *qinfo)
__rte_experimental int rte_eth_find_rss_algo(const char *name, uint32_t *algo)
int rte_eth_dev_socket_id(uint16_t port_id)
int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx, uint32_t tx_rate)
struct rte_mbuf ** mbuf_ring
uint8_t enable_default_pool
int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link)
int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
int rte_eth_dev_set_vlan_ether_type(uint16_t port_id, enum rte_vlan_type vlan_type, uint16_t tag_type)
int rte_eth_xstats_get_names_by_id(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size, uint64_t *ids)
__rte_experimental const char * rte_eth_dev_capability_name(uint64_t capability)
__rte_experimental int rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, const struct rte_eth_hairpin_conf *conf)
static uint64_t rte_eth_rss_hf_refine(uint64_t rss_hf)
__rte_experimental int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
__rte_experimental int rte_eth_ip_reassembly_conf_set(uint16_t port_id, const struct rte_eth_ip_reassembly_params *conf)
int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr, uint8_t on)
__rte_experimental int rte_eth_cman_config_init(uint16_t port_id, struct rte_eth_cman_config *config)
int rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
int rte_eth_dev_rss_reta_query(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
int rte_eth_promiscuous_get(uint16_t port_id)
int rte_eth_led_on(uint16_t port_id)
int rte_eth_timesync_read_tx_timestamp(uint16_t port_id, struct timespec *timestamp)
int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *ptypes, int num)
__rte_experimental int rte_eth_rx_queue_is_valid(uint16_t port_id, uint16_t queue_id)
int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
__rte_experimental int rte_eth_cman_config_set(uint16_t port_id, const struct rte_eth_cman_config *config)
__rte_experimental int rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, const struct rte_eth_hairpin_conf *conf)
uint8_t mac_ctrl_frame_fwd
uint16_t(* rte_rx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts, void *user_param)
int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
uint8_t tx_deferred_start
int rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
uint32_t max_lro_pkt_size
int rte_eth_xstats_get_names(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size)
const struct rte_eth_rxtx_callback * rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
int rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
int rte_eth_allmulticast_get(uint16_t port_id)
int rte_eth_dev_is_valid_port(uint16_t port_id)
int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
uint32_t max_lro_pkt_size
int rte_eth_timesync_enable(uint16_t port_id)
static uint16_t rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
__rte_experimental int rte_eth_cman_info_get(uint16_t port_id, struct rte_eth_cman_info *info)
int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
int rte_eth_dev_set_link_down(uint16_t port_id)
int rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
uint16_t rte_eth_iterator_next(struct rte_dev_iterator *iter)
__rte_experimental int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
const char * rte_eth_dev_rx_offload_name(uint64_t offload)
static uint16_t rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer)
int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id, const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mb_pool)