rte_power_intrinsics.h File Reference

#include <inttypes.h>
#include <rte_spinlock.h>

Go to the source code of this file.

Macros
#define	RTE_POWER_MONITOR_OPAQUE_SZ   4

Typedefs
typedef int(*	rte_power_monitor_clb_t) (const uint64_t val, const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])

Functions
int	rte_power_monitor (const struct rte_power_monitor_cond *pmc, const uint64_t tsc_timestamp)
int	rte_power_monitor_wakeup (const unsigned int lcore_id)
int	rte_power_pause (const uint64_t tsc_timestamp)
int	rte_power_monitor_multi (const struct rte_power_monitor_cond pmc[], const uint32_t num, const uint64_t tsc_timestamp)

Detailed Description

Advanced power management operations.

This file define APIs for advanced power management, which are architecture-dependent.

Definition in file rte_power_intrinsics.h.

Macro Definition Documentation

RTE_POWER_MONITOR_OPAQUE_SZ

#define RTE_POWER_MONITOR_OPAQUE_SZ   4

Size of the opaque data in monitor condition

Definition at line 25 of file rte_power_intrinsics.h.

Typedef Documentation

rte_power_monitor_clb_t

typedef int(* rte_power_monitor_clb_t) (const uint64_t val, const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])

Callback definition for monitoring conditions. Callbacks with this signature will be used by rte_power_monitor() to check if the entering of power optimized state should be aborted.

Parameters

val	The value read from memory.
opaque	Callback-specific data.

Returns

0 if entering of power optimized state should proceed -1 if entering of power optimized state should be aborted

Definition at line 41 of file rte_power_intrinsics.h.

Function Documentation

rte_power_monitor()

int rte_power_monitor	(	const struct rte_power_monitor_cond *	pmc,
		const uint64_t	tsc_timestamp
	)

Monitor specific address for changes. This will cause the CPU to enter an architecture-defined optimized power state until either the specified memory address is written to, a certain TSC timestamp is reached, or other reasons cause the CPU to wake up.

Additionally, an expected value (pmc->val), mask (pmc->mask), and data size (pmc->size) are provided in the pmc power monitoring condition. If the mask is non-zero, the current value pointed to by the pmc->addr pointer will be read and compared against the expected value, and if they match, the entering of optimized power state will be aborted. This is intended to prevent the CPU from entering optimized power state and waiting on a write that has already happened by the time this API is called.

Warning

It is responsibility of the user to check if this function is supported at runtime using rte_cpu_get_intrinsics_support() API call.

Parameters

pmc	The monitoring condition structure.
tsc_timestamp	Maximum TSC timestamp to wait for. Note that the wait behavior is architecture-dependent.

Returns

0 on success -EINVAL on invalid parameters -ENOTSUP if unsupported

rte_power_monitor_wakeup()

int rte_power_monitor_wakeup

(

const unsigned int

lcore_id

)

Wake up a specific lcore that is in a power optimized state and is monitoring an address.

Note

It is safe to call this function if the lcore in question is not sleeping. The function will have no effect.

This function will not wake up a core that is in a power optimized state due to calling rte_power_pause.

Parameters

lcore_id

Lcore ID of a sleeping thread.

rte_power_pause()

int rte_power_pause

(

const uint64_t

tsc_timestamp

)

Enter an architecture-defined optimized power state until a certain TSC timestamp is reached.

Warning

It is responsibility of the user to check if this function is supported at runtime using rte_cpu_get_intrinsics_support() API call.

Parameters

tsc_timestamp

Maximum TSC timestamp to wait for. Note that the wait behavior is architecture-dependent.

Returns

0 on success -EINVAL on invalid parameters -ENOTSUP if unsupported

rte_power_monitor_multi()

int rte_power_monitor_multi	(	const struct rte_power_monitor_cond	pmc[],
		const uint32_t	num,
		const uint64_t	tsc_timestamp
	)

Monitor a set of addresses for changes. This will cause the CPU to enter an architecture-defined optimized power state until either one of the specified memory addresses is written to, a certain TSC timestamp is reached, or other reasons cause the CPU to wake up.

Additionally, expected 64-bit values and 64-bit masks are provided. If mask is non-zero, the current value pointed to by the p pointer will be checked against the expected value, and if they do not match, the entering of optimized power state may be aborted.

Warning

It is responsibility of the user to check if this function is supported at runtime using rte_cpu_get_intrinsics_support() API call. Failing to do so may result in an illegal CPU instruction error.

Parameters

pmc	An array of monitoring condition structures.
num	Length of the pmc array.
tsc_timestamp	Maximum TSC timestamp to wait for. Note that the wait behavior is architecture-dependent.

Returns

0 on success -EINVAL on invalid parameters -ENOTSUP if unsupported