6#ifndef _RTE_MBUF_CORE_H_
7#define _RTE_MBUF_CORE_H_
23#include <rte_stdatomic.h>
51#define RTE_MBUF_F_RX_VLAN (1ULL << 0)
54#define RTE_MBUF_F_RX_RSS_HASH (1ULL << 1)
57#define RTE_MBUF_F_RX_FDIR (1ULL << 2)
63#define RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD (1ULL << 5)
71#define RTE_MBUF_F_RX_VLAN_STRIPPED (1ULL << 6)
81#define RTE_MBUF_F_RX_IP_CKSUM_MASK ((1ULL << 4) | (1ULL << 7))
83#define RTE_MBUF_F_RX_IP_CKSUM_UNKNOWN 0
84#define RTE_MBUF_F_RX_IP_CKSUM_BAD (1ULL << 4)
85#define RTE_MBUF_F_RX_IP_CKSUM_GOOD (1ULL << 7)
86#define RTE_MBUF_F_RX_IP_CKSUM_NONE ((1ULL << 4) | (1ULL << 7))
96#define RTE_MBUF_F_RX_L4_CKSUM_MASK ((1ULL << 3) | (1ULL << 8))
98#define RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN 0
99#define RTE_MBUF_F_RX_L4_CKSUM_BAD (1ULL << 3)
100#define RTE_MBUF_F_RX_L4_CKSUM_GOOD (1ULL << 8)
101#define RTE_MBUF_F_RX_L4_CKSUM_NONE ((1ULL << 3) | (1ULL << 8))
104#define RTE_MBUF_F_RX_IEEE1588_PTP (1ULL << 9)
107#define RTE_MBUF_F_RX_IEEE1588_TMST (1ULL << 10)
110#define RTE_MBUF_F_RX_FDIR_ID (1ULL << 13)
113#define RTE_MBUF_F_RX_FDIR_FLX (1ULL << 14)
130#define RTE_MBUF_F_RX_QINQ_STRIPPED (1ULL << 15)
137#define RTE_MBUF_F_RX_LRO (1ULL << 16)
144#define RTE_MBUF_F_RX_SEC_OFFLOAD (1ULL << 18)
149#define RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED (1ULL << 19)
159#define RTE_MBUF_F_RX_QINQ (1ULL << 20)
176#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_MASK ((1ULL << 21) | (1ULL << 22))
178#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_UNKNOWN 0
179#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD (1ULL << 21)
180#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_GOOD (1ULL << 22)
181#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_INVALID ((1ULL << 21) | (1ULL << 22))
189#define RTE_MBUF_F_FIRST_FREE (1ULL << 23)
190#define RTE_MBUF_F_LAST_FREE (1ULL << 40)
207#define RTE_MBUF_F_TX_OUTER_UDP_CKSUM (1ULL << 41)
214#define RTE_MBUF_F_TX_UDP_SEG (1ULL << 42)
222#define RTE_MBUF_F_TX_SEC_OFFLOAD (1ULL << 43)
228#define RTE_MBUF_F_TX_MACSEC (1ULL << 44)
239#define RTE_MBUF_F_TX_TUNNEL_VXLAN (0x1ULL << 45)
240#define RTE_MBUF_F_TX_TUNNEL_GRE (0x2ULL << 45)
241#define RTE_MBUF_F_TX_TUNNEL_IPIP (0x3ULL << 45)
242#define RTE_MBUF_F_TX_TUNNEL_GENEVE (0x4ULL << 45)
244#define RTE_MBUF_F_TX_TUNNEL_MPLSINUDP (0x5ULL << 45)
245#define RTE_MBUF_F_TX_TUNNEL_VXLAN_GPE (0x6ULL << 45)
246#define RTE_MBUF_F_TX_TUNNEL_GTP (0x7ULL << 45)
247#define RTE_MBUF_F_TX_TUNNEL_ESP (0x8ULL << 45)
259#define RTE_MBUF_F_TX_TUNNEL_IP (0xDULL << 45)
272#define RTE_MBUF_F_TX_TUNNEL_UDP (0xEULL << 45)
274#define RTE_MBUF_F_TX_TUNNEL_MASK (0xFULL << 45)
281#define RTE_MBUF_F_TX_QINQ (1ULL << 49)
292#define RTE_MBUF_F_TX_TCP_SEG (1ULL << 50)
295#define RTE_MBUF_F_TX_IEEE1588_TMST (1ULL << 51)
308#define RTE_MBUF_F_TX_L4_NO_CKSUM (0ULL << 52)
311#define RTE_MBUF_F_TX_TCP_CKSUM (1ULL << 52)
314#define RTE_MBUF_F_TX_SCTP_CKSUM (2ULL << 52)
317#define RTE_MBUF_F_TX_UDP_CKSUM (3ULL << 52)
320#define RTE_MBUF_F_TX_L4_MASK (3ULL << 52)
328#define RTE_MBUF_F_TX_IP_CKSUM (1ULL << 54)
336#define RTE_MBUF_F_TX_IPV4 (1ULL << 55)
344#define RTE_MBUF_F_TX_IPV6 (1ULL << 56)
351#define RTE_MBUF_F_TX_VLAN (1ULL << 57)
359#define RTE_MBUF_F_TX_OUTER_IP_CKSUM (1ULL << 58)
366#define RTE_MBUF_F_TX_OUTER_IPV4 (1ULL << 59)
373#define RTE_MBUF_F_TX_OUTER_IPV6 (1ULL << 60)
379#define RTE_MBUF_F_TX_OFFLOAD_MASK ( \
380 RTE_MBUF_F_TX_OUTER_IPV6 | \
381 RTE_MBUF_F_TX_OUTER_IPV4 | \
382 RTE_MBUF_F_TX_OUTER_IP_CKSUM | \
383 RTE_MBUF_F_TX_VLAN | \
384 RTE_MBUF_F_TX_IPV6 | \
385 RTE_MBUF_F_TX_IPV4 | \
386 RTE_MBUF_F_TX_IP_CKSUM | \
387 RTE_MBUF_F_TX_L4_MASK | \
388 RTE_MBUF_F_TX_IEEE1588_TMST | \
389 RTE_MBUF_F_TX_TCP_SEG | \
390 RTE_MBUF_F_TX_QINQ | \
391 RTE_MBUF_F_TX_TUNNEL_MASK | \
392 RTE_MBUF_F_TX_MACSEC | \
393 RTE_MBUF_F_TX_SEC_OFFLOAD | \
394 RTE_MBUF_F_TX_UDP_SEG | \
395 RTE_MBUF_F_TX_OUTER_UDP_CKSUM)
400#define RTE_MBUF_F_EXTERNAL (1ULL << 61)
402#define RTE_MBUF_F_INDIRECT (1ULL << 62)
405#define RTE_MBUF_PRIV_ALIGN 8
413#define RTE_MBUF_DEFAULT_DATAROOM 2048
414#define RTE_MBUF_DEFAULT_BUF_SIZE \
415 (RTE_MBUF_DEFAULT_DATAROOM + RTE_PKTMBUF_HEADROOM)
433 RTE_MBUF_L2_LEN_BITS = 7,
434 RTE_MBUF_L3_LEN_BITS = 9,
435 RTE_MBUF_L4_LEN_BITS = 8,
436 RTE_MBUF_TSO_SEGSZ_BITS = 16,
437 RTE_MBUF_OUTL3_LEN_BITS = 9,
438 RTE_MBUF_OUTL2_LEN_BITS = 7,
439 RTE_MBUF_TXOFLD_UNUSED_BITS =
sizeof(uint64_t) * CHAR_BIT -
440 RTE_MBUF_L2_LEN_BITS -
441 RTE_MBUF_L3_LEN_BITS -
442 RTE_MBUF_L4_LEN_BITS -
443 RTE_MBUF_TSO_SEGSZ_BITS -
444 RTE_MBUF_OUTL3_LEN_BITS -
445 RTE_MBUF_OUTL2_LEN_BITS,
446#
if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
447 RTE_MBUF_L2_LEN_OFS =
448 sizeof(uint64_t) * CHAR_BIT - RTE_MBUF_L2_LEN_BITS,
449 RTE_MBUF_L3_LEN_OFS = RTE_MBUF_L2_LEN_OFS - RTE_MBUF_L3_LEN_BITS,
450 RTE_MBUF_L4_LEN_OFS = RTE_MBUF_L3_LEN_OFS - RTE_MBUF_L4_LEN_BITS,
451 RTE_MBUF_TSO_SEGSZ_OFS = RTE_MBUF_L4_LEN_OFS - RTE_MBUF_TSO_SEGSZ_BITS,
452 RTE_MBUF_OUTL3_LEN_OFS =
453 RTE_MBUF_TSO_SEGSZ_OFS - RTE_MBUF_OUTL3_LEN_BITS,
454 RTE_MBUF_OUTL2_LEN_OFS =
455 RTE_MBUF_OUTL3_LEN_OFS - RTE_MBUF_OUTL2_LEN_BITS,
456 RTE_MBUF_TXOFLD_UNUSED_OFS =
457 RTE_MBUF_OUTL2_LEN_OFS - RTE_MBUF_TXOFLD_UNUSED_BITS,
459 RTE_MBUF_L2_LEN_OFS = 0,
460 RTE_MBUF_L3_LEN_OFS = RTE_MBUF_L2_LEN_OFS + RTE_MBUF_L2_LEN_BITS,
461 RTE_MBUF_L4_LEN_OFS = RTE_MBUF_L3_LEN_OFS + RTE_MBUF_L3_LEN_BITS,
462 RTE_MBUF_TSO_SEGSZ_OFS = RTE_MBUF_L4_LEN_OFS + RTE_MBUF_L4_LEN_BITS,
463 RTE_MBUF_OUTL3_LEN_OFS =
464 RTE_MBUF_TSO_SEGSZ_OFS + RTE_MBUF_TSO_SEGSZ_BITS,
465 RTE_MBUF_OUTL2_LEN_OFS =
466 RTE_MBUF_OUTL3_LEN_OFS + RTE_MBUF_OUTL3_LEN_BITS,
467 RTE_MBUF_TXOFLD_UNUSED_OFS =
468 RTE_MBUF_OUTL2_LEN_OFS + RTE_MBUF_OUTL2_LEN_BITS,
501 uint64_t rearm_data[1];
534 void *rx_descriptor_fields1[24 /
sizeof(
void *)];
688 uint32_t dynfield1[9];
702 RTE_ATOMIC(uint16_t) refcnt;
706#define RTE_MBUF_MAX_NB_SEGS UINT16_MAX
715#define RTE_MBUF_CLONED(mb) ((mb)->ol_flags & RTE_MBUF_F_INDIRECT)
722#define RTE_MBUF_HAS_EXTBUF(mb) ((mb)->ol_flags & RTE_MBUF_F_EXTERNAL)
757#define RTE_MBUF_DIRECT(mb) \
758 !(((const char *)(&(mb)->ol_flags))[MSB_OFFSET ] & \
759 (char)((RTE_MBUF_F_INDIRECT | RTE_MBUF_F_EXTERNAL) >> (7 * CHAR_BIT)) )
761#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
763#define RTE_MBUF_DIRECT(mb) !(((const char *)(&(mb)->ol_flags))[7] & 0x60)
764#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
766#define RTE_MBUF_DIRECT(mb) !(((const char *)(&(mb)->ol_flags))[0] & 0x60)
771 "(RTE_MBUF_F_INDIRECT | RTE_MBUF_F_EXTERNAL) is not 0x60 at MSB");
774#define RTE_MBUF_PORT_INVALID UINT16_MAX
776#define MBUF_INVALID_PORT RTE_MBUF_PORT_INVALID
792#define rte_pktmbuf_mtod_offset(m, t, o) \
793 ((t)(void *)((char *)(m)->buf_addr + (m)->data_off + (o)))
807#define rte_pktmbuf_mtod(m, t) rte_pktmbuf_mtod_offset(m, t, 0)
818#define rte_pktmbuf_iova_offset(m, o) \
819 (rte_iova_t)(rte_mbuf_iova_get(m) + (m)->data_off + (o))
828#define rte_pktmbuf_iova(m) rte_pktmbuf_iova_offset(m, 0)
#define RTE_CACHE_LINE_MIN_SIZE
#define __rte_cache_aligned
#define RTE_MBUF_F_EXTERNAL
void(* rte_mbuf_extbuf_free_callback_t)(void *addr, void *opaque)
#define RTE_MBUF_F_INDIRECT
rte_mbuf_extbuf_free_callback_t free_cb
struct rte_mbuf_ext_shared_info * shinfo
struct rte_mempool * pool
uint8_t inner_esp_next_proto