rte_pmu.h

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/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2025 Marvell
 */
 
#ifndef RTE_PMU_H
#define RTE_PMU_H
 
#include <linux/perf_event.h>
 
#include <rte_atomic.h>
#include <rte_branch_prediction.h>
#include <rte_common.h>
#include <rte_compat.h>
#include <rte_lcore.h>
 
#define RTE_PMU_SUPPORTED
#if defined(RTE_ARCH_ARM64)
#include "rte_pmu_pmc_arm64.h"
#elif defined(RTE_ARCH_X86_64)
#include "rte_pmu_pmc_x86_64.h"
#else
#undef RTE_PMU_SUPPORTED
#endif
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define RTE_MAX_NUM_GROUP_EVENTS 8
 
struct __rte_cache_aligned rte_pmu_event_group {
    struct perf_event_mmap_page *mmap_pages[RTE_MAX_NUM_GROUP_EVENTS];
    int fds[RTE_MAX_NUM_GROUP_EVENTS]; 
    TAILQ_ENTRY(rte_pmu_event_group) next; 
    bool enabled; 
};
 
struct rte_pmu {
    struct rte_pmu_event_group event_groups[RTE_MAX_LCORE]; 
    unsigned int num_group_events; 
    unsigned int initialized; 
    char *name; 
    TAILQ_HEAD(, rte_pmu_event) event_list; 
};
 
extern struct rte_pmu rte_pmu;
 
/* Each architecture supporting PMU needs to provide its own version. */
#ifndef rte_pmu_pmc_read
#define rte_pmu_pmc_read(index) ({ RTE_SET_USED(index); 0; })
#endif
 
__rte_experimental
static __rte_always_inline uint64_t
__rte_pmu_read_userpage(struct perf_event_mmap_page *pc)
{
#define __RTE_PMU_READ_ONCE(x) (*(const volatile typeof(x) *)&(x))
    uint64_t width, offset;
    uint32_t seq, index;
    int64_t pmc;
 
    for (;;) {
        seq = __RTE_PMU_READ_ONCE(pc->lock);
        rte_compiler_barrier();
        index = __RTE_PMU_READ_ONCE(pc->index);
        offset = __RTE_PMU_READ_ONCE(pc->offset);
        width = __RTE_PMU_READ_ONCE(pc->pmc_width);
 
        /* index set to 0 means that particular counter cannot be used */
        if (likely(pc->cap_user_rdpmc && index)) {
            pmc = rte_pmu_pmc_read(index - 1);
            pmc <<= 64 - width;
            pmc >>= 64 - width;
            offset += pmc;
        }
 
        rte_compiler_barrier();
 
        if (likely(__RTE_PMU_READ_ONCE(pc->lock) == seq))
            return offset;
    }
 
    return 0;
}
 
__rte_experimental
int
__rte_pmu_enable_group(struct rte_pmu_event_group *group);
 
__rte_experimental
int
rte_pmu_init(void);
 
__rte_experimental
void
rte_pmu_fini(void);
 
__rte_experimental
int
rte_pmu_add_event(const char *name);
 
/* quiesce warnings produced by chkincs caused by calling internal functions directly */
#ifndef ALLOW_EXPERIMENTAL_API
#define __rte_pmu_enable_group(group) ({ RTE_SET_USED(group); 0; })
#define __rte_pmu_read_userpage(pc) ({ RTE_SET_USED(pc); 0; })
#endif
 
__rte_experimental
static __rte_always_inline uint64_t
rte_pmu_read(unsigned int index)
{
    unsigned int lcore_id = rte_lcore_id();
    struct rte_pmu_event_group *group;
 
    if (unlikely(!rte_pmu.initialized))
        return 0;
 
    /* non-EAL threads are not supported */
    if (unlikely(lcore_id >= RTE_MAX_LCORE))
        return 0;
 
    if (unlikely(index >= rte_pmu.num_group_events))
        return 0;
 
    group = &rte_pmu.event_groups[lcore_id];
    if (unlikely(!group->enabled)) {
        if (__rte_pmu_enable_group(group))
            return 0;
    }
 
    return __rte_pmu_read_userpage(group->mmap_pages[index]);
}
 
#ifdef __cplusplus
}
#endif
 
#endif /* RTE_PMU_H */