rte_atomic.h File Reference

#include <stdint.h>
#include <rte_common.h>
#include <rte_stdatomic.h>

Go to the source code of this file.

Macros
#define	rte_compiler_barrier()

Functions
static void	rte_atomic_thread_fence (rte_memory_order memorder)
struct	__rte_aligned (16)
static int	rte_atomic128_cmp_exchange (rte_int128_t *dst, rte_int128_t *exp, const rte_int128_t *src, unsigned int weak, int success, int failure)
Memory Barrier
static void	rte_mb (void)
static void	rte_wmb (void)
static void	rte_rmb (void)
I/O Memory Barrier
static void	rte_io_mb (void)
static void	rte_io_wmb (void)
static void	rte_io_rmb (void)

Detailed Description

Atomic Operations

This file defines a generic API for atomic operations.

Definition in file rte_atomic.h.

Macro Definition Documentation

rte_compiler_barrier

#define rte_compiler_barrier

(

)

Value:

    do {        \
    asm volatile ("" : : : "memory");   \
} while(0)

Compiler barrier.

Guarantees that operation reordering does not occur at compile time for operations directly before and after the barrier.

Definition at line 96 of file rte_atomic.h.

Function Documentation

rte_mb()

static void rte_mb ( void  )

inlinestatic

General memory barrier.

Guarantees that the LOAD and STORE operations generated before the barrier occur before the LOAD and STORE operations generated after.

rte_wmb()

static void rte_wmb ( void  )

inlinestatic

Write memory barrier.

Guarantees that the STORE operations generated before the barrier occur before the STORE operations generated after.

Examples

examples/pipeline/thread.c, and examples/vhost_crypto/main.c.

rte_rmb()

static void rte_rmb ( void  )

inlinestatic

Read memory barrier.

Guarantees that the LOAD operations generated before the barrier occur before the LOAD operations generated after.

rte_io_mb()

static void rte_io_mb ( void  )

inlinestatic

General memory barrier for I/O device

Guarantees that the LOAD and STORE operations that precede the rte_io_mb() call are visible to I/O device or CPU before the LOAD and STORE operations that follow it.

rte_io_wmb()

static void rte_io_wmb ( void  )

inlinestatic

Write memory barrier for I/O device

Guarantees that the STORE operations that precede the rte_io_wmb() call are visible to I/O device before the STORE operations that follow it.

rte_io_rmb()

static void rte_io_rmb ( void  )

inlinestatic

Read memory barrier for IO device

Guarantees that the LOAD operations on I/O device that precede the rte_io_rmb() call are visible to CPU before the LOAD operations that follow it.

rte_atomic_thread_fence()

static void rte_atomic_thread_fence ( rte_memory_order  memorder )

inlinestatic

Synchronization fence between threads based on the specified memory order.

Examples

examples/vhost_blk/vhost_blk.c.

__rte_aligned()

struct __rte_aligned

(

16

)

128-bit integer structure.

Definition at line 104 of file rte_atomic.h.

rte_atomic128_cmp_exchange()

static int rte_atomic128_cmp_exchange ( rte_int128_t *  dst, rte_int128_t *  exp, const rte_int128_t *  src, unsigned int  weak, int  success, int  failure  )

inlinestatic

An atomic compare and set function used by the mutex functions. (Atomically) Equivalent to:

if (*dst == *exp)
  *dst = *src
else
  *exp = *dst

Note

This function is currently available for the x86-64 and aarch64 platforms.

The success and failure arguments must be one of the __ATOMIC_* values defined in the C++11 standard. For details on their behavior, refer to the standard.

Parameters

dst	The destination into which the value will be written.
exp	Pointer to the expected value. If the operation fails, this memory is updated with the actual value.
src	Pointer to the new value.
weak	A value of true allows the comparison to spuriously fail and allows the 'exp' update to occur non-atomically (i.e. a torn read may occur). Implementations may ignore this argument and only implement the strong variant.
success	If successful, the operation's memory behavior conforms to this (or a stronger) model.
failure	If unsuccessful, the operation's memory behavior conforms to this (or a stronger) model. This argument cannot be rte_memory_order_release, rte_memory_order_acq_rel, or a stronger model than success.

Returns

Non-zero on success; 0 on failure.