DPDK  24.03.0-rc1
rte_pmd_mlx5.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2020 Mellanox Technologies, Ltd
3  */
4 
5 #ifndef RTE_PMD_PRIVATE_MLX5_H_
6 #define RTE_PMD_PRIVATE_MLX5_H_
7 
8 #include <rte_compat.h>
9 
18 #ifdef __cplusplus
19 extern "C" {
20 #endif
21 
22 #define RTE_PMD_MLX5_FINE_GRANULARITY_INLINE "mlx5_fine_granularity_inline"
23 
38 __rte_experimental
39 int rte_pmd_mlx5_get_dyn_flag_names(char *names[], unsigned int n);
40 
41 #define RTE_PMD_MLX5_DOMAIN_BIT_NIC_RX (1 << 0)
42 #define RTE_PMD_MLX5_DOMAIN_BIT_NIC_TX (1 << 1)
43 #define RTE_PMD_MLX5_DOMAIN_BIT_FDB (1 << 2)
63 __rte_experimental
64 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains);
65 
69 #define RTE_PMD_MLX5_EXTERNAL_RX_QUEUE_ID_MIN (UINT16_MAX - 1000 + 1)
70 
74 #define RTE_PMD_MLX5_LINEAR_HASH_TAG_INDEX 255
75 
95 __rte_experimental
96 int rte_pmd_mlx5_external_rx_queue_id_map(uint16_t port_id, uint16_t dpdk_idx,
97  uint32_t hw_idx);
98 
115 __rte_experimental
116 int rte_pmd_mlx5_external_rx_queue_id_unmap(uint16_t port_id,
117  uint16_t dpdk_idx);
118 
126 #define RTE_PMD_MLX5_HOST_SHAPER_FLAG_AVAIL_THRESH_TRIGGERED 0
127 
146 __rte_experimental
147 int rte_pmd_mlx5_host_shaper_config(int port_id, uint8_t rate, uint32_t flags);
148 
163 __rte_experimental
164 int rte_pmd_mlx5_external_sq_enable(uint16_t port_id, uint32_t sq_num);
165 
166 /* MLX5 flow engine mode definition for live migration. */
167 enum rte_pmd_mlx5_flow_engine_mode {
168  RTE_PMD_MLX5_FLOW_ENGINE_MODE_ACTIVE, /* active means high priority, effective in HW. */
169  RTE_PMD_MLX5_FLOW_ENGINE_MODE_STANDBY, /* standby mode with lower priority flow rules. */
170 };
171 
176 #define RTE_PMD_MLX5_FLOW_ENGINE_FLAG_STANDBY_DUP_INGRESS RTE_BIT32(0)
177 
229 __rte_experimental
230 int rte_pmd_mlx5_flow_engine_set_mode(enum rte_pmd_mlx5_flow_engine_mode mode, uint32_t flags);
231 
245  uint8_t option_type;
250  uint8_t option_len;
263  uint8_t offset;
269  uint8_t sample_len;
275 };
276 
309 __rte_experimental
310 void *
312  const struct rte_pmd_mlx5_geneve_tlv tlv_list[],
313  uint8_t nb_options);
314 
330 __rte_experimental
331 int
333 
334 #ifdef __cplusplus
335 }
336 #endif
337 
338 #endif /* RTE_PMD_PRIVATE_MLX5_H_ */
uint32_t rte_be32_t
__rte_experimental int rte_pmd_mlx5_host_shaper_config(int port_id, uint8_t rate, uint32_t flags)
__rte_experimental int rte_pmd_mlx5_external_rx_queue_id_unmap(uint16_t port_id, uint16_t dpdk_idx)
rte_be32_t * match_data_mask
Definition: rte_pmd_mlx5.h:274
__rte_experimental int rte_pmd_mlx5_external_sq_enable(uint16_t port_id, uint32_t sq_num)
__rte_experimental void * rte_pmd_mlx5_create_geneve_tlv_parser(uint16_t port_id, const struct rte_pmd_mlx5_geneve_tlv tlv_list[], uint8_t nb_options)
__rte_experimental int rte_pmd_mlx5_destroy_geneve_tlv_parser(void *handle)
__rte_experimental int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
__rte_experimental int rte_pmd_mlx5_get_dyn_flag_names(char *names[], unsigned int n)
__rte_experimental int rte_pmd_mlx5_flow_engine_set_mode(enum rte_pmd_mlx5_flow_engine_mode mode, uint32_t flags)
uint16_t rte_be16_t
__rte_experimental int rte_pmd_mlx5_external_rx_queue_id_map(uint16_t port_id, uint16_t dpdk_idx, uint32_t hw_idx)