8#ifndef _RTE_EVENTDEV_H_
9#define _RTE_EVENTDEV_H_
242#include <rte_compat.h>
253#define RTE_EVENT_DEV_CAP_QUEUE_QOS RTE_BIT32(0)
271#define RTE_EVENT_DEV_CAP_EVENT_QOS RTE_BIT32(1)
285#define RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED RTE_BIT32(2)
295#define RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES RTE_BIT32(3)
319#define RTE_EVENT_DEV_CAP_BURST_MODE RTE_BIT32(4)
330#define RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE RTE_BIT32(5)
343#define RTE_EVENT_DEV_CAP_NONSEQ_MODE RTE_BIT32(6)
355#define RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK RTE_BIT32(7)
366#define RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT RTE_BIT32(8)
376#define RTE_EVENT_DEV_CAP_CARRY_FLOW_ID RTE_BIT32(9)
385#define RTE_EVENT_DEV_CAP_MAINTENANCE_FREE RTE_BIT32(10)
398#define RTE_EVENT_DEV_CAP_RUNTIME_QUEUE_ATTR RTE_BIT32(11)
408#define RTE_EVENT_DEV_CAP_PROFILE_LINK RTE_BIT32(12)
422#define RTE_EVENT_DEV_CAP_ATOMIC RTE_BIT32(13)
430#define RTE_EVENT_DEV_CAP_ORDERED RTE_BIT32(14)
438#define RTE_EVENT_DEV_CAP_PARALLEL RTE_BIT32(15)
446#define RTE_EVENT_DEV_CAP_INDEPENDENT_ENQ RTE_BIT32(16)
465#define RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE RTE_BIT32(17)
477#define RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE_ADAPTIVE RTE_BIT32(18)
489#define RTE_EVENT_DEV_CAP_PER_PORT_PRESCHEDULE RTE_BIT32(19)
499#define RTE_EVENT_DEV_CAP_PRESCHEDULE_EXPLICIT RTE_BIT32(20)
509#define RTE_EVENT_DEV_PRIORITY_HIGHEST 0
516#define RTE_EVENT_DEV_PRIORITY_NORMAL 128
523#define RTE_EVENT_DEV_PRIORITY_LOWEST 255
532#define RTE_EVENT_QUEUE_WEIGHT_HIGHEST 255
538#define RTE_EVENT_QUEUE_WEIGHT_LOWEST 0
546#define RTE_EVENT_QUEUE_AFFINITY_HIGHEST 255
552#define RTE_EVENT_QUEUE_AFFINITY_LOWEST 0
709#define RTE_EVENT_DEV_ATTR_PORT_COUNT 0
713#define RTE_EVENT_DEV_ATTR_QUEUE_COUNT 1
717#define RTE_EVENT_DEV_ATTR_STARTED 2
733 uint32_t *attr_value);
737#define RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT RTE_BIT32(0)
877#define RTE_EVENT_QUEUE_CFG_ALL_TYPES RTE_BIT32(0)
891#define RTE_EVENT_QUEUE_CFG_SINGLE_LINK RTE_BIT32(1)
1041#define RTE_EVENT_QUEUE_ATTR_PRIORITY 0
1045#define RTE_EVENT_QUEUE_ATTR_NB_ATOMIC_FLOWS 1
1049#define RTE_EVENT_QUEUE_ATTR_NB_ATOMIC_ORDER_SEQUENCES 2
1053#define RTE_EVENT_QUEUE_ATTR_EVENT_QUEUE_CFG 3
1057#define RTE_EVENT_QUEUE_ATTR_SCHEDULE_TYPE 4
1061#define RTE_EVENT_QUEUE_ATTR_WEIGHT 5
1065#define RTE_EVENT_QUEUE_ATTR_AFFINITY 6
1089 uint32_t *attr_value);
1112 uint64_t attr_value);
1117#define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL RTE_BIT32(0)
1124#define RTE_EVENT_PORT_CFG_SINGLE_LINK RTE_BIT32(1)
1132#define RTE_EVENT_PORT_CFG_HINT_PRODUCER RTE_BIT32(2)
1142#define RTE_EVENT_PORT_CFG_HINT_CONSUMER RTE_BIT32(3)
1153#define RTE_EVENT_PORT_CFG_HINT_WORKER RTE_BIT32(4)
1164#define RTE_EVENT_PORT_CFG_INDEPENDENT_ENQ RTE_BIT32(5)
1307#define RTE_EVENT_PORT_ATTR_ENQ_DEPTH 0
1311#define RTE_EVENT_PORT_ATTR_DEQ_DEPTH 1
1317#define RTE_EVENT_PORT_ATTR_NEW_EVENT_THRESHOLD 2
1321#define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3
1325#define RTE_EVENT_PORT_ATTR_INDEPENDENT_ENQ 4
1346 uint32_t *attr_value);
1449 uint16_t elem_offset : 12;
1453 uint16_t attr_valid : 1;
1471 uint64_t impl_opaque;
1499#define RTE_SCHED_TYPE_ORDERED 0
1537#define RTE_SCHED_TYPE_ATOMIC 1
1564#define RTE_SCHED_TYPE_PARALLEL 2
1578#define RTE_EVENT_TYPE_ETHDEV 0x0
1580#define RTE_EVENT_TYPE_CRYPTODEV 0x1
1582#define RTE_EVENT_TYPE_TIMER 0x2
1584#define RTE_EVENT_TYPE_CPU 0x3
1588#define RTE_EVENT_TYPE_ETH_RX_ADAPTER 0x4
1590#define RTE_EVENT_TYPE_DMADEV 0x5
1592#define RTE_EVENT_TYPE_VECTOR 0x8
1604#define RTE_EVENT_TYPE_ETHDEV_VECTOR \
1605 (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_ETHDEV)
1607#define RTE_EVENT_TYPE_CPU_VECTOR (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_CPU)
1609#define RTE_EVENT_TYPE_ETH_RX_ADAPTER_VECTOR \
1610 (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_ETH_RX_ADAPTER)
1612#define RTE_EVENT_TYPE_CRYPTODEV_VECTOR \
1613 (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_CRYPTODEV)
1616#define RTE_EVENT_TYPE_MAX 0x10
1620#define RTE_EVENT_OP_NEW 0
1625#define RTE_EVENT_OP_FORWARD 1
1637#define RTE_EVENT_OP_RELEASE 2
1803#define RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT 0x1
1807#define RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ 0x2
1811#define RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID 0x4
1818#define RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR 0x8
1843#define RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT RTE_BIT32(0)
1846#define RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC RTE_BIT32(1)
1866#define RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW 0x1
1873#define RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD 0x2
1880#define RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND 0x4
1885#define RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA 0x8
1890#define RTE_EVENT_CRYPTO_ADAPTER_CAP_EVENT_VECTOR 0x10
1919#define RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_NEW 0x1
1926#define RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_FWD 0x2
1933#define RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_VCHAN_EV_BIND 0x4
1961#define RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT 0x1
1964#define RTE_EVENT_ETH_TX_ADAPTER_CAP_EVENT_VECTOR 0x2
1990#define RTE_EVENT_VECTOR_ADAPTER_CAP_INTERNAL_PORT 0x1
1997rte_event_vector_adapter_caps_get(uint8_t dev_id, uint32_t *caps);
2025 uint64_t *timeout_ticks);
2092 const uint8_t queues[],
const uint8_t priorities[],
2140 uint8_t queues[], uint16_t nb_unlinks);
2217 const uint8_t priorities[], uint16_t nb_links, uint8_t profile_id);
2270 uint16_t nb_unlinks, uint8_t profile_id);
2324 uint8_t queues[], uint8_t priorities[]);
2360 uint8_t priorities[], uint8_t profile_id);
2397#define RTE_EVENT_DEV_XSTATS_NAME_SIZE 64
2403 RTE_EVENT_DEV_XSTATS_DEVICE,
2404 RTE_EVENT_DEV_XSTATS_PORT,
2405 RTE_EVENT_DEV_XSTATS_QUEUE,
2453 uint8_t queue_port_id,
2487 uint8_t queue_port_id,
2488 const uint64_t ids[],
2489 uint64_t values[],
unsigned int n);
2534 int16_t queue_port_id,
2535 const uint64_t ids[],
2585#include <rte_eventdev_core.h>
2592__rte_event_enqueue_burst(uint8_t dev_id, uint8_t port_id,
2593 const struct rte_event ev[], uint16_t nb_events,
2594 const event_enqueue_burst_t fn)
2596 const struct rte_event_fp_ops *fp_ops;
2599 fp_ops = &rte_event_fp_ops[dev_id];
2600 port = fp_ops->data[port_id];
2601#ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2602 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2603 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV) {
2613 rte_eventdev_trace_enq_burst(dev_id, port_id, ev, nb_events, (
void *)fn);
2615 return fn(port, ev, nb_events);
2661static inline uint16_t
2663 const struct rte_event ev[], uint16_t nb_events)
2665 const struct rte_event_fp_ops *fp_ops;
2667 fp_ops = &rte_event_fp_ops[dev_id];
2668 return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
2669 fp_ops->enqueue_burst);
2713static inline uint16_t
2715 const struct rte_event ev[], uint16_t nb_events)
2717 const struct rte_event_fp_ops *fp_ops;
2719 fp_ops = &rte_event_fp_ops[dev_id];
2720 return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
2721 fp_ops->enqueue_new_burst);
2765static inline uint16_t
2767 const struct rte_event ev[], uint16_t nb_events)
2769 const struct rte_event_fp_ops *fp_ops;
2771 fp_ops = &rte_event_fp_ops[dev_id];
2772 return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
2773 fp_ops->enqueue_forward_burst);
2842static inline uint16_t
2844 uint16_t nb_events, uint64_t timeout_ticks)
2846 const struct rte_event_fp_ops *fp_ops;
2849 fp_ops = &rte_event_fp_ops[dev_id];
2850 port = fp_ops->data[port_id];
2851#ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2852 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2853 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV) {
2863 rte_eventdev_trace_deq_burst(dev_id, port_id, ev, nb_events);
2865 return (fp_ops->dequeue_burst)(port, ev, nb_events, timeout_ticks);
2868#define RTE_EVENT_DEV_MAINT_OP_FLUSH (1 << 0)
2913 const struct rte_event_fp_ops *fp_ops;
2916 fp_ops = &rte_event_fp_ops[dev_id];
2917 port = fp_ops->data[port_id];
2918#ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2919 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2920 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV)
2929 rte_eventdev_trace_maintain(dev_id, port_id, op);
2931 if (fp_ops->maintain != NULL)
2932 fp_ops->maintain(port, op);
2958static inline uint8_t
2961 const struct rte_event_fp_ops *fp_ops;
2964 fp_ops = &rte_event_fp_ops[dev_id];
2965 port = fp_ops->data[port_id];
2967#ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2968 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2969 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV)
2975 if (profile_id >= RTE_EVENT_MAX_PROFILES_PER_PORT)
2978 rte_eventdev_trace_port_profile_switch(dev_id, port_id, profile_id);
2980 return fp_ops->profile_switch(port, profile_id);
3011 const struct rte_event_fp_ops *fp_ops;
3014 fp_ops = &rte_event_fp_ops[dev_id];
3015 port = fp_ops->data[port_id];
3017#ifdef RTE_LIBRTE_EVENTDEV_DEBUG
3018 if (dev_id >= RTE_EVENT_MAX_DEVS || port_id >= RTE_EVENT_MAX_PORTS_PER_DEV)
3024 rte_eventdev_trace_port_preschedule_modify(dev_id, port_id, type);
3026 return fp_ops->preschedule_modify(port, type);
3055 const struct rte_event_fp_ops *fp_ops;
3058 fp_ops = &rte_event_fp_ops[dev_id];
3059 port = fp_ops->data[port_id];
3061#ifdef RTE_LIBRTE_EVENTDEV_DEBUG
3062 if (dev_id >= RTE_EVENT_MAX_DEVS || port_id >= RTE_EVENT_MAX_PORTS_PER_DEV)
3067 rte_eventdev_trace_port_preschedule(dev_id, port_id, type);
3069 fp_ops->preschedule(port, type);
#define __rte_always_inline
struct __rte_aligned(16) rte_event_vector
int rte_event_port_links_get(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint8_t priorities[])
int rte_event_port_unlinks_in_progress(uint8_t dev_id, uint8_t port_id)
int rte_event_queue_attr_set(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, uint64_t attr_value)
static __rte_experimental int rte_event_port_preschedule_modify(uint8_t dev_id, uint8_t port_id, enum rte_event_dev_preschedule_type type)
void(* rte_eventdev_port_flush_t)(uint8_t dev_id, struct rte_event event, void *arg)
int rte_event_dequeue_timeout_ticks(uint8_t dev_id, uint64_t ns, uint64_t *timeout_ticks)
int rte_event_port_link(uint8_t dev_id, uint8_t port_id, const uint8_t queues[], const uint8_t priorities[], uint16_t nb_links)
static uint16_t rte_event_enqueue_forward_burst(uint8_t dev_id, uint8_t port_id, const struct rte_event ev[], uint16_t nb_events)
static uint16_t rte_event_dequeue_burst(uint8_t dev_id, uint8_t port_id, struct rte_event ev[], uint16_t nb_events, uint64_t timeout_ticks)
int rte_event_dev_service_id_get(uint8_t dev_id, uint32_t *service_id)
static uint8_t rte_event_port_profile_switch(uint8_t dev_id, uint8_t port_id, uint8_t profile_id)
rte_event_dev_xstats_mode
__rte_experimental int rte_event_port_profile_links_set(uint8_t dev_id, uint8_t port_id, const uint8_t queues[], const uint8_t priorities[], uint16_t nb_links, uint8_t profile_id)
int rte_event_eth_rx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id, uint32_t *caps)
int rte_event_queue_setup(uint8_t dev_id, uint8_t queue_id, const struct rte_event_queue_conf *queue_conf)
int rte_event_queue_default_conf_get(uint8_t dev_id, uint8_t queue_id, struct rte_event_queue_conf *queue_conf)
int rte_event_dev_selftest(uint8_t dev_id)
int rte_event_dev_info_get(uint8_t dev_id, struct rte_event_dev_info *dev_info)
int rte_event_dev_stop_flush_callback_register(uint8_t dev_id, rte_eventdev_stop_flush_t callback, void *userdata)
void rte_event_dev_stop(uint8_t dev_id)
uint8_t rte_event_dev_count(void)
rte_event_dev_preschedule_type
@ RTE_EVENT_PRESCHEDULE_ADAPTIVE
@ RTE_EVENT_PRESCHEDULE_NONE
struct rte_mempool * rte_event_vector_pool_create(const char *name, unsigned int n, unsigned int cache_size, uint16_t nb_elem, int socket_id)
int rte_event_crypto_adapter_caps_get(uint8_t dev_id, uint8_t cdev_id, uint32_t *caps)
void rte_event_port_quiesce(uint8_t dev_id, uint8_t port_id, rte_eventdev_port_flush_t release_cb, void *args)
int rte_event_dev_xstats_reset(uint8_t dev_id, enum rte_event_dev_xstats_mode mode, int16_t queue_port_id, const uint64_t ids[], uint32_t nb_ids)
int rte_event_dev_dump(uint8_t dev_id, FILE *f)
int rte_event_timer_adapter_caps_get(uint8_t dev_id, uint32_t *caps)
int rte_event_dev_attr_get(uint8_t dev_id, uint32_t attr_id, uint32_t *attr_value)
int rte_event_dev_get_dev_id(const char *name)
uint64_t rte_event_dev_xstats_by_name_get(uint8_t dev_id, const char *name, uint64_t *id)
int rte_event_dev_xstats_get(uint8_t dev_id, enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id, const uint64_t ids[], uint64_t values[], unsigned int n)
#define RTE_EVENT_DEV_MAINT_OP_FLUSH
static uint16_t rte_event_enqueue_new_burst(uint8_t dev_id, uint8_t port_id, const struct rte_event ev[], uint16_t nb_events)
void(* rte_eventdev_stop_flush_t)(uint8_t dev_id, struct rte_event event, void *arg)
int rte_event_queue_attr_get(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, uint32_t *attr_value)
__rte_experimental int rte_event_port_profile_links_get(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint8_t priorities[], uint8_t profile_id)
static int rte_event_maintain(uint8_t dev_id, uint8_t port_id, int op)
int rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id, uint32_t attr_id, uint32_t *attr_value)
int rte_event_dev_start(uint8_t dev_id)
int rte_event_port_default_conf_get(uint8_t dev_id, uint8_t port_id, struct rte_event_port_conf *port_conf)
int rte_event_dev_xstats_names_get(uint8_t dev_id, enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id, struct rte_event_dev_xstats_name *xstats_names, uint64_t *ids, unsigned int size)
int rte_event_port_setup(uint8_t dev_id, uint8_t port_id, const struct rte_event_port_conf *port_conf)
__rte_experimental int rte_event_dma_adapter_caps_get(uint8_t dev_id, uint8_t dmadev_id, uint32_t *caps)
int rte_event_eth_tx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id, uint32_t *caps)
int rte_event_port_unlink(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint16_t nb_unlinks)
__rte_experimental int rte_event_port_profile_unlink(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint16_t nb_unlinks, uint8_t profile_id)
#define RTE_EVENT_DEV_XSTATS_NAME_SIZE
int rte_event_dev_socket_id(uint8_t dev_id)
int rte_event_dev_configure(uint8_t dev_id, const struct rte_event_dev_config *dev_conf)
int rte_event_dev_close(uint8_t dev_id)
static __rte_experimental void rte_event_port_preschedule(uint8_t dev_id, uint8_t port_id, enum rte_event_dev_preschedule_type type)
static uint16_t rte_event_enqueue_burst(uint8_t dev_id, uint8_t port_id, const struct rte_event ev[], uint16_t nb_events)
uint32_t dequeue_timeout_ns
enum rte_event_dev_preschedule_type preschedule_type
uint8_t nb_single_link_event_port_queues
uint32_t nb_event_port_enqueue_depth
uint32_t nb_event_queue_flows
uint32_t nb_event_port_dequeue_depth
uint8_t max_event_port_links
uint32_t max_event_port_enqueue_depth
uint32_t dequeue_timeout_ns
uint32_t min_dequeue_timeout_ns
uint32_t max_event_queue_flows
uint8_t max_event_port_dequeue_depth
uint8_t max_event_queue_priority_levels
uint8_t max_profiles_per_port
uint8_t max_event_priority_levels
uint32_t max_dequeue_timeout_ns
uint8_t max_single_link_event_port_queue_pairs
int32_t new_event_threshold
uint32_t nb_atomic_order_sequences
struct rte_event_vector * vec
char name[RTE_MEMPOOL_NAMESIZE]