DPDK 21.11.9
rte_pmd_ixgbe.h
Go to the documentation of this file.
1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2016 Intel Corporation
3 */
4
11#ifndef _PMD_IXGBE_H_
12#define _PMD_IXGBE_H_
13
14#include <rte_compat.h>
15#include <rte_ethdev.h>
16#include <rte_ether.h>
17
30int rte_pmd_ixgbe_ping_vf(uint16_t port, uint16_t vf);
31
46int rte_pmd_ixgbe_set_vf_mac_addr(uint16_t port, uint16_t vf,
47 struct rte_ether_addr *mac_addr);
48
64int rte_pmd_ixgbe_set_vf_vlan_anti_spoof(uint16_t port, uint16_t vf,
65 uint8_t on);
66
82int rte_pmd_ixgbe_set_vf_mac_anti_spoof(uint16_t port, uint16_t vf, uint8_t on);
83
100int rte_pmd_ixgbe_set_vf_vlan_insert(uint16_t port, uint16_t vf,
101 uint16_t vlan_id);
102
117int rte_pmd_ixgbe_set_tx_loopback(uint16_t port, uint8_t on);
118
133int rte_pmd_ixgbe_set_all_queues_drop_en(uint16_t port, uint8_t on);
134
152int rte_pmd_ixgbe_set_vf_split_drop_en(uint16_t port, uint16_t vf, uint8_t on);
153
171int
172rte_pmd_ixgbe_set_vf_vlan_stripq(uint16_t port, uint16_t vf, uint8_t on);
173
190int rte_pmd_ixgbe_macsec_enable(uint16_t port, uint8_t en, uint8_t rp);
191
203
216int rte_pmd_ixgbe_macsec_config_txsc(uint16_t port, uint8_t *mac);
217
232int rte_pmd_ixgbe_macsec_config_rxsc(uint16_t port, uint8_t *mac, uint16_t pi);
233
253int rte_pmd_ixgbe_macsec_select_txsa(uint16_t port, uint8_t idx, uint8_t an,
254 uint32_t pn, uint8_t *key);
255
275int rte_pmd_ixgbe_macsec_select_rxsa(uint16_t port, uint8_t idx, uint8_t an,
276 uint32_t pn, uint8_t *key);
277
300int
301rte_pmd_ixgbe_set_vf_rxmode(uint16_t port, uint16_t vf, uint16_t rx_mask,
302 uint8_t on);
303
320int
321rte_pmd_ixgbe_set_vf_rx(uint16_t port, uint16_t vf, uint8_t on);
322
339int
340rte_pmd_ixgbe_set_vf_tx(uint16_t port, uint16_t vf, uint8_t on);
341
361int
362rte_pmd_ixgbe_set_vf_vlan_filter(uint16_t port, uint16_t vlan,
363 uint64_t vf_mask, uint8_t vlan_on);
364
382int rte_pmd_ixgbe_set_vf_rate_limit(uint16_t port, uint16_t vf,
383 uint16_t tx_rate, uint64_t q_msk);
384
405 uint8_t tc_num,
406 uint8_t *bw_weight);
407
408
420int rte_pmd_ixgbe_bypass_init(uint16_t port);
421
437int rte_pmd_ixgbe_bypass_state_show(uint16_t port, uint32_t *state);
438
454int rte_pmd_ixgbe_bypass_state_set(uint16_t port, uint32_t *new_state);
455
479 uint32_t event,
480 uint32_t *state);
481
505 uint32_t event,
506 uint32_t state);
507
528int rte_pmd_ixgbe_bypass_wd_timeout_store(uint16_t port, uint32_t timeout);
529
542int rte_pmd_ixgbe_bypass_ver_show(uint16_t port, uint32_t *ver);
543
564int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port, uint32_t *wd_timeout);
565
577
589__rte_experimental
590int
592
603__rte_experimental
604int
606
625__rte_experimental
626int
627rte_pmd_ixgbe_mdio_unlocked_read(uint16_t port, uint32_t reg_addr,
628 uint32_t dev_type, uint16_t *phy_data);
629
649__rte_experimental
650int
651rte_pmd_ixgbe_mdio_unlocked_write(uint16_t port, uint32_t reg_addr,
652 uint32_t dev_type, uint16_t phy_data);
653
663
668 uint16_t vfid;
669 uint16_t msg_type;
670 uint16_t retval;
671 void *msg;
672};
673enum {
674 RTE_PMD_IXGBE_BYPASS_MODE_NONE,
675 RTE_PMD_IXGBE_BYPASS_MODE_NORMAL,
676 RTE_PMD_IXGBE_BYPASS_MODE_BYPASS,
677 RTE_PMD_IXGBE_BYPASS_MODE_ISOLATE,
678 RTE_PMD_IXGBE_BYPASS_MODE_NUM,
679};
680
681#define RTE_PMD_IXGBE_BYPASS_MODE_VALID(x) \
682 ((x) > RTE_PMD_IXGBE_BYPASS_MODE_NONE && \
683 (x) < RTE_PMD_IXGBE_BYPASS_MODE_NUM)
684
685enum {
686 RTE_PMD_IXGBE_BYPASS_EVENT_NONE,
687 RTE_PMD_IXGBE_BYPASS_EVENT_START,
688 RTE_PMD_IXGBE_BYPASS_EVENT_OS_ON = RTE_PMD_IXGBE_BYPASS_EVENT_START,
689 RTE_PMD_IXGBE_BYPASS_EVENT_POWER_ON,
690 RTE_PMD_IXGBE_BYPASS_EVENT_OS_OFF,
691 RTE_PMD_IXGBE_BYPASS_EVENT_POWER_OFF,
692 RTE_PMD_IXGBE_BYPASS_EVENT_TIMEOUT,
693 RTE_PMD_IXGBE_BYPASS_EVENT_NUM
694};
695
696#define RTE_PMD_IXGBE_BYPASS_EVENT_VALID(x) \
697 ((x) > RTE_PMD_IXGBE_BYPASS_EVENT_NONE && \
698 (x) < RTE_PMD_IXGBE_BYPASS_MODE_NUM)
699
700enum {
701 RTE_PMD_IXGBE_BYPASS_TMT_OFF, /* timeout disabled. */
702 RTE_PMD_IXGBE_BYPASS_TMT_1_5_SEC, /* timeout for 1.5 seconds */
703 RTE_PMD_IXGBE_BYPASS_TMT_2_SEC, /* timeout for 2 seconds */
704 RTE_PMD_IXGBE_BYPASS_TMT_3_SEC, /* timeout for 3 seconds */
705 RTE_PMD_IXGBE_BYPASS_TMT_4_SEC, /* timeout for 4 seconds */
706 RTE_PMD_IXGBE_BYPASS_TMT_8_SEC, /* timeout for 8 seconds */
707 RTE_PMD_IXGBE_BYPASS_TMT_16_SEC, /* timeout for 16 seconds */
708 RTE_PMD_IXGBE_BYPASS_TMT_32_SEC, /* timeout for 32 seconds */
709 RTE_PMD_IXGBE_BYPASS_TMT_NUM
710};
711
712#define RTE_PMD_IXGBE_BYPASS_TMT_VALID(x) \
713 ((x) == RTE_PMD_IXGBE_BYPASS_TMT_OFF || \
714 ((x) > RTE_PMD_IXGBE_BYPASS_TMT_OFF && \
715 (x) < RTE_PMD_IXGBE_BYPASS_TMT_NUM))
716
728__rte_experimental
729int
730rte_pmd_ixgbe_upd_fctrl_sbp(uint16_t port, int enable);
731
744__rte_experimental
745int
746rte_pmd_ixgbe_get_fdir_info(uint16_t port, struct rte_eth_fdir_info *fdir_info);
747
760__rte_experimental
761int
763 struct rte_eth_fdir_stats *fdir_stats);
764#endif /* _PMD_IXGBE_H_ */
__rte_experimental int rte_pmd_ixgbe_mdio_lock(uint16_t port)
int rte_pmd_ixgbe_set_vf_tx(uint16_t port, uint16_t vf, uint8_t on)
__rte_experimental int rte_pmd_ixgbe_get_fdir_stats(uint16_t port, struct rte_eth_fdir_stats *fdir_stats)
int rte_pmd_ixgbe_bypass_wd_timeout_store(uint16_t port, uint32_t timeout)
int rte_pmd_ixgbe_bypass_ver_show(uint16_t port, uint32_t *ver)
int rte_pmd_ixgbe_set_vf_mac_addr(uint16_t port, uint16_t vf, struct rte_ether_addr *mac_addr)
int rte_pmd_ixgbe_set_vf_rate_limit(uint16_t port, uint16_t vf, uint16_t tx_rate, uint64_t q_msk)
int rte_pmd_ixgbe_bypass_state_show(uint16_t port, uint32_t *state)
int rte_pmd_ixgbe_set_all_queues_drop_en(uint16_t port, uint8_t on)
int rte_pmd_ixgbe_set_vf_rx(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_macsec_select_rxsa(uint16_t port, uint8_t idx, uint8_t an, uint32_t pn, uint8_t *key)
int rte_pmd_ixgbe_bypass_init(uint16_t port)
int rte_pmd_ixgbe_set_vf_vlan_stripq(uint16_t port, uint16_t vf, uint8_t on)
__rte_experimental int rte_pmd_ixgbe_mdio_unlocked_write(uint16_t port, uint32_t reg_addr, uint32_t dev_type, uint16_t phy_data)
__rte_experimental int rte_pmd_ixgbe_get_fdir_info(uint16_t port, struct rte_eth_fdir_info *fdir_info)
__rte_experimental int rte_pmd_ixgbe_mdio_unlocked_read(uint16_t port, uint32_t reg_addr, uint32_t dev_type, uint16_t *phy_data)
rte_pmd_ixgbe_mb_event_rsp
@ RTE_PMD_IXGBE_MB_EVENT_NOOP_NACK
@ RTE_PMD_IXGBE_MB_EVENT_NOOP_ACK
@ RTE_PMD_IXGBE_MB_EVENT_PROCEED
@ RTE_PMD_IXGBE_MB_EVENT_MAX
int rte_pmd_ixgbe_bypass_event_show(uint16_t port, uint32_t event, uint32_t *state)
int rte_pmd_ixgbe_set_vf_rxmode(uint16_t port, uint16_t vf, uint16_t rx_mask, uint8_t on)
int rte_pmd_ixgbe_set_tc_bw_alloc(uint16_t port, uint8_t tc_num, uint8_t *bw_weight)
int rte_pmd_ixgbe_set_tx_loopback(uint16_t port, uint8_t on)
int rte_pmd_ixgbe_bypass_event_store(uint16_t port, uint32_t event, uint32_t state)
int rte_pmd_ixgbe_macsec_config_rxsc(uint16_t port, uint8_t *mac, uint16_t pi)
int rte_pmd_ixgbe_macsec_config_txsc(uint16_t port, uint8_t *mac)
int rte_pmd_ixgbe_ping_vf(uint16_t port, uint16_t vf)
int rte_pmd_ixgbe_set_vf_split_drop_en(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_set_vf_vlan_anti_spoof(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_set_vf_vlan_insert(uint16_t port, uint16_t vf, uint16_t vlan_id)
__rte_experimental int rte_pmd_ixgbe_mdio_unlock(uint16_t port)
int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port, uint32_t *wd_timeout)
int rte_pmd_ixgbe_set_vf_vlan_filter(uint16_t port, uint16_t vlan, uint64_t vf_mask, uint8_t vlan_on)
int rte_pmd_ixgbe_set_vf_mac_anti_spoof(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_macsec_enable(uint16_t port, uint8_t en, uint8_t rp)
__rte_experimental int rte_pmd_ixgbe_upd_fctrl_sbp(uint16_t port, int enable)
int rte_pmd_ixgbe_macsec_disable(uint16_t port)
int rte_pmd_ixgbe_macsec_select_txsa(uint16_t port, uint8_t idx, uint8_t an, uint32_t pn, uint8_t *key)
int rte_pmd_ixgbe_bypass_state_set(uint16_t port, uint32_t *new_state)
int rte_pmd_ixgbe_bypass_wd_reset(uint16_t port)