DPDK  24.11.0-rc3
rte_pmd_ixgbe.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2016 Intel Corporation
3  */
4 
11 #ifndef _PMD_IXGBE_H_
12 #define _PMD_IXGBE_H_
13 
14 #include <rte_compat.h>
15 #include <rte_ethdev.h>
16 #include <rte_ether.h>
17 
30 int rte_pmd_ixgbe_ping_vf(uint16_t port, uint16_t vf);
31 
46 int rte_pmd_ixgbe_set_vf_mac_addr(uint16_t port, uint16_t vf,
47  struct rte_ether_addr *mac_addr);
48 
64 int rte_pmd_ixgbe_set_vf_vlan_anti_spoof(uint16_t port, uint16_t vf,
65  uint8_t on);
66 
82 int rte_pmd_ixgbe_set_vf_mac_anti_spoof(uint16_t port, uint16_t vf, uint8_t on);
83 
100 int rte_pmd_ixgbe_set_vf_vlan_insert(uint16_t port, uint16_t vf,
101  uint16_t vlan_id);
102 
117 int rte_pmd_ixgbe_set_tx_loopback(uint16_t port, uint8_t on);
118 
133 int rte_pmd_ixgbe_set_all_queues_drop_en(uint16_t port, uint8_t on);
134 
152 int rte_pmd_ixgbe_set_vf_split_drop_en(uint16_t port, uint16_t vf, uint8_t on);
153 
171 int
172 rte_pmd_ixgbe_set_vf_vlan_stripq(uint16_t port, uint16_t vf, uint8_t on);
173 
190 int rte_pmd_ixgbe_macsec_enable(uint16_t port, uint8_t en, uint8_t rp);
191 
202 int rte_pmd_ixgbe_macsec_disable(uint16_t port);
203 
216 int rte_pmd_ixgbe_macsec_config_txsc(uint16_t port, uint8_t *mac);
217 
232 int rte_pmd_ixgbe_macsec_config_rxsc(uint16_t port, uint8_t *mac, uint16_t pi);
233 
253 int rte_pmd_ixgbe_macsec_select_txsa(uint16_t port, uint8_t idx, uint8_t an,
254  uint32_t pn, uint8_t *key);
255 
275 int rte_pmd_ixgbe_macsec_select_rxsa(uint16_t port, uint8_t idx, uint8_t an,
276  uint32_t pn, uint8_t *key);
277 
300 int
301 rte_pmd_ixgbe_set_vf_rxmode(uint16_t port, uint16_t vf, uint16_t rx_mask,
302  uint8_t on);
303 
320 int
321 rte_pmd_ixgbe_set_vf_rx(uint16_t port, uint16_t vf, uint8_t on);
322 
339 int
340 rte_pmd_ixgbe_set_vf_tx(uint16_t port, uint16_t vf, uint8_t on);
341 
361 int
362 rte_pmd_ixgbe_set_vf_vlan_filter(uint16_t port, uint16_t vlan,
363  uint64_t vf_mask, uint8_t vlan_on);
364 
382 int rte_pmd_ixgbe_set_vf_rate_limit(uint16_t port, uint16_t vf,
383  uint32_t tx_rate, uint64_t q_msk);
384 
404 int rte_pmd_ixgbe_set_tc_bw_alloc(uint16_t port,
405  uint8_t tc_num,
406  uint8_t *bw_weight);
407 
408 
420 int rte_pmd_ixgbe_bypass_init(uint16_t port);
421 
437 int rte_pmd_ixgbe_bypass_state_show(uint16_t port, uint32_t *state);
438 
454 int rte_pmd_ixgbe_bypass_state_set(uint16_t port, uint32_t *new_state);
455 
478 int rte_pmd_ixgbe_bypass_event_show(uint16_t port,
479  uint32_t event,
480  uint32_t *state);
481 
504 int rte_pmd_ixgbe_bypass_event_store(uint16_t port,
505  uint32_t event,
506  uint32_t state);
507 
528 int rte_pmd_ixgbe_bypass_wd_timeout_store(uint16_t port, uint32_t timeout);
529 
542 int rte_pmd_ixgbe_bypass_ver_show(uint16_t port, uint32_t *ver);
543 
564 int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port, uint32_t *wd_timeout);
565 
576 int rte_pmd_ixgbe_bypass_wd_reset(uint16_t port);
577 
589 int
590 rte_pmd_ixgbe_mdio_lock(uint16_t port);
591 
602 int
603 rte_pmd_ixgbe_mdio_unlock(uint16_t port);
604 
623 int
624 rte_pmd_ixgbe_mdio_unlocked_read(uint16_t port, uint32_t reg_addr,
625  uint32_t dev_type, uint16_t *phy_data);
626 
646 int
647 rte_pmd_ixgbe_mdio_unlocked_write(uint16_t port, uint32_t reg_addr,
648  uint32_t dev_type, uint16_t phy_data);
649 
658 };
659 
664  uint16_t vfid;
665  uint16_t msg_type;
666  uint16_t retval;
667  void *msg;
668 };
669 enum {
670  RTE_PMD_IXGBE_BYPASS_MODE_NONE,
671  RTE_PMD_IXGBE_BYPASS_MODE_NORMAL,
672  RTE_PMD_IXGBE_BYPASS_MODE_BYPASS,
673  RTE_PMD_IXGBE_BYPASS_MODE_ISOLATE,
674  RTE_PMD_IXGBE_BYPASS_MODE_NUM,
675 };
676 
677 #define RTE_PMD_IXGBE_BYPASS_MODE_VALID(x) \
678  ((x) > RTE_PMD_IXGBE_BYPASS_MODE_NONE && \
679  (x) < RTE_PMD_IXGBE_BYPASS_MODE_NUM)
680 
681 enum {
682  RTE_PMD_IXGBE_BYPASS_EVENT_NONE,
683  RTE_PMD_IXGBE_BYPASS_EVENT_START,
684  RTE_PMD_IXGBE_BYPASS_EVENT_OS_ON = RTE_PMD_IXGBE_BYPASS_EVENT_START,
685  RTE_PMD_IXGBE_BYPASS_EVENT_POWER_ON,
686  RTE_PMD_IXGBE_BYPASS_EVENT_OS_OFF,
687  RTE_PMD_IXGBE_BYPASS_EVENT_POWER_OFF,
688  RTE_PMD_IXGBE_BYPASS_EVENT_TIMEOUT,
689  RTE_PMD_IXGBE_BYPASS_EVENT_NUM
690 };
691 
692 #define RTE_PMD_IXGBE_BYPASS_EVENT_VALID(x) \
693  ((x) > RTE_PMD_IXGBE_BYPASS_EVENT_NONE && \
694  (x) < RTE_PMD_IXGBE_BYPASS_MODE_NUM)
695 
696 enum {
697  RTE_PMD_IXGBE_BYPASS_TMT_OFF, /* timeout disabled. */
698  RTE_PMD_IXGBE_BYPASS_TMT_1_5_SEC, /* timeout for 1.5 seconds */
699  RTE_PMD_IXGBE_BYPASS_TMT_2_SEC, /* timeout for 2 seconds */
700  RTE_PMD_IXGBE_BYPASS_TMT_3_SEC, /* timeout for 3 seconds */
701  RTE_PMD_IXGBE_BYPASS_TMT_4_SEC, /* timeout for 4 seconds */
702  RTE_PMD_IXGBE_BYPASS_TMT_8_SEC, /* timeout for 8 seconds */
703  RTE_PMD_IXGBE_BYPASS_TMT_16_SEC, /* timeout for 16 seconds */
704  RTE_PMD_IXGBE_BYPASS_TMT_32_SEC, /* timeout for 32 seconds */
705  RTE_PMD_IXGBE_BYPASS_TMT_NUM
706 };
707 
708 #define RTE_PMD_IXGBE_BYPASS_TMT_VALID(x) \
709  ((x) == RTE_PMD_IXGBE_BYPASS_TMT_OFF || \
710  ((x) > RTE_PMD_IXGBE_BYPASS_TMT_OFF && \
711  (x) < RTE_PMD_IXGBE_BYPASS_TMT_NUM))
712 
724 int
725 rte_pmd_ixgbe_upd_fctrl_sbp(uint16_t port, int enable);
726 
739 __rte_experimental
740 int
741 rte_pmd_ixgbe_get_fdir_info(uint16_t port, struct rte_eth_fdir_info *fdir_info);
742 
755 __rte_experimental
756 int
757 rte_pmd_ixgbe_get_fdir_stats(uint16_t port,
758  struct rte_eth_fdir_stats *fdir_stats);
759 #endif /* _PMD_IXGBE_H_ */
int rte_pmd_ixgbe_macsec_config_txsc(uint16_t port, uint8_t *mac)
int rte_pmd_ixgbe_upd_fctrl_sbp(uint16_t port, int enable)
int rte_pmd_ixgbe_set_vf_rxmode(uint16_t port, uint16_t vf, uint16_t rx_mask, uint8_t on)
int rte_pmd_ixgbe_set_vf_vlan_anti_spoof(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_bypass_state_show(uint16_t port, uint32_t *state)
int rte_pmd_ixgbe_set_tc_bw_alloc(uint16_t port, uint8_t tc_num, uint8_t *bw_weight)
int rte_pmd_ixgbe_bypass_event_show(uint16_t port, uint32_t event, uint32_t *state)
int rte_pmd_ixgbe_ping_vf(uint16_t port, uint16_t vf)
int rte_pmd_ixgbe_set_vf_rx(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_set_vf_vlan_insert(uint16_t port, uint16_t vf, uint16_t vlan_id)
int rte_pmd_ixgbe_macsec_select_txsa(uint16_t port, uint8_t idx, uint8_t an, uint32_t pn, uint8_t *key)
int rte_pmd_ixgbe_mdio_unlocked_read(uint16_t port, uint32_t reg_addr, uint32_t dev_type, uint16_t *phy_data)
int rte_pmd_ixgbe_set_tx_loopback(uint16_t port, uint8_t on)
int rte_pmd_ixgbe_set_vf_split_drop_en(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_mdio_unlock(uint16_t port)
int rte_pmd_ixgbe_set_vf_rate_limit(uint16_t port, uint16_t vf, uint32_t tx_rate, uint64_t q_msk)
int rte_pmd_ixgbe_macsec_config_rxsc(uint16_t port, uint8_t *mac, uint16_t pi)
int rte_pmd_ixgbe_set_all_queues_drop_en(uint16_t port, uint8_t on)
int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port, uint32_t *wd_timeout)
int rte_pmd_ixgbe_macsec_enable(uint16_t port, uint8_t en, uint8_t rp)
int rte_pmd_ixgbe_mdio_lock(uint16_t port)
__rte_experimental int rte_pmd_ixgbe_get_fdir_stats(uint16_t port, struct rte_eth_fdir_stats *fdir_stats)
int rte_pmd_ixgbe_set_vf_mac_anti_spoof(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_bypass_init(uint16_t port)
int rte_pmd_ixgbe_set_vf_mac_addr(uint16_t port, uint16_t vf, struct rte_ether_addr *mac_addr)
int rte_pmd_ixgbe_set_vf_vlan_stripq(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_bypass_wd_timeout_store(uint16_t port, uint32_t timeout)
int rte_pmd_ixgbe_set_vf_vlan_filter(uint16_t port, uint16_t vlan, uint64_t vf_mask, uint8_t vlan_on)
int rte_pmd_ixgbe_bypass_ver_show(uint16_t port, uint32_t *ver)
__rte_experimental int rte_pmd_ixgbe_get_fdir_info(uint16_t port, struct rte_eth_fdir_info *fdir_info)
int rte_pmd_ixgbe_bypass_wd_reset(uint16_t port)
int rte_pmd_ixgbe_macsec_disable(uint16_t port)
int rte_pmd_ixgbe_bypass_event_store(uint16_t port, uint32_t event, uint32_t state)
int rte_pmd_ixgbe_macsec_select_rxsa(uint16_t port, uint8_t idx, uint8_t an, uint32_t pn, uint8_t *key)
int rte_pmd_ixgbe_bypass_state_set(uint16_t port, uint32_t *new_state)
rte_pmd_ixgbe_mb_event_rsp
int rte_pmd_ixgbe_set_vf_tx(uint16_t port, uint16_t vf, uint8_t on)
int rte_pmd_ixgbe_mdio_unlocked_write(uint16_t port, uint32_t reg_addr, uint32_t dev_type, uint16_t phy_data)