rte_bbdev_op.h

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/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2017 Intel Corporation
 */

#ifndef _RTE_BBDEV_OP_H_
#define _RTE_BBDEV_OP_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <stdint.h>

#include <rte_compat.h>
#include <rte_common.h>
#include <rte_mbuf.h>
#include <rte_memory.h>
#include <rte_mempool.h>

/* Number of columns in sub-block interleaver (36.212, section 5.1.4.1.1) */
#define RTE_BBDEV_TURBO_C_SUBBLOCK (32)
/* Maximum size of Transport Block (36.213, Table, Table 7.1.7.2.5-1) */
#define RTE_BBDEV_TURBO_MAX_TB_SIZE (391656)
/* Maximum size of Code Block (36.212, Table 5.1.3-3) */
#define RTE_BBDEV_TURBO_MAX_CB_SIZE (6144)
/* Maximum size of Code Block */
#define RTE_BBDEV_LDPC_MAX_CB_SIZE (8448)
/* Minimum size of Code Block */
#define RTE_BBDEV_LDPC_MIN_CB_SIZE (40)
/* Maximum E size we can manage with default mbuf */
#define RTE_BBDEV_LDPC_E_MAX_MBUF (64000)
/* Minimum size of Code Block (36.212, Table 5.1.3-3) */
#define RTE_BBDEV_TURBO_MIN_CB_SIZE (40)
/* Maximum size of circular buffer */
#define RTE_BBDEV_TURBO_MAX_KW (18528)
/*
 * Turbo: Maximum number of Code Blocks in Transport Block. It is calculated
 * based on maximum size of one Code Block and one Transport Block
 * (considering CRC24A and CRC24B):
 * (391656 + 24) / (6144 - 24) = 64
 */
#define RTE_BBDEV_TURBO_MAX_CODE_BLOCKS (64)
/* LDPC:  Maximum number of Code Blocks in Transport Block.*/
#define RTE_BBDEV_LDPC_MAX_CODE_BLOCKS (256)
/* 12 CS maximum */
#define RTE_BBDEV_MAX_CS_2 (6)
#define RTE_BBDEV_MAX_CS   (12)
/* MLD-TS up to 4 layers */
#define RTE_BBDEV_MAX_MLD_LAYERS (4)
/* 12 SB per RB */
#define RTE_BBDEV_SCPERRB (12)

/*
 * Maximum size to be used to manage the enum rte_bbdev_op_type
 * including padding for future enum insertion.
 * The enum values must be explicitly kept smaller or equal to this padded maximum size.
 */
#define RTE_BBDEV_OP_TYPE_SIZE_MAX 8

enum rte_bbdev_op_td_flag_bitmasks {
    RTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE = (1ULL << 0),
    RTE_BBDEV_TURBO_CRC_TYPE_24B = (1ULL << 1),
    RTE_BBDEV_TURBO_EQUALIZER = (1ULL << 2),
    RTE_BBDEV_TURBO_SOFT_OUT_SATURATE = (1ULL << 3),
    RTE_BBDEV_TURBO_HALF_ITERATION_EVEN = (1ULL << 4),
    RTE_BBDEV_TURBO_CONTINUE_CRC_MATCH = (1ULL << 5),
    RTE_BBDEV_TURBO_SOFT_OUTPUT = (1ULL << 6),
    RTE_BBDEV_TURBO_EARLY_TERMINATION = (1ULL << 7),
    RTE_BBDEV_TURBO_DEC_INTERRUPTS = (1ULL << 9),
    RTE_BBDEV_TURBO_POS_LLR_1_BIT_IN = (1ULL << 10),
    RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN = (1ULL << 11),
    RTE_BBDEV_TURBO_POS_LLR_1_BIT_SOFT_OUT = (1ULL << 12),
    RTE_BBDEV_TURBO_NEG_LLR_1_BIT_SOFT_OUT = (1ULL << 13),
    RTE_BBDEV_TURBO_MAP_DEC = (1ULL << 14),
    RTE_BBDEV_TURBO_DEC_SCATTER_GATHER = (1ULL << 15),
    RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP = (1ULL << 16),
    RTE_BBDEV_TURBO_DEC_CRC_24B_DROP = (1ULL << 17)
};


enum rte_bbdev_op_te_flag_bitmasks {
    RTE_BBDEV_TURBO_RV_INDEX_BYPASS = (1ULL << 0),
    RTE_BBDEV_TURBO_RATE_MATCH = (1ULL << 1),
    RTE_BBDEV_TURBO_CRC_24B_ATTACH = (1ULL << 2),
    RTE_BBDEV_TURBO_CRC_24A_ATTACH = (1ULL << 3),
    RTE_BBDEV_TURBO_ENC_INTERRUPTS = (1ULL << 4),
    RTE_BBDEV_TURBO_ENC_SCATTER_GATHER = (1ULL << 5)
};

enum rte_bbdev_op_ldpcdec_flag_bitmasks {
    RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK = (1ULL << 0),
    RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK = (1ULL << 1),
    RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP = (1ULL << 2),
    RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK = (1ULL << 3),
    RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS = (1ULL << 4),
    RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE = (1ULL << 5),
    RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE = (1ULL << 6),
    RTE_BBDEV_LDPC_DECODE_BYPASS = (1ULL << 7),
    RTE_BBDEV_LDPC_SOFT_OUT_ENABLE = (1ULL << 8),
    RTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS = (1ULL << 9),
    RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS = (1ULL << 10),
    RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE = (1ULL << 11),
    RTE_BBDEV_LDPC_DEC_INTERRUPTS = (1ULL << 12),
    RTE_BBDEV_LDPC_DEC_SCATTER_GATHER = (1ULL << 13),
    RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION = (1ULL << 14),
    RTE_BBDEV_LDPC_LLR_COMPRESSION = (1ULL << 15),
    RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE = (1ULL << 16),
    RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE = (1ULL << 17),
    RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK = (1ULL << 18),
    RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 19),
    RTE_BBDEV_LDPC_HARQ_4BIT_COMPRESSION = (1ULL << 20)
};

enum rte_bbdev_op_ldpcenc_flag_bitmasks {
    RTE_BBDEV_LDPC_INTERLEAVER_BYPASS = (1ULL << 0),
    RTE_BBDEV_LDPC_RATE_MATCH = (1ULL << 1),
    RTE_BBDEV_LDPC_CRC_24A_ATTACH = (1ULL << 2),
    RTE_BBDEV_LDPC_CRC_24B_ATTACH = (1ULL << 3),
    RTE_BBDEV_LDPC_CRC_16_ATTACH = (1ULL << 4),
    RTE_BBDEV_LDPC_ENC_INTERRUPTS = (1ULL << 5),
    RTE_BBDEV_LDPC_ENC_SCATTER_GATHER = (1ULL << 6),
    RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7)
};

enum rte_bbdev_op_fft_flag_bitmasks {
    RTE_BBDEV_FFT_WINDOWING = (1ULL << 0),
    RTE_BBDEV_FFT_CS_ADJUSTMENT = (1ULL << 1),
    RTE_BBDEV_FFT_DFT_BYPASS = (1ULL << 2),
    RTE_BBDEV_FFT_IDFT_BYPASS = (1ULL << 3),
    RTE_BBDEV_FFT_WINDOWING_BYPASS = (1ULL << 4),
    RTE_BBDEV_FFT_POWER_MEAS = (1ULL << 5),
    RTE_BBDEV_FFT_FP16_INPUT = (1ULL << 6),
    RTE_BBDEV_FFT_FP16_OUTPUT = (1ULL << 7),
    RTE_BBDEV_FFT_TIMING_OFFSET_PER_CS = (1ULL << 8),
    RTE_BBDEV_FFT_TIMING_ERROR = (1ULL << 9),
    RTE_BBDEV_FFT_DEWINDOWING = (1ULL << 10),
    RTE_BBDEV_FFT_FREQ_RESAMPLING = (1ULL << 11)
};

enum rte_bbdev_op_mldts_flag_bitmasks {
    RTE_BBDEV_MLDTS_REP = (1ULL << 0),
};

enum rte_bbdev_op_cb_mode {
    RTE_BBDEV_TRANSPORT_BLOCK = 0,
    RTE_BBDEV_CODE_BLOCK = 1,
};

struct rte_bbdev_op_data {
    struct rte_mbuf *data;
    uint32_t offset;
    uint32_t length;
};

struct rte_bbdev_op_dec_turbo_cb_params {
    uint16_t k;
    uint32_t e;
};

struct rte_bbdev_op_dec_ldpc_cb_params {
    uint32_t e;
};

struct rte_bbdev_op_dec_turbo_tb_params {
    uint16_t k_neg;
    uint16_t k_pos;
    uint8_t c_neg;
    uint8_t c;
    uint8_t cab;
    uint32_t ea;
    uint32_t eb;
    uint8_t r;
};

struct rte_bbdev_op_dec_ldpc_tb_params {
    uint32_t ea;
    uint32_t eb;
    uint8_t c;
    uint8_t r;
    uint8_t cab;
};

/* Structure rte_bbdev_op_turbo_dec 8< */
struct rte_bbdev_op_turbo_dec {
    struct rte_bbdev_op_data input;
    struct rte_bbdev_op_data hard_output;
    struct rte_bbdev_op_data soft_output;

    uint32_t op_flags;

    uint8_t rv_index;
    uint8_t iter_min:4;
    uint8_t iter_max:4;
    uint8_t iter_count;
    uint8_t ext_scale;
    uint8_t num_maps;

    uint8_t code_block_mode;
    union {
        struct rte_bbdev_op_dec_turbo_cb_params cb_params;
        struct rte_bbdev_op_dec_turbo_tb_params tb_params;
    };
};
/* >8 End of structure rte_bbdev_op_turbo_dec. */

/* Structure rte_bbdev_op_ldpc_dec 8< */
struct rte_bbdev_op_ldpc_dec {
    struct rte_bbdev_op_data input;
    struct rte_bbdev_op_data hard_output;
    struct rte_bbdev_op_data soft_output;
    struct rte_bbdev_op_data harq_combined_input;
    struct rte_bbdev_op_data harq_combined_output;

    uint32_t op_flags;

    uint8_t rv_index;
    uint8_t iter_max;
    uint8_t iter_count;
    uint8_t basegraph;
    uint16_t z_c;
    uint16_t n_cb;
    uint8_t q_m;
    uint16_t n_filler;
    uint8_t code_block_mode;
    union {
        struct rte_bbdev_op_dec_ldpc_cb_params cb_params;
        struct rte_bbdev_op_dec_ldpc_tb_params tb_params;
    };
};
/* >8 End of structure rte_bbdev_op_ldpc_dec. */

struct rte_bbdev_op_enc_turbo_cb_params {
    uint16_t k;
    uint32_t e;
    uint16_t ncb;
};

struct rte_bbdev_op_enc_turbo_tb_params {
    uint16_t k_neg;
    uint16_t k_pos;
    uint8_t c_neg;
    uint8_t c;
    uint8_t cab;
    uint32_t ea;
    uint32_t eb;
    uint16_t ncb_neg;
    uint16_t ncb_pos;
    uint8_t r;
};

struct rte_bbdev_op_enc_ldpc_cb_params {
    uint32_t e;
};

struct rte_bbdev_op_enc_ldpc_tb_params {
    uint32_t ea;
    uint32_t eb;
    uint8_t c;
    uint8_t r;
    uint8_t cab;
};

/* Structure rte_bbdev_op_turbo_enc 8< */
struct rte_bbdev_op_turbo_enc {
    struct rte_bbdev_op_data input;
    struct rte_bbdev_op_data output;
    uint32_t op_flags;

    uint8_t rv_index;
    uint8_t code_block_mode;
    union {
        struct rte_bbdev_op_enc_turbo_cb_params cb_params;
        struct rte_bbdev_op_enc_turbo_tb_params tb_params;
    };
};
/* >8 End of structure rte_bbdev_op_turbo_enc. */

/* Structure rte_bbdev_op_ldpc_enc 8< */
struct rte_bbdev_op_ldpc_enc {
    struct rte_bbdev_op_data input;
    struct rte_bbdev_op_data output;

    uint32_t op_flags;

    uint8_t rv_index;
    uint8_t basegraph;
    uint16_t z_c;
    uint16_t n_cb;
    uint8_t q_m;
    uint16_t n_filler;
    uint8_t code_block_mode;
    union {
        struct rte_bbdev_op_enc_ldpc_cb_params cb_params;
        struct rte_bbdev_op_enc_ldpc_tb_params tb_params;
    };
};
/* >8 End of structure rte_bbdev_op_ldpc_enc. */

/* Structure rte_bbdev_op_fft 8< */
struct rte_bbdev_op_fft {
    struct rte_bbdev_op_data base_input;
    struct rte_bbdev_op_data base_output;
    struct rte_bbdev_op_data dewindowing_input;
    struct rte_bbdev_op_data power_meas_output;
    uint32_t op_flags;
    uint16_t input_sequence_size;
    uint16_t input_leading_padding;
    uint16_t output_sequence_size;
    uint16_t output_leading_depadding;
    uint8_t window_index[RTE_BBDEV_MAX_CS_2];
    uint16_t cs_bitmap;
    uint8_t num_antennas_log2;
    uint8_t idft_log2;
    uint8_t dft_log2;
    int8_t cs_time_adjustment;
    int8_t idft_shift;
    int8_t dft_shift;
    uint16_t ncs_reciprocal;
    uint16_t power_shift;
    uint16_t fp16_exp_adjust;
    int8_t freq_resample_mode;
    uint16_t output_depadded_size;
    uint16_t cs_theta_0[RTE_BBDEV_MAX_CS];
    uint32_t cs_theta_d[RTE_BBDEV_MAX_CS];
    /* Time offset per CS of time domain samples. */
    int8_t time_offset[RTE_BBDEV_MAX_CS];
};
/* >8 End of structure rte_bbdev_op_fft. */

/* Structure rte_bbdev_op_mldts 8< */
struct rte_bbdev_op_mldts {
    struct rte_bbdev_op_data qhy_input;
    struct rte_bbdev_op_data r_input;
    struct rte_bbdev_op_data output;
    uint32_t op_flags;
    uint16_t num_rbs;
    uint16_t num_layers;
    uint8_t q_m[RTE_BBDEV_MAX_MLD_LAYERS];
    uint8_t r_rep;
    uint8_t c_rep;
};
/* >8 End of structure rte_bbdev_op_mldts. */

struct rte_bbdev_op_cap_turbo_dec {
    uint32_t capability_flags;
    int8_t max_llr_modulus;
    uint8_t num_buffers_src;  
    uint8_t num_buffers_hard_out;
    uint8_t num_buffers_soft_out;
};

struct rte_bbdev_op_cap_turbo_enc {
    uint32_t capability_flags;
    uint8_t num_buffers_src;
    uint8_t num_buffers_dst;
};

struct rte_bbdev_op_cap_ldpc_dec {
    uint32_t capability_flags;
    int8_t llr_size;
    int8_t llr_decimals;
    uint16_t num_buffers_src;
    uint16_t num_buffers_hard_out;
    uint16_t num_buffers_soft_out;
};

struct rte_bbdev_op_cap_ldpc_enc {
    uint32_t capability_flags;
    uint16_t num_buffers_src;
    uint16_t num_buffers_dst;
};

struct rte_bbdev_op_cap_fft {
    uint32_t capability_flags;
    uint16_t num_buffers_src;
    uint16_t num_buffers_dst;
    uint16_t fft_windows_num;
};

struct rte_bbdev_op_cap_mld {
    uint32_t capability_flags;
    uint16_t num_buffers_src;
    uint16_t num_buffers_dst;
};

enum rte_bbdev_op_type {
    RTE_BBDEV_OP_NONE,  
    RTE_BBDEV_OP_TURBO_DEC,  
    RTE_BBDEV_OP_TURBO_ENC,  
    RTE_BBDEV_OP_LDPC_DEC,  
    RTE_BBDEV_OP_LDPC_ENC,  
    RTE_BBDEV_OP_FFT,  
    RTE_BBDEV_OP_MLDTS,  
    /* Note: RTE_BBDEV_OP_TYPE_SIZE_MAX must be larger or equal to maximum enum value */
};

enum {
    RTE_BBDEV_DRV_ERROR,
    RTE_BBDEV_DATA_ERROR,
    RTE_BBDEV_CRC_ERROR,
    RTE_BBDEV_SYNDROME_ERROR,
    RTE_BBDEV_ENGINE_ERROR
};

struct rte_bbdev_enc_op {
    int status;
    struct rte_mempool *mempool;
    void *opaque_data;
    union {
        struct rte_bbdev_op_turbo_enc turbo_enc;
        struct rte_bbdev_op_ldpc_enc ldpc_enc;
    };
};

struct rte_bbdev_dec_op {
    int status;
    struct rte_mempool *mempool;
    void *opaque_data;
    union {
        struct rte_bbdev_op_turbo_dec turbo_dec;
        struct rte_bbdev_op_ldpc_dec ldpc_dec;
    };
};

struct rte_bbdev_fft_op {
    int status;
    struct rte_mempool *mempool;
    void *opaque_data;
    struct rte_bbdev_op_fft fft;
};

struct rte_bbdev_mldts_op {
    int status;
    struct rte_mempool *mempool;
    void *opaque_data;
    struct rte_bbdev_op_mldts mldts;
};

struct rte_bbdev_op_cap {
    enum rte_bbdev_op_type type;  
    union {
        struct rte_bbdev_op_cap_turbo_dec turbo_dec;
        struct rte_bbdev_op_cap_turbo_enc turbo_enc;
        struct rte_bbdev_op_cap_ldpc_dec ldpc_dec;
        struct rte_bbdev_op_cap_ldpc_enc ldpc_enc;
        struct rte_bbdev_op_cap_fft fft;
        struct rte_bbdev_op_cap_mld mld;
    } cap;  
};

struct rte_bbdev_op_pool_private {
    enum rte_bbdev_op_type type;  
};

const char*
rte_bbdev_op_type_str(enum rte_bbdev_op_type op_type);

struct rte_mempool *
rte_bbdev_op_pool_create(const char *name, enum rte_bbdev_op_type type,
        unsigned int num_elements, unsigned int cache_size,
        int socket_id);

static inline int
rte_bbdev_enc_op_alloc_bulk(struct rte_mempool *mempool,
        struct rte_bbdev_enc_op **ops, unsigned int num_ops)
{
    struct rte_bbdev_op_pool_private *priv;

    /* Check type */
    priv = (struct rte_bbdev_op_pool_private *)
            rte_mempool_get_priv(mempool);
    if (unlikely((priv->type != RTE_BBDEV_OP_TURBO_ENC) &&
                    (priv->type != RTE_BBDEV_OP_LDPC_ENC)))
        return -EINVAL;

    /* Get elements */
    return rte_mempool_get_bulk(mempool, (void **)ops, num_ops);
}

static inline int
rte_bbdev_dec_op_alloc_bulk(struct rte_mempool *mempool,
        struct rte_bbdev_dec_op **ops, unsigned int num_ops)
{
    struct rte_bbdev_op_pool_private *priv;

    /* Check type */
    priv = (struct rte_bbdev_op_pool_private *)
            rte_mempool_get_priv(mempool);
    if (unlikely((priv->type != RTE_BBDEV_OP_TURBO_DEC) &&
                    (priv->type != RTE_BBDEV_OP_LDPC_DEC)))
        return -EINVAL;

    /* Get elements */
    return rte_mempool_get_bulk(mempool, (void **)ops, num_ops);
}

static inline int
rte_bbdev_fft_op_alloc_bulk(struct rte_mempool *mempool,
        struct rte_bbdev_fft_op **ops, unsigned int num_ops)
{
    struct rte_bbdev_op_pool_private *priv;

    /* Check type */
    priv = (struct rte_bbdev_op_pool_private *)rte_mempool_get_priv(mempool);
    if (unlikely(priv->type != RTE_BBDEV_OP_FFT))
        return -EINVAL;

    /* Get elements */
    return rte_mempool_get_bulk(mempool, (void **)ops, num_ops);
}

__rte_experimental
static inline int
rte_bbdev_mldts_op_alloc_bulk(struct rte_mempool *mempool,
        struct rte_bbdev_mldts_op **ops, uint16_t num_ops)
{
    struct rte_bbdev_op_pool_private *priv;

    /* Check type */
    priv = (struct rte_bbdev_op_pool_private *)rte_mempool_get_priv(mempool);
    if (unlikely(priv->type != RTE_BBDEV_OP_MLDTS))
        return -EINVAL;

    /* Get elements */
    return rte_mempool_get_bulk(mempool, (void **)ops, num_ops);
}

static inline void
rte_bbdev_dec_op_free_bulk(struct rte_bbdev_dec_op **ops, unsigned int num_ops)
{
    if (num_ops > 0)
        rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops);
}

static inline void
rte_bbdev_enc_op_free_bulk(struct rte_bbdev_enc_op **ops, unsigned int num_ops)
{
    if (num_ops > 0)
        rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops);
}

static inline void
rte_bbdev_fft_op_free_bulk(struct rte_bbdev_fft_op **ops, unsigned int num_ops)
{
    if (num_ops > 0)
        rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops);
}

__rte_experimental
static inline void
rte_bbdev_mldts_op_free_bulk(struct rte_bbdev_mldts_op **ops, unsigned int num_ops)
{
    if (num_ops > 0)
        rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops);
}

#ifdef __cplusplus
}
#endif

#endif /* _RTE_BBDEV_OP_H_ */