14#include <rte_compat.h>
74struct rte_pmd_cnxk_sec_action {
80 uint16_t sa_hi, sa_lo;
87#define RTE_PMD_CNXK_CTX_MAX_CKEY_LEN 32
88#define RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN 128
91#define RTE_PMD_CNXK_AR_WIN_SIZE_MIN 64
92#define RTE_PMD_CNXK_AR_WIN_SIZE_MAX 4096
93#define RTE_PMD_CNXK_LOG_MIN_AR_WIN_SIZE_M1 5
96#define RTE_PMD_CNXK_AR_WINBITS_SZ (RTE_ALIGN_CEIL(RTE_PMD_CNXK_AR_WIN_SIZE_MAX, 64) / 64)
153 uint64_t reserved_0_2 : 3;
154 uint64_t address : 57;
311 uint64_t rsvd10 : 32;
507 uint64_t reserved_17_63 : 47;
509 uint64_t reserved_64_127;
533struct rte_pmd_cnxk_inl_dev_q;
554 uint32_t len,
bool inb);
574 uint32_t len,
bool inb);
__rte_experimental union rte_pmd_cnxk_cpt_res_s * rte_pmd_cnxk_inl_ipsec_res(struct rte_mbuf *mbuf)
__rte_experimental const char * rte_pmd_cnxk_model_str_get(void)
rte_pmd_cnxk_sec_action_alg
@ RTE_PMD_CNXK_SEC_ACTION_ALG4
@ RTE_PMD_CNXK_SEC_ACTION_ALG2
@ RTE_PMD_CNXK_SEC_ACTION_ALG1
@ RTE_PMD_CNXK_SEC_ACTION_ALG0
@ RTE_PMD_CNXK_SEC_ACTION_ALG3
rte_pmd_cnxk_cpt_q_stats_type
@ RTE_PMD_CNXK_CPT_Q_STATS_ETHDEV
@ RTE_PMD_CNXK_CPT_Q_STATS_INL_DEV
@ RTE_PMD_CNXK_CPT_Q_STATS_KERNEL
#define RTE_PMD_CNXK_AR_WINBITS_SZ
__rte_experimental int rte_pmd_cnxk_cpt_q_stats_get(uint16_t portid, enum rte_pmd_cnxk_cpt_q_stats_type type, struct rte_pmd_cnxk_cpt_q_stats *stats, uint16_t idx)
__rte_experimental struct rte_pmd_cnxk_inl_dev_q * rte_pmd_cnxk_inl_dev_qptr_get(void)
__rte_experimental int rte_pmd_cnxk_sa_flush(uint16_t portid, union rte_pmd_cnxk_ipsec_hw_sa *sess, bool inb)
__rte_experimental void rte_pmd_cnxk_hw_inline_inb_cfg_set(uint16_t portid, struct rte_pmd_cnxk_ipsec_inb_cfg *cfg)
__rte_experimental union rte_pmd_cnxk_ipsec_hw_sa * rte_pmd_cnxk_hw_session_base_get(uint16_t portid, bool inb)
__rte_experimental int rte_pmd_cnxk_hw_sa_read(uint16_t portid, void *sess, union rte_pmd_cnxk_ipsec_hw_sa *data, uint32_t len, bool inb)
__rte_experimental uint16_t rte_pmd_cnxk_inl_dev_submit(struct rte_pmd_cnxk_inl_dev_q *qptr, void *inst, uint16_t nb_inst)
__rte_experimental int rte_pmd_cnxk_hw_sa_write(uint16_t portid, void *sess, union rte_pmd_cnxk_ipsec_hw_sa *data, uint32_t len, bool inb)
uint64_t ar_winbits[RTE_PMD_CNXK_AR_WINBITS_SZ]
union rte_pmd_cnxk_ipsec_inb_sa::@10 w8
uint64_t count_glb_octets
uint8_t hmac_opad_ipad[RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN]
uint64_t tport_l4_incr_csum
struct rte_pmd_cnxk_ipsec_inb_ctx_update_reg ctx
union rte_pmd_cnxk_ipsec_inb_sa::@11 w10
uint64_t udp_ports_verify
union rte_pmd_cnxk_ipsec_inb_sa::@7 w0
union rte_pmd_cnxk_ipsec_inb_sa::@9 w2
union rte_pmd_cnxk_ipsec_inb_sa::@8 w1
uint8_t cipher_key[RTE_PMD_CNXK_CTX_MAX_CKEY_LEN]
union rte_pmd_cnxk_ipsec_outer_ip_hdr outer_hdr
union rte_pmd_cnxk_ipsec_outb_sa::@19 w2
struct rte_pmd_cnxk_ipsec_outb_ctx_update_reg ctx
uint64_t count_glb_octets
uint8_t hmac_opad_ipad[RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN]
union rte_pmd_cnxk_ipsec_outb_iv iv
union rte_pmd_cnxk_ipsec_outb_sa::@17 w0
union rte_pmd_cnxk_ipsec_outb_sa::@18 w1
uint64_t ipv4_df_or_ipv6_flw_lbl
union rte_pmd_cnxk_ipsec_outb_sa::@20 w10
uint8_t cipher_key[RTE_PMD_CNXK_CTX_MAX_CKEY_LEN]
union rte_pmd_cnxk_ipsec_outer_ip_hdr outer_hdr
uint64_t ipv4_df_src_or_ipv6_flw_lbl_src
struct rte_pmd_cnxk_ipsec_outb_sa outb
struct rte_pmd_cnxk_ipsec_inb_sa inb