DPDK 25.03.0-rc0
rte_acl.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
3 */
4
5#ifndef _RTE_ACL_H_
6#define _RTE_ACL_H_
7
14#include <rte_acl_osdep.h>
15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20#define RTE_ACL_MAX_CATEGORIES 16
21
22#define RTE_ACL_RESULTS_MULTIPLIER (XMM_SIZE / sizeof(uint32_t))
23
24#define RTE_ACL_MAX_LEVELS 64
25#define RTE_ACL_MAX_FIELDS 64
26
27union rte_acl_field_types {
28 uint8_t u8;
29 uint16_t u16;
30 uint32_t u32;
31 uint64_t u64;
32};
33
34enum {
35 RTE_ACL_FIELD_TYPE_MASK = 0,
36 RTE_ACL_FIELD_TYPE_RANGE,
37 RTE_ACL_FIELD_TYPE_BITMASK
38};
39
52 uint8_t type;
53 uint8_t size;
54 uint8_t field_index;
55 uint8_t input_index;
56 uint32_t offset;
57};
58
64 uint32_t num_categories;
65 uint32_t num_fields;
66 struct rte_acl_field_def defs[RTE_ACL_MAX_FIELDS];
68 size_t max_size;
70};
71
76 union rte_acl_field_types value;
78 union rte_acl_field_types mask_range;
85};
86
87enum {
88 RTE_ACL_TYPE_SHIFT = 29,
89 RTE_ACL_MAX_INDEX = RTE_LEN2MASK(RTE_ACL_TYPE_SHIFT, uint32_t),
90 RTE_ACL_MAX_PRIORITY = RTE_ACL_MAX_INDEX,
91 RTE_ACL_MIN_PRIORITY = 1,
92};
93
94#define RTE_ACL_MASKLEN_TO_BITMASK(v, s) \
95((v) == 0 ? (v) : (typeof(v))((uint64_t)-1 << ((s) * CHAR_BIT - (v))))
96
101 uint32_t category_mask;
102 int32_t priority;
103 uint32_t userdata;
104};
105
111#define RTE_ACL_RULE_DEF(name, fld_num) struct name {\
112 struct rte_acl_rule_data data; \
113 struct rte_acl_field field[fld_num]; \
114}
115
116RTE_ACL_RULE_DEF(rte_acl_rule,);
117
118#define RTE_ACL_RULE_SZ(fld_num) \
119 (sizeof(struct rte_acl_rule) + sizeof(struct rte_acl_field) * (fld_num))
120
121
123#define RTE_ACL_NAMESIZE 32
124
129 const char *name;
131 uint32_t rule_size;
132 uint32_t max_rule_num;
133};
134
135
147struct rte_acl_ctx *
148rte_acl_create(const struct rte_acl_param *param);
149
160struct rte_acl_ctx *
161rte_acl_find_existing(const char *name);
162
170void
171rte_acl_free(struct rte_acl_ctx *ctx);
172
192int
193rte_acl_add_rules(struct rte_acl_ctx *ctx, const struct rte_acl_rule *rules,
194 uint32_t num);
195
204void
205rte_acl_reset_rules(struct rte_acl_ctx *ctx);
206
221int
222rte_acl_build(struct rte_acl_ctx *ctx, const struct rte_acl_config *cfg);
223
232void
233rte_acl_reset(struct rte_acl_ctx *ctx);
234
239 RTE_ACL_CLASSIFY_DEFAULT = 0,
247};
248
278extern int
279rte_acl_classify(const struct rte_acl_ctx *ctx,
280 const uint8_t **data,
281 uint32_t *results, uint32_t num,
282 uint32_t categories);
283
318extern int
319rte_acl_classify_alg(const struct rte_acl_ctx *ctx,
320 const uint8_t **data,
321 uint32_t *results, uint32_t num,
322 uint32_t categories,
323 enum rte_acl_classify_alg alg);
324
325/*
326 * Override the default classifier function for a given ACL context.
327 * @param ctx
328 * ACL context to change classify function for.
329 * @param alg
330 * New default classify algorithm for given ACL context.
331 * It is the caller responsibility to ensure that the value refers to the
332 * existing algorithm, and that it could be run on the given CPU.
333 * The max SIMD bitwidth value in EAL must also allow for the chosen algorithm.
334 * @return
335 * - -EINVAL if the parameters are invalid.
336 * - -ENOTSUP requested algorithm is not supported by given platform.
337 * - Zero if operation completed successfully.
338 */
339extern int
340rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx,
341 enum rte_acl_classify_alg alg);
342
349void
350rte_acl_dump(const struct rte_acl_ctx *ctx);
351
355void
357
358#ifdef __cplusplus
359}
360#endif
361
362#endif /* _RTE_ACL_H_ */
void rte_acl_list_dump(void)
struct rte_acl_ctx * rte_acl_find_existing(const char *name)
void rte_acl_dump(const struct rte_acl_ctx *ctx)
int rte_acl_add_rules(struct rte_acl_ctx *ctx, const struct rte_acl_rule *rules, uint32_t num)
void rte_acl_reset(struct rte_acl_ctx *ctx)
void rte_acl_reset_rules(struct rte_acl_ctx *ctx)
rte_acl_classify_alg
Definition: rte_acl.h:238
@ RTE_ACL_CLASSIFY_NEON
Definition: rte_acl.h:243
@ RTE_ACL_CLASSIFY_AVX2
Definition: rte_acl.h:242
@ RTE_ACL_CLASSIFY_SSE
Definition: rte_acl.h:241
@ RTE_ACL_CLASSIFY_SCALAR
Definition: rte_acl.h:240
@ RTE_ACL_CLASSIFY_AVX512X32
Definition: rte_acl.h:246
@ RTE_ACL_CLASSIFY_AVX512X16
Definition: rte_acl.h:245
@ RTE_ACL_CLASSIFY_ALTIVEC
Definition: rte_acl.h:244
void rte_acl_free(struct rte_acl_ctx *ctx)
int rte_acl_classify(const struct rte_acl_ctx *ctx, const uint8_t **data, uint32_t *results, uint32_t num, uint32_t categories)
struct rte_acl_ctx * rte_acl_create(const struct rte_acl_param *param)
#define RTE_ACL_RULE_DEF(name, fld_num)
Definition: rte_acl.h:111
int rte_acl_build(struct rte_acl_ctx *ctx, const struct rte_acl_config *cfg)
#define RTE_LEN2MASK(ln, tp)
Definition: rte_common.h:789
uint32_t num_fields
Definition: rte_acl.h:65
uint32_t num_categories
Definition: rte_acl.h:64
struct rte_acl_field_def defs[RTE_ACL_MAX_FIELDS]
Definition: rte_acl.h:66
size_t max_size
Definition: rte_acl.h:68
uint8_t type
Definition: rte_acl.h:52
uint32_t offset
Definition: rte_acl.h:56
uint8_t input_index
Definition: rte_acl.h:55
uint8_t field_index
Definition: rte_acl.h:54
uint8_t size
Definition: rte_acl.h:53
union rte_acl_field_types mask_range
Definition: rte_acl.h:78
union rte_acl_field_types value
Definition: rte_acl.h:76
int socket_id
Definition: rte_acl.h:130
const char * name
Definition: rte_acl.h:129
uint32_t max_rule_num
Definition: rte_acl.h:132
uint32_t rule_size
Definition: rte_acl.h:131
int32_t priority
Definition: rte_acl.h:102
uint32_t userdata
Definition: rte_acl.h:103
uint32_t category_mask
Definition: rte_acl.h:101