DPDK  24.07.0
Data Fields
rte_dma_port_param Struct Reference

#include <rte_dmadev.h>

Data Fields

enum rte_dma_port_type port_type
 
uint64_t reserved [2]
 
uint64_t coreid: 4
 
uint64_t pfid: 8
 
uint64_t vfen: 1
 
uint64_t vfid: 16
 
uint64_t pasid: 20
 
uint64_t attr: 3
 
uint64_t ph: 2
 
uint64_t st: 16
 
struct {
   uint64_t   coreid: 4
 
   uint64_t   pfid: 8
 
   uint64_t   vfen: 1
 
   uint64_t   vfid: 16
 
   uint64_t   pasid: 20
 
   uint64_t   attr: 3
 
   uint64_t   ph: 2
 
   uint64_t   st: 16
 
pcie
 

Detailed Description

A structure used to descript DMA access port parameters.

See also
struct rte_dma_vchan_conf::src_port
struct rte_dma_vchan_conf::dst_port

Definition at line 451 of file rte_dmadev.h.

Field Documentation

◆ port_type

enum rte_dma_port_type port_type

The device access port type.

See also
enum rte_dma_port_type

Definition at line 456 of file rte_dmadev.h.

◆ coreid

uint64_t coreid

PCIe core id used.

Definition at line 508 of file rte_dmadev.h.

◆ pfid

uint64_t pfid

PF id used.

Definition at line 509 of file rte_dmadev.h.

◆ vfen

uint64_t vfen

VF enable bit.

Definition at line 510 of file rte_dmadev.h.

◆ vfid

uint64_t vfid

VF id used.

Definition at line 511 of file rte_dmadev.h.

◆ pasid

uint64_t pasid

The pasid filed in TLP packet.

Definition at line 513 of file rte_dmadev.h.

◆ attr

uint64_t attr

The attributes filed in TLP packet.

Definition at line 515 of file rte_dmadev.h.

◆ ph

uint64_t ph

The processing hint filed in TLP packet.

Definition at line 517 of file rte_dmadev.h.

◆ st

uint64_t st

The steering tag filed in TLP packet.

Definition at line 519 of file rte_dmadev.h.

◆ pcie

__extension__ { ... } pcie

PCIe access port parameters.

The following model shows SoC's PCIe module connects to multiple PCIe hosts and multiple endpoints. The PCIe module has an integrated DMA controller.

If the DMA wants to access the memory of host A, it can be initiated by PF1 in core0, or by VF0 of PF0 in core0.

System Bus
| ----------PCIe module----------
| Bus
| Interface
| ----- ------------------
| | | | PCIe Core0 |
| | | | | -----------
| | | | PF-0 -- VF-0 | | Host A |
| | |--------| |- VF-1 |--------| Root |
| | | | PF-1 | | Complex |
| | | | PF-2 | -----------
| | | ------------------
| | |
| | | ------------------
| | | | PCIe Core1 |
| | | | | -----------
| | | | PF-0 -- VF-0 | | Host B |
|-----| |--------| PF-1 -- VF-0 |--------| Root |
| | | | |- VF-1 | | Complex |
| | | | PF-2 | -----------
| | | ------------------
| | |
| | | ------------------
| |DMA| | | ------
| | | | |--------| EP |
| | |--------| PCIe Core2 | ------
| | | | | ------
| | | | |--------| EP |
| | | | | ------
| ----- ------------------
Note
If some fields can not be supported by the hardware/driver, then the driver ignores those fields. Please check driver-specific documentation for limitations and capabilities.

◆ reserved

uint64_t reserved[2]

Reserved for future fields.

Definition at line 522 of file rte_dmadev.h.


The documentation for this struct was generated from the following file: