DPDK  24.07.0
rte_pmd_cnxk.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2022 Marvell.
3  */
4 
11 #ifndef _PMD_CNXK_H_
12 #define _PMD_CNXK_H_
13 
14 #include <rte_compat.h>
15 #include <rte_ethdev.h>
16 #include <rte_ether.h>
17 #include <rte_security.h>
18 
48 };
49 
50 struct rte_pmd_cnxk_sec_action {
52  uint32_t sa_index;
54  bool sa_xor;
56  uint16_t sa_hi, sa_lo;
61 };
62 
63 #define RTE_PMD_CNXK_CTX_MAX_CKEY_LEN 32
64 #define RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN 128
65 
67 #define RTE_PMD_CNXK_AR_WIN_SIZE_MIN 64
68 #define RTE_PMD_CNXK_AR_WIN_SIZE_MAX 4096
69 #define RTE_PMD_CNXK_LOG_MIN_AR_WIN_SIZE_M1 5
70 
72 #define RTE_PMD_CNXK_AR_WINBITS_SZ (RTE_ALIGN_CEIL(RTE_PMD_CNXK_AR_WIN_SIZE_MAX, 64) / 64)
73 
76  struct {
78  uint32_t dst_addr;
80  uint32_t src_addr;
81  } ipv4;
82  struct {
84  uint8_t src_addr[16];
86  uint8_t dst_addr[16];
87  } ipv6;
88 };
89 
93  uint64_t ar_base;
95  uint64_t ar_valid_mask;
97  uint64_t hard_life;
99  uint64_t soft_life;
101  uint64_t mib_octs;
103  uint64_t mib_pkts;
105  uint64_t ar_winbits[RTE_PMD_CNXK_AR_WINBITS_SZ];
106 };
107 
110  uint64_t u64[2];
112  uint8_t iv_dbg[16];
113  struct {
115  uint8_t iv_dbg1[4];
117  uint8_t salt[4];
118 
119  uint32_t rsvd;
121  uint8_t iv_dbg2[4];
122  } s;
123 };
124 
127  union {
128  struct {
129  uint64_t reserved_0_2 : 3;
130  uint64_t address : 57;
131  uint64_t mode : 4;
132  } s;
133  uint64_t u64;
134  } err_ctl;
135 
136  uint64_t esn_val;
137  uint64_t hard_life;
138  uint64_t soft_life;
139  uint64_t mib_octs;
140  uint64_t mib_pkts;
141 };
142 
148  union {
149  struct {
151  uint64_t ar_win : 3;
153  uint64_t hard_life_dec : 1;
155  uint64_t soft_life_dec : 1;
156 
158  uint64_t count_glb_octets : 1;
160  uint64_t count_glb_pkts : 1;
162  uint64_t count_mib_bytes : 1;
163 
165  uint64_t count_mib_pkts : 1;
167  uint64_t hw_ctx_off : 7;
168 
170  uint64_t ctx_id : 16;
171 
173  uint64_t orig_pkt_fabs : 1;
175  uint64_t orig_pkt_free : 1;
177  uint64_t pkind : 6;
178 
179  uint64_t rsvd0 : 1;
181  uint64_t et_ovrwr : 1;
183  uint64_t pkt_output : 2;
185  uint64_t pkt_format : 1;
187  uint64_t defrag_opt : 2;
189  uint64_t x2p_dst : 1;
190 
192  uint64_t ctx_push_size : 7;
193  uint64_t rsvd1 : 1;
194 
196  uint64_t ctx_hdr_size : 2;
198  uint64_t aop_valid : 1;
199  uint64_t rsvd2 : 1;
201  uint64_t ctx_size : 4;
202  } s;
203  uint64_t u64;
204  } w0;
205 
207  union {
208  struct {
210  uint64_t orig_pkt_aura : 20;
211  uint64_t rsvd3 : 4;
213  uint64_t orig_pkt_foff : 8;
215  uint64_t cookie : 32;
216  } s;
217  uint64_t u64;
218  } w1;
219 
221  union {
222  struct {
224  uint64_t valid : 1;
226  uint64_t dir : 1;
227  uint64_t rsvd11 : 1;
228  uint64_t rsvd4 : 1;
230  uint64_t ipsec_mode : 1;
232  uint64_t ipsec_protocol : 1;
234  uint64_t aes_key_len : 2;
235 
237  uint64_t enc_type : 3;
239  uint64_t life_unit : 1;
241  uint64_t auth_type : 4;
242 
244  uint64_t encap_type : 2;
246  uint64_t et_ovrwr_ddr_en : 1;
248  uint64_t esn_en : 1;
250  uint64_t tport_l4_incr_csum : 1;
252  uint64_t ip_hdr_verify : 2;
254  uint64_t udp_ports_verify : 1;
255 
257  uint64_t l3hdr_on_err : 1;
258  uint64_t rsvd6 : 6;
259  uint64_t rsvd12 : 1;
260 
262  uint64_t spi : 32;
263  } s;
264  uint64_t u64;
265  } w2;
266 
268  uint64_t rsvd7;
269 
271  uint8_t cipher_key[RTE_PMD_CNXK_CTX_MAX_CKEY_LEN];
272 
274  union {
275  struct {
276  uint32_t rsvd8;
278  uint8_t salt[4];
279  } s;
280  uint64_t u64;
281  } w8;
282  uint64_t rsvd9;
283 
285  union {
286  struct {
287  uint64_t rsvd10 : 32;
289  uint64_t udp_src_port : 16;
291  uint64_t udp_dst_port : 16;
292  } s;
293  uint64_t u64;
294  } w10;
295 
298 
300  uint8_t hmac_opad_ipad[RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN];
301 
304 };
305 
311  union {
312  struct {
314  uint64_t esn_en : 1;
316  uint64_t ip_id : 1;
317  uint64_t rsvd0 : 1;
319  uint64_t hard_life_dec : 1;
321  uint64_t soft_life_dec : 1;
322 
324  uint64_t count_glb_octets : 1;
326  uint64_t count_glb_pkts : 1;
328  uint64_t count_mib_bytes : 1;
329 
331  uint64_t count_mib_pkts : 1;
333  uint64_t hw_ctx_off : 7;
334 
336  uint64_t ctx_id : 16;
337  uint64_t rsvd1 : 16;
338 
340  uint64_t ctx_push_size : 7;
341  uint64_t rsvd2 : 1;
342 
344  uint64_t ctx_hdr_size : 2;
346  uint64_t aop_valid : 1;
347  uint64_t rsvd3 : 1;
349  uint64_t ctx_size : 4;
350  } s;
351  uint64_t u64;
352  } w0;
353 
355  union {
356  struct {
357  uint64_t rsvd4 : 32;
359  uint64_t cookie : 32;
360  } s;
361  uint64_t u64;
362  } w1;
363 
365  union {
366  struct {
368  uint64_t valid : 1;
370  uint64_t dir : 1;
371  uint64_t rsvd11 : 1;
372  uint64_t rsvd5 : 1;
374  uint64_t ipsec_mode : 1;
376  uint64_t ipsec_protocol : 1;
377 
379  uint64_t aes_key_len : 2;
380 
382  uint64_t enc_type : 3;
384  uint64_t life_unit : 1;
386  uint64_t auth_type : 4;
387 
389  uint64_t encap_type : 2;
393  uint64_t dscp_src : 1;
395  uint64_t iv_src : 2;
397  uint64_t ipid_gen : 1;
398  uint64_t rsvd6 : 1;
399 
400  uint64_t rsvd7 : 7;
401  uint64_t rsvd12 : 1;
402 
404  uint64_t spi : 32;
405  } s;
406  uint64_t u64;
407  } w2;
408 
410  uint64_t rsvd8;
411 
413  uint8_t cipher_key[RTE_PMD_CNXK_CTX_MAX_CKEY_LEN];
414 
417 
419  union {
420  struct {
421  uint64_t rsvd9 : 4;
423  uint64_t ipv4_df_or_ipv6_flw_lbl : 20;
424 
426  uint64_t dscp : 6;
427  uint64_t rsvd10 : 2;
428 
430  uint64_t udp_dst_port : 16;
431 
433  uint64_t udp_src_port : 16;
434  } s;
435  uint64_t u64;
436  } w10;
437 
440 
442  uint8_t hmac_opad_ipad[RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN];
443 
446 };
447 
454 };
455 
461  uint64_t compcode : 7;
463  uint64_t doneint : 1;
465  uint64_t uc_compcode : 8;
467  uint64_t rlen : 16;
469  uint64_t spi : 32;
470 
472  uint64_t esn;
473  } cn10k;
474 
478  uint64_t compcode : 8;
480  uint64_t uc_compcode : 8;
482  uint64_t doneint : 1;
483  uint64_t reserved_17_63 : 47;
484 
485  uint64_t reserved_64_127;
486  } cn9k;
487 
489  uint64_t u64[2];
490 };
491 
507 __rte_experimental
508 int rte_pmd_cnxk_hw_sa_read(void *device, struct rte_security_session *sess,
509  union rte_pmd_cnxk_ipsec_hw_sa *data, uint32_t len);
525 __rte_experimental
526 int rte_pmd_cnxk_hw_sa_write(void *device, struct rte_security_session *sess,
527  union rte_pmd_cnxk_ipsec_hw_sa *data, uint32_t len);
528 
543 __rte_experimental
545 #endif /* _PMD_CNXK_H_ */
__rte_experimental int rte_pmd_cnxk_hw_sa_write(void *device, struct rte_security_session *sess, union rte_pmd_cnxk_ipsec_hw_sa *data, uint32_t len)
__rte_experimental union rte_pmd_cnxk_cpt_res_s * rte_pmd_cnxk_inl_ipsec_res(struct rte_mbuf *mbuf)
#define RTE_PMD_CNXK_AR_WINBITS_SZ
Definition: rte_pmd_cnxk.h:72
uint64_t ipv4_df_src_or_ipv6_flw_lbl_src
Definition: rte_pmd_cnxk.h:391
__rte_experimental int rte_pmd_cnxk_hw_sa_read(void *device, struct rte_security_session *sess, union rte_pmd_cnxk_ipsec_hw_sa *data, uint32_t len)
rte_pmd_cnxk_sec_action_alg
Definition: rte_pmd_cnxk.h:22