rte_mldev.h

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/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright (c) 2022 Marvell.
 */

#ifndef RTE_MLDEV_H
#define RTE_MLDEV_H

#include <rte_common.h>
#include <rte_log.h>
#include <rte_mempool.h>

#ifdef __cplusplus
extern "C" {
#endif

/* Logging Macro */
extern int rte_ml_dev_logtype;

#define RTE_MLDEV_LOG(level, fmt, args...)                                                         \
    rte_log(RTE_LOG_##level, rte_ml_dev_logtype, "%s(): " fmt "\n", __func__, ##args)

#define RTE_ML_STR_MAX 128

#define RTE_MLDEV_DEFAULT_MAX 32

/* Device operations */

__rte_experimental
int
rte_ml_dev_init(size_t dev_max);

__rte_experimental
uint16_t
rte_ml_dev_count(void);

__rte_experimental
int
rte_ml_dev_is_valid_dev(int16_t dev_id);

__rte_experimental
int
rte_ml_dev_socket_id(int16_t dev_id);

struct rte_ml_dev_info {
    const char *driver_name;
    uint16_t max_models;
    uint16_t max_queue_pairs;
    uint16_t max_desc;
    uint16_t max_segments;
    uint16_t min_align_size;
};

__rte_experimental
int
rte_ml_dev_info_get(int16_t dev_id, struct rte_ml_dev_info *dev_info);

struct rte_ml_dev_config {
    int socket_id;
    uint16_t nb_models;
    uint16_t nb_queue_pairs;
};

__rte_experimental
int
rte_ml_dev_configure(int16_t dev_id, const struct rte_ml_dev_config *config);

/* Forward declaration */
struct rte_ml_op;

typedef void (*rte_ml_dev_stop_flush_t)(int16_t dev_id, uint16_t qp_id, struct rte_ml_op *op);

struct rte_ml_dev_qp_conf {
    uint32_t nb_desc;
    rte_ml_dev_stop_flush_t cb;
};

__rte_experimental
int
rte_ml_dev_queue_pair_setup(int16_t dev_id, uint16_t queue_pair_id,
                const struct rte_ml_dev_qp_conf *qp_conf, int socket_id);

__rte_experimental
int
rte_ml_dev_start(int16_t dev_id);

__rte_experimental
int
rte_ml_dev_stop(int16_t dev_id);

__rte_experimental
int
rte_ml_dev_close(int16_t dev_id);

enum rte_ml_op_status {
    RTE_ML_OP_STATUS_SUCCESS = 0,
    RTE_ML_OP_STATUS_NOT_PROCESSED,
    RTE_ML_OP_STATUS_ERROR,
};

struct rte_ml_buff_seg {
    rte_iova_t iova_addr;
    void *addr;
    uint32_t length;
    uint32_t reserved;
    struct rte_ml_buff_seg *next;
};

struct rte_ml_op {
    uint16_t model_id;
    uint16_t nb_batches;
    uint32_t reserved;
    struct rte_mempool *mempool;
    struct rte_ml_buff_seg input;
    struct rte_ml_buff_seg output;
    RTE_STD_C11
    union {
        uint64_t user_u64;
        void *user_ptr;
    };
    enum rte_ml_op_status status;
    uint64_t impl_opaque;
} __rte_cache_aligned;

/* Enqueue/Dequeue operations */

__rte_experimental
uint16_t
rte_ml_enqueue_burst(int16_t dev_id, uint16_t qp_id, struct rte_ml_op **ops, uint16_t nb_ops);

__rte_experimental
uint16_t
rte_ml_dequeue_burst(int16_t dev_id, uint16_t qp_id, struct rte_ml_op **ops, uint16_t nb_ops);

struct rte_ml_op_error {
    char message[RTE_ML_STR_MAX]; 
    uint64_t errcode;         
};

__rte_experimental
int
rte_ml_op_error_get(int16_t dev_id, struct rte_ml_op *op, struct rte_ml_op_error *error);

/* Statistics operations */

struct rte_ml_dev_stats {
    uint64_t enqueued_count;
    uint64_t dequeued_count;
    uint64_t enqueue_err_count;
    uint64_t dequeue_err_count;
};

__rte_experimental
int
rte_ml_dev_stats_get(int16_t dev_id, struct rte_ml_dev_stats *stats);

__rte_experimental
void
rte_ml_dev_stats_reset(int16_t dev_id);

enum rte_ml_dev_xstats_mode {
    RTE_ML_DEV_XSTATS_DEVICE,
    RTE_ML_DEV_XSTATS_MODEL,
};

struct rte_ml_dev_xstats_map {
    uint16_t id;
    char name[RTE_ML_STR_MAX];
};

__rte_experimental
int
rte_ml_dev_xstats_names_get(int16_t dev_id, enum rte_ml_dev_xstats_mode mode, int32_t model_id,
                struct rte_ml_dev_xstats_map *xstats_map, uint32_t size);

__rte_experimental
int
rte_ml_dev_xstats_by_name_get(int16_t dev_id, const char *name, uint16_t *stat_id, uint64_t *value);

__rte_experimental
int
rte_ml_dev_xstats_get(int16_t dev_id, enum rte_ml_dev_xstats_mode mode, int32_t model_id,
              const uint16_t stat_ids[], uint64_t values[], uint16_t nb_ids);

__rte_experimental
int
rte_ml_dev_xstats_reset(int16_t dev_id, enum rte_ml_dev_xstats_mode mode, int32_t model_id,
            const uint16_t stat_ids[], uint16_t nb_ids);

__rte_experimental
int
rte_ml_dev_dump(int16_t dev_id, FILE *fd);

__rte_experimental
int
rte_ml_dev_selftest(int16_t dev_id);

/* Model operations */

struct rte_ml_model_params {
    void *addr;
    size_t size;
};

__rte_experimental
int
rte_ml_model_load(int16_t dev_id, struct rte_ml_model_params *params, uint16_t *model_id);

__rte_experimental
int
rte_ml_model_unload(int16_t dev_id, uint16_t model_id);

__rte_experimental
int
rte_ml_model_start(int16_t dev_id, uint16_t model_id);

__rte_experimental
int
rte_ml_model_stop(int16_t dev_id, uint16_t model_id);

enum rte_ml_io_type {
    RTE_ML_IO_TYPE_UNKNOWN = 0,
    RTE_ML_IO_TYPE_INT8,
    RTE_ML_IO_TYPE_UINT8,
    RTE_ML_IO_TYPE_INT16,
    RTE_ML_IO_TYPE_UINT16,
    RTE_ML_IO_TYPE_INT32,
    RTE_ML_IO_TYPE_UINT32,
    RTE_ML_IO_TYPE_FP8,
    RTE_ML_IO_TYPE_FP16,
    RTE_ML_IO_TYPE_FP32,
    RTE_ML_IO_TYPE_BFLOAT16
};

enum rte_ml_io_format {
    RTE_ML_IO_FORMAT_NCHW = 1,
    RTE_ML_IO_FORMAT_NHWC,
    RTE_ML_IO_FORMAT_CHWN,
    RTE_ML_IO_FORMAT_3D,
    RTE_ML_IO_FORMAT_2D,
    RTE_ML_IO_FORMAT_1D,
    RTE_ML_IO_FORMAT_SCALAR,
};

struct rte_ml_io_shape {
    enum rte_ml_io_format format;
    uint32_t w;
    uint32_t x;
    uint32_t y;
    uint32_t z;
};

struct rte_ml_io_info {
    char name[RTE_ML_STR_MAX];
    struct rte_ml_io_shape shape;
    enum rte_ml_io_type qtype;
    enum rte_ml_io_type dtype;
};

struct rte_ml_model_info {
    char name[RTE_ML_STR_MAX];
    char version[RTE_ML_STR_MAX];
    uint16_t model_id;
    uint16_t device_id;
    uint16_t batch_size;
    uint32_t nb_inputs;
    const struct rte_ml_io_info *input_info;
    uint32_t nb_outputs;
    const struct rte_ml_io_info *output_info;
    uint64_t wb_size;
};

__rte_experimental
int
rte_ml_model_info_get(int16_t dev_id, uint16_t model_id, struct rte_ml_model_info *model_info);

__rte_experimental
int
rte_ml_model_params_update(int16_t dev_id, uint16_t model_id, void *buffer);

/* IO operations */

__rte_experimental
int
rte_ml_io_input_size_get(int16_t dev_id, uint16_t model_id, uint32_t nb_batches,
             uint64_t *input_qsize, uint64_t *input_dsize);

__rte_experimental
int
rte_ml_io_output_size_get(int16_t dev_id, uint16_t model_id, uint32_t nb_batches,
              uint64_t *output_qsize, uint64_t *output_dsize);

__rte_experimental
int
rte_ml_io_quantize(int16_t dev_id, uint16_t model_id, uint16_t nb_batches, void *dbuffer,
           void *qbuffer);

__rte_experimental
int
rte_ml_io_dequantize(int16_t dev_id, uint16_t model_id, uint16_t nb_batches, void *qbuffer,
             void *dbuffer);

/* ML op pool operations */

__rte_experimental
struct rte_mempool *
rte_ml_op_pool_create(const char *name, unsigned int nb_elts, unsigned int cache_size,
              uint16_t user_size, int socket_id);

__rte_experimental
void
rte_ml_op_pool_free(struct rte_mempool *mempool);

#ifdef __cplusplus
}
#endif

#endif /* RTE_MLDEV_H */