rte_vect.h

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/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright 2016 6WIND S.A.
 */
 
#ifndef _RTE_VECT_H_
#define _RTE_VECT_H_
 
#include <stdint.h>
 
#include <rte_compat.h>
 
/* Unsigned vector types */
 
typedef uint8_t rte_v64u8_t __attribute__((vector_size(8), aligned(8)));
 
typedef uint16_t rte_v64u16_t __attribute__((vector_size(8), aligned(8)));
 
typedef uint32_t rte_v64u32_t __attribute__((vector_size(8), aligned(8)));
 
typedef uint8_t rte_v128u8_t __attribute__((vector_size(16), aligned(16)));
 
typedef uint16_t rte_v128u16_t __attribute__((vector_size(16), aligned(16)));
 
typedef uint32_t rte_v128u32_t __attribute__((vector_size(16), aligned(16)));
 
typedef uint64_t rte_v128u64_t __attribute__((vector_size(16), aligned(16)));
 
typedef uint8_t rte_v256u8_t __attribute__((vector_size(32), aligned(32)));
 
typedef uint16_t rte_v256u16_t __attribute__((vector_size(32), aligned(32)));
 
typedef uint32_t rte_v256u32_t __attribute__((vector_size(32), aligned(32)));
 
typedef uint64_t rte_v256u64_t __attribute__((vector_size(32), aligned(32)));
 
 
/* Signed vector types */
 
typedef int8_t rte_v64s8_t __attribute__((vector_size(8), aligned(8)));
 
typedef int16_t rte_v64s16_t __attribute__((vector_size(8), aligned(8)));
 
typedef int32_t rte_v64s32_t __attribute__((vector_size(8), aligned(8)));
 
typedef int8_t rte_v128s8_t __attribute__((vector_size(16), aligned(16)));
 
typedef int16_t rte_v128s16_t __attribute__((vector_size(16), aligned(16)));
 
typedef int32_t rte_v128s32_t __attribute__((vector_size(16), aligned(16)));
 
typedef int64_t rte_v128s64_t __attribute__((vector_size(16), aligned(16)));
 
typedef int8_t rte_v256s8_t __attribute__((vector_size(32), aligned(32)));
 
typedef int16_t rte_v256s16_t __attribute__((vector_size(32), aligned(32)));
 
typedef int32_t rte_v256s32_t __attribute__((vector_size(32), aligned(32)));
 
typedef int64_t rte_v256s64_t __attribute__((vector_size(32), aligned(32)));
 
enum rte_vect_max_simd {
    RTE_VECT_SIMD_DISABLED = 64,
    RTE_VECT_SIMD_128 = 128,
    RTE_VECT_SIMD_256 = 256, 
    RTE_VECT_SIMD_512 = 512, 
    RTE_VECT_SIMD_MAX = INT16_MAX + 1,
};
 
__rte_experimental
uint16_t rte_vect_get_max_simd_bitwidth(void);
 
__rte_experimental
int rte_vect_set_max_simd_bitwidth(uint16_t bitwidth);
 
#endif /* _RTE_VECT_H_ */