DPDK  22.03.0
rte_ethdev.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2017 Intel Corporation
3  */
4 
5 #ifndef _RTE_ETHDEV_H_
6 #define _RTE_ETHDEV_H_
7 
148 #ifdef __cplusplus
149 extern "C" {
150 #endif
151 
152 #include <stdint.h>
153 
154 /* Use this macro to check if LRO API is supported */
155 #define RTE_ETHDEV_HAS_LRO_SUPPORT
156 
157 /* Alias RTE_LIBRTE_ETHDEV_DEBUG for backward compatibility. */
158 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
159 #define RTE_ETHDEV_DEBUG_RX
160 #define RTE_ETHDEV_DEBUG_TX
161 #endif
162 
163 #include <rte_compat.h>
164 #include <rte_log.h>
165 #include <rte_interrupts.h>
166 #include <rte_dev.h>
167 #include <rte_devargs.h>
168 #include <rte_bitops.h>
169 #include <rte_errno.h>
170 #include <rte_common.h>
171 #include <rte_config.h>
172 #include <rte_ether.h>
173 #include <rte_power_intrinsics.h>
174 
175 #include "rte_ethdev_trace_fp.h"
176 #include "rte_dev_info.h"
177 
178 extern int rte_eth_dev_logtype;
179 
180 #define RTE_ETHDEV_LOG(level, ...) \
181  rte_log(RTE_LOG_ ## level, rte_eth_dev_logtype, "" __VA_ARGS__)
182 
183 struct rte_mbuf;
184 
201 int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs);
202 
217 uint16_t rte_eth_iterator_next(struct rte_dev_iterator *iter);
218 
231 void rte_eth_iterator_cleanup(struct rte_dev_iterator *iter);
232 
246 #define RTE_ETH_FOREACH_MATCHING_DEV(id, devargs, iter) \
247  for (rte_eth_iterator_init(iter, devargs), \
248  id = rte_eth_iterator_next(iter); \
249  id != RTE_MAX_ETHPORTS; \
250  id = rte_eth_iterator_next(iter))
251 
261 struct rte_eth_stats {
262  uint64_t ipackets;
263  uint64_t opackets;
264  uint64_t ibytes;
265  uint64_t obytes;
270  uint64_t imissed;
271  uint64_t ierrors;
272  uint64_t oerrors;
273  uint64_t rx_nombuf;
274  /* Queue stats are limited to max 256 queues */
276  uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
278  uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
280  uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
282  uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
284  uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS];
285 };
286 
290 #define RTE_ETH_LINK_SPEED_AUTONEG 0
291 #define RTE_ETH_LINK_SPEED_FIXED RTE_BIT32(0)
292 #define RTE_ETH_LINK_SPEED_10M_HD RTE_BIT32(1)
293 #define RTE_ETH_LINK_SPEED_10M RTE_BIT32(2)
294 #define RTE_ETH_LINK_SPEED_100M_HD RTE_BIT32(3)
295 #define RTE_ETH_LINK_SPEED_100M RTE_BIT32(4)
296 #define RTE_ETH_LINK_SPEED_1G RTE_BIT32(5)
297 #define RTE_ETH_LINK_SPEED_2_5G RTE_BIT32(6)
298 #define RTE_ETH_LINK_SPEED_5G RTE_BIT32(7)
299 #define RTE_ETH_LINK_SPEED_10G RTE_BIT32(8)
300 #define RTE_ETH_LINK_SPEED_20G RTE_BIT32(9)
301 #define RTE_ETH_LINK_SPEED_25G RTE_BIT32(10)
302 #define RTE_ETH_LINK_SPEED_40G RTE_BIT32(11)
303 #define RTE_ETH_LINK_SPEED_50G RTE_BIT32(12)
304 #define RTE_ETH_LINK_SPEED_56G RTE_BIT32(13)
305 #define RTE_ETH_LINK_SPEED_100G RTE_BIT32(14)
306 #define RTE_ETH_LINK_SPEED_200G RTE_BIT32(15)
309 #define ETH_LINK_SPEED_AUTONEG RTE_DEPRECATED(ETH_LINK_SPEED_AUTONEG) RTE_ETH_LINK_SPEED_AUTONEG
310 #define ETH_LINK_SPEED_FIXED RTE_DEPRECATED(ETH_LINK_SPEED_FIXED) RTE_ETH_LINK_SPEED_FIXED
311 #define ETH_LINK_SPEED_10M_HD RTE_DEPRECATED(ETH_LINK_SPEED_10M_HD) RTE_ETH_LINK_SPEED_10M_HD
312 #define ETH_LINK_SPEED_10M RTE_DEPRECATED(ETH_LINK_SPEED_10M) RTE_ETH_LINK_SPEED_10M
313 #define ETH_LINK_SPEED_100M_HD RTE_DEPRECATED(ETH_LINK_SPEED_100M_HD) RTE_ETH_LINK_SPEED_100M_HD
314 #define ETH_LINK_SPEED_100M RTE_DEPRECATED(ETH_LINK_SPEED_100M) RTE_ETH_LINK_SPEED_100M
315 #define ETH_LINK_SPEED_1G RTE_DEPRECATED(ETH_LINK_SPEED_1G) RTE_ETH_LINK_SPEED_1G
316 #define ETH_LINK_SPEED_2_5G RTE_DEPRECATED(ETH_LINK_SPEED_2_5G) RTE_ETH_LINK_SPEED_2_5G
317 #define ETH_LINK_SPEED_5G RTE_DEPRECATED(ETH_LINK_SPEED_5G) RTE_ETH_LINK_SPEED_5G
318 #define ETH_LINK_SPEED_10G RTE_DEPRECATED(ETH_LINK_SPEED_10G) RTE_ETH_LINK_SPEED_10G
319 #define ETH_LINK_SPEED_20G RTE_DEPRECATED(ETH_LINK_SPEED_20G) RTE_ETH_LINK_SPEED_20G
320 #define ETH_LINK_SPEED_25G RTE_DEPRECATED(ETH_LINK_SPEED_25G) RTE_ETH_LINK_SPEED_25G
321 #define ETH_LINK_SPEED_40G RTE_DEPRECATED(ETH_LINK_SPEED_40G) RTE_ETH_LINK_SPEED_40G
322 #define ETH_LINK_SPEED_50G RTE_DEPRECATED(ETH_LINK_SPEED_50G) RTE_ETH_LINK_SPEED_50G
323 #define ETH_LINK_SPEED_56G RTE_DEPRECATED(ETH_LINK_SPEED_56G) RTE_ETH_LINK_SPEED_56G
324 #define ETH_LINK_SPEED_100G RTE_DEPRECATED(ETH_LINK_SPEED_100G) RTE_ETH_LINK_SPEED_100G
325 #define ETH_LINK_SPEED_200G RTE_DEPRECATED(ETH_LINK_SPEED_200G) RTE_ETH_LINK_SPEED_200G
326 
330 #define RTE_ETH_SPEED_NUM_NONE 0
331 #define RTE_ETH_SPEED_NUM_10M 10
332 #define RTE_ETH_SPEED_NUM_100M 100
333 #define RTE_ETH_SPEED_NUM_1G 1000
334 #define RTE_ETH_SPEED_NUM_2_5G 2500
335 #define RTE_ETH_SPEED_NUM_5G 5000
336 #define RTE_ETH_SPEED_NUM_10G 10000
337 #define RTE_ETH_SPEED_NUM_20G 20000
338 #define RTE_ETH_SPEED_NUM_25G 25000
339 #define RTE_ETH_SPEED_NUM_40G 40000
340 #define RTE_ETH_SPEED_NUM_50G 50000
341 #define RTE_ETH_SPEED_NUM_56G 56000
342 #define RTE_ETH_SPEED_NUM_100G 100000
343 #define RTE_ETH_SPEED_NUM_200G 200000
344 #define RTE_ETH_SPEED_NUM_UNKNOWN UINT32_MAX
347 #define ETH_SPEED_NUM_NONE RTE_DEPRECATED(ETH_SPEED_NUM_NONE) RTE_ETH_SPEED_NUM_NONE
348 #define ETH_SPEED_NUM_10M RTE_DEPRECATED(ETH_SPEED_NUM_10M) RTE_ETH_SPEED_NUM_10M
349 #define ETH_SPEED_NUM_100M RTE_DEPRECATED(ETH_SPEED_NUM_100M) RTE_ETH_SPEED_NUM_100M
350 #define ETH_SPEED_NUM_1G RTE_DEPRECATED(ETH_SPEED_NUM_1G) RTE_ETH_SPEED_NUM_1G
351 #define ETH_SPEED_NUM_2_5G RTE_DEPRECATED(ETH_SPEED_NUM_2_5G) RTE_ETH_SPEED_NUM_2_5G
352 #define ETH_SPEED_NUM_5G RTE_DEPRECATED(ETH_SPEED_NUM_5G) RTE_ETH_SPEED_NUM_5G
353 #define ETH_SPEED_NUM_10G RTE_DEPRECATED(ETH_SPEED_NUM_10G) RTE_ETH_SPEED_NUM_10G
354 #define ETH_SPEED_NUM_20G RTE_DEPRECATED(ETH_SPEED_NUM_20G) RTE_ETH_SPEED_NUM_20G
355 #define ETH_SPEED_NUM_25G RTE_DEPRECATED(ETH_SPEED_NUM_25G) RTE_ETH_SPEED_NUM_25G
356 #define ETH_SPEED_NUM_40G RTE_DEPRECATED(ETH_SPEED_NUM_40G) RTE_ETH_SPEED_NUM_40G
357 #define ETH_SPEED_NUM_50G RTE_DEPRECATED(ETH_SPEED_NUM_50G) RTE_ETH_SPEED_NUM_50G
358 #define ETH_SPEED_NUM_56G RTE_DEPRECATED(ETH_SPEED_NUM_56G) RTE_ETH_SPEED_NUM_56G
359 #define ETH_SPEED_NUM_100G RTE_DEPRECATED(ETH_SPEED_NUM_100G) RTE_ETH_SPEED_NUM_100G
360 #define ETH_SPEED_NUM_200G RTE_DEPRECATED(ETH_SPEED_NUM_200G) RTE_ETH_SPEED_NUM_200G
361 #define ETH_SPEED_NUM_UNKNOWN RTE_DEPRECATED(ETH_SPEED_NUM_UNKNOWN) RTE_ETH_SPEED_NUM_UNKNOWN
362 
366 __extension__
367 struct rte_eth_link {
368  uint32_t link_speed;
369  uint16_t link_duplex : 1;
370  uint16_t link_autoneg : 1;
371  uint16_t link_status : 1;
372 } __rte_aligned(8);
377 #define RTE_ETH_LINK_HALF_DUPLEX 0
378 #define RTE_ETH_LINK_FULL_DUPLEX 1
379 #define RTE_ETH_LINK_DOWN 0
380 #define RTE_ETH_LINK_UP 1
381 #define RTE_ETH_LINK_FIXED 0
382 #define RTE_ETH_LINK_AUTONEG 1
383 #define RTE_ETH_LINK_MAX_STR_LEN 40
386 #define ETH_LINK_HALF_DUPLEX RTE_DEPRECATED(ETH_LINK_HALF_DUPLEX) RTE_ETH_LINK_HALF_DUPLEX
387 #define ETH_LINK_FULL_DUPLEX RTE_DEPRECATED(ETH_LINK_FULL_DUPLEX) RTE_ETH_LINK_FULL_DUPLEX
388 #define ETH_LINK_DOWN RTE_DEPRECATED(ETH_LINK_DOWN) RTE_ETH_LINK_DOWN
389 #define ETH_LINK_UP RTE_DEPRECATED(ETH_LINK_UP) RTE_ETH_LINK_UP
390 #define ETH_LINK_FIXED RTE_DEPRECATED(ETH_LINK_FIXED) RTE_ETH_LINK_FIXED
391 #define ETH_LINK_AUTONEG RTE_DEPRECATED(ETH_LINK_AUTONEG) RTE_ETH_LINK_AUTONEG
392 
397 struct rte_eth_thresh {
398  uint8_t pthresh;
399  uint8_t hthresh;
400  uint8_t wthresh;
401 };
402 
406 #define RTE_ETH_MQ_RX_RSS_FLAG RTE_BIT32(0)
407 #define RTE_ETH_MQ_RX_DCB_FLAG RTE_BIT32(1)
408 #define RTE_ETH_MQ_RX_VMDQ_FLAG RTE_BIT32(2)
411 #define ETH_MQ_RX_RSS_FLAG RTE_DEPRECATED(ETH_MQ_RX_RSS_FLAG) RTE_ETH_MQ_RX_RSS_FLAG
412 #define ETH_MQ_RX_DCB_FLAG RTE_DEPRECATED(ETH_MQ_RX_DCB_FLAG) RTE_ETH_MQ_RX_DCB_FLAG
413 #define ETH_MQ_RX_VMDQ_FLAG RTE_DEPRECATED(ETH_MQ_RX_VMDQ_FLAG) RTE_ETH_MQ_RX_VMDQ_FLAG
414 
419 enum rte_eth_rx_mq_mode {
421  RTE_ETH_MQ_RX_NONE = 0,
422 
424  RTE_ETH_MQ_RX_RSS = RTE_ETH_MQ_RX_RSS_FLAG,
426  RTE_ETH_MQ_RX_DCB = RTE_ETH_MQ_RX_DCB_FLAG,
428  RTE_ETH_MQ_RX_DCB_RSS = RTE_ETH_MQ_RX_RSS_FLAG | RTE_ETH_MQ_RX_DCB_FLAG,
429 
431  RTE_ETH_MQ_RX_VMDQ_ONLY = RTE_ETH_MQ_RX_VMDQ_FLAG,
433  RTE_ETH_MQ_RX_VMDQ_RSS = RTE_ETH_MQ_RX_RSS_FLAG | RTE_ETH_MQ_RX_VMDQ_FLAG,
435  RTE_ETH_MQ_RX_VMDQ_DCB = RTE_ETH_MQ_RX_VMDQ_FLAG | RTE_ETH_MQ_RX_DCB_FLAG,
437  RTE_ETH_MQ_RX_VMDQ_DCB_RSS = RTE_ETH_MQ_RX_RSS_FLAG | RTE_ETH_MQ_RX_DCB_FLAG |
438  RTE_ETH_MQ_RX_VMDQ_FLAG,
439 };
440 
441 #define ETH_MQ_RX_NONE RTE_DEPRECATED(ETH_MQ_RX_NONE) RTE_ETH_MQ_RX_NONE
442 #define ETH_MQ_RX_RSS RTE_DEPRECATED(ETH_MQ_RX_RSS) RTE_ETH_MQ_RX_RSS
443 #define ETH_MQ_RX_DCB RTE_DEPRECATED(ETH_MQ_RX_DCB) RTE_ETH_MQ_RX_DCB
444 #define ETH_MQ_RX_DCB_RSS RTE_DEPRECATED(ETH_MQ_RX_DCB_RSS) RTE_ETH_MQ_RX_DCB_RSS
445 #define ETH_MQ_RX_VMDQ_ONLY RTE_DEPRECATED(ETH_MQ_RX_VMDQ_ONLY) RTE_ETH_MQ_RX_VMDQ_ONLY
446 #define ETH_MQ_RX_VMDQ_RSS RTE_DEPRECATED(ETH_MQ_RX_VMDQ_RSS) RTE_ETH_MQ_RX_VMDQ_RSS
447 #define ETH_MQ_RX_VMDQ_DCB RTE_DEPRECATED(ETH_MQ_RX_VMDQ_DCB) RTE_ETH_MQ_RX_VMDQ_DCB
448 #define ETH_MQ_RX_VMDQ_DCB_RSS RTE_DEPRECATED(ETH_MQ_RX_VMDQ_DCB_RSS) RTE_ETH_MQ_RX_VMDQ_DCB_RSS
449 
454 enum rte_eth_tx_mq_mode {
455  RTE_ETH_MQ_TX_NONE = 0,
456  RTE_ETH_MQ_TX_DCB,
457  RTE_ETH_MQ_TX_VMDQ_DCB,
458  RTE_ETH_MQ_TX_VMDQ_ONLY,
459 };
460 
461 #define ETH_MQ_TX_NONE RTE_DEPRECATED(ETH_MQ_TX_NONE) RTE_ETH_MQ_TX_NONE
462 #define ETH_MQ_TX_DCB RTE_DEPRECATED(ETH_MQ_TX_DCB) RTE_ETH_MQ_TX_DCB
463 #define ETH_MQ_TX_VMDQ_DCB RTE_DEPRECATED(ETH_MQ_TX_VMDQ_DCB) RTE_ETH_MQ_TX_VMDQ_DCB
464 #define ETH_MQ_TX_VMDQ_ONLY RTE_DEPRECATED(ETH_MQ_TX_VMDQ_ONLY) RTE_ETH_MQ_TX_VMDQ_ONLY
465 
469 struct rte_eth_rxmode {
471  enum rte_eth_rx_mq_mode mq_mode;
472  uint32_t mtu;
474  uint32_t max_lro_pkt_size;
475  uint16_t split_hdr_size;
481  uint64_t offloads;
482 
483  uint64_t reserved_64s[2];
484  void *reserved_ptrs[2];
485 };
486 
491 enum rte_vlan_type {
492  RTE_ETH_VLAN_TYPE_UNKNOWN = 0,
493  RTE_ETH_VLAN_TYPE_INNER,
494  RTE_ETH_VLAN_TYPE_OUTER,
495  RTE_ETH_VLAN_TYPE_MAX,
496 };
497 
498 #define ETH_VLAN_TYPE_UNKNOWN RTE_DEPRECATED(ETH_VLAN_TYPE_UNKNOWN) RTE_ETH_VLAN_TYPE_UNKNOWN
499 #define ETH_VLAN_TYPE_INNER RTE_DEPRECATED(ETH_VLAN_TYPE_INNER) RTE_ETH_VLAN_TYPE_INNER
500 #define ETH_VLAN_TYPE_OUTER RTE_DEPRECATED(ETH_VLAN_TYPE_OUTER) RTE_ETH_VLAN_TYPE_OUTER
501 #define ETH_VLAN_TYPE_MAX RTE_DEPRECATED(ETH_VLAN_TYPE_MAX) RTE_ETH_VLAN_TYPE_MAX
502 
507 struct rte_vlan_filter_conf {
508  uint64_t ids[64];
509 };
510 
528 struct rte_eth_rss_conf {
529  uint8_t *rss_key;
530  uint8_t rss_key_len;
531  uint64_t rss_hf;
532 };
533 
534 /*
535  * A packet can be identified by hardware as different flow types. Different
536  * NIC hardware may support different flow types.
537  * Basically, the NIC hardware identifies the flow type as deep protocol as
538  * possible, and exclusively. For example, if a packet is identified as
539  * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
540  * though it is an actual IPV4 packet.
541  */
542 #define RTE_ETH_FLOW_UNKNOWN 0
543 #define RTE_ETH_FLOW_RAW 1
544 #define RTE_ETH_FLOW_IPV4 2
545 #define RTE_ETH_FLOW_FRAG_IPV4 3
546 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4
547 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5
548 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6
549 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7
550 #define RTE_ETH_FLOW_IPV6 8
551 #define RTE_ETH_FLOW_FRAG_IPV6 9
552 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10
553 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11
554 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12
555 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
556 #define RTE_ETH_FLOW_L2_PAYLOAD 14
557 #define RTE_ETH_FLOW_IPV6_EX 15
558 #define RTE_ETH_FLOW_IPV6_TCP_EX 16
559 #define RTE_ETH_FLOW_IPV6_UDP_EX 17
560 
561 #define RTE_ETH_FLOW_PORT 18
562 #define RTE_ETH_FLOW_VXLAN 19
563 #define RTE_ETH_FLOW_GENEVE 20
564 #define RTE_ETH_FLOW_NVGRE 21
565 #define RTE_ETH_FLOW_VXLAN_GPE 22
566 #define RTE_ETH_FLOW_GTPU 23
567 #define RTE_ETH_FLOW_MAX 24
568 
569 /*
570  * Below macros are defined for RSS offload types, they can be used to
571  * fill rte_eth_rss_conf.rss_hf or rte_flow_action_rss.types.
572  */
573 #define RTE_ETH_RSS_IPV4 RTE_BIT64(2)
574 #define RTE_ETH_RSS_FRAG_IPV4 RTE_BIT64(3)
575 #define RTE_ETH_RSS_NONFRAG_IPV4_TCP RTE_BIT64(4)
576 #define RTE_ETH_RSS_NONFRAG_IPV4_UDP RTE_BIT64(5)
577 #define RTE_ETH_RSS_NONFRAG_IPV4_SCTP RTE_BIT64(6)
578 #define RTE_ETH_RSS_NONFRAG_IPV4_OTHER RTE_BIT64(7)
579 #define RTE_ETH_RSS_IPV6 RTE_BIT64(8)
580 #define RTE_ETH_RSS_FRAG_IPV6 RTE_BIT64(9)
581 #define RTE_ETH_RSS_NONFRAG_IPV6_TCP RTE_BIT64(10)
582 #define RTE_ETH_RSS_NONFRAG_IPV6_UDP RTE_BIT64(11)
583 #define RTE_ETH_RSS_NONFRAG_IPV6_SCTP RTE_BIT64(12)
584 #define RTE_ETH_RSS_NONFRAG_IPV6_OTHER RTE_BIT64(13)
585 #define RTE_ETH_RSS_L2_PAYLOAD RTE_BIT64(14)
586 #define RTE_ETH_RSS_IPV6_EX RTE_BIT64(15)
587 #define RTE_ETH_RSS_IPV6_TCP_EX RTE_BIT64(16)
588 #define RTE_ETH_RSS_IPV6_UDP_EX RTE_BIT64(17)
589 #define RTE_ETH_RSS_PORT RTE_BIT64(18)
590 #define RTE_ETH_RSS_VXLAN RTE_BIT64(19)
591 #define RTE_ETH_RSS_GENEVE RTE_BIT64(20)
592 #define RTE_ETH_RSS_NVGRE RTE_BIT64(21)
593 #define RTE_ETH_RSS_GTPU RTE_BIT64(23)
594 #define RTE_ETH_RSS_ETH RTE_BIT64(24)
595 #define RTE_ETH_RSS_S_VLAN RTE_BIT64(25)
596 #define RTE_ETH_RSS_C_VLAN RTE_BIT64(26)
597 #define RTE_ETH_RSS_ESP RTE_BIT64(27)
598 #define RTE_ETH_RSS_AH RTE_BIT64(28)
599 #define RTE_ETH_RSS_L2TPV3 RTE_BIT64(29)
600 #define RTE_ETH_RSS_PFCP RTE_BIT64(30)
601 #define RTE_ETH_RSS_PPPOE RTE_BIT64(31)
602 #define RTE_ETH_RSS_ECPRI RTE_BIT64(32)
603 #define RTE_ETH_RSS_MPLS RTE_BIT64(33)
604 #define RTE_ETH_RSS_IPV4_CHKSUM RTE_BIT64(34)
605 
606 #define ETH_RSS_IPV4 RTE_DEPRECATED(ETH_RSS_IPV4) RTE_ETH_RSS_IPV4
607 #define ETH_RSS_FRAG_IPV4 RTE_DEPRECATED(ETH_RSS_FRAG_IPV4) RTE_ETH_RSS_FRAG_IPV4
608 #define ETH_RSS_NONFRAG_IPV4_TCP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV4_TCP) RTE_ETH_RSS_NONFRAG_IPV4_TCP
609 #define ETH_RSS_NONFRAG_IPV4_UDP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV4_UDP) RTE_ETH_RSS_NONFRAG_IPV4_UDP
610 #define ETH_RSS_NONFRAG_IPV4_SCTP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV4_SCTP) RTE_ETH_RSS_NONFRAG_IPV4_SCTP
611 #define ETH_RSS_NONFRAG_IPV4_OTHER RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV4_OTHER) RTE_ETH_RSS_NONFRAG_IPV4_OTHER
612 #define ETH_RSS_IPV6 RTE_DEPRECATED(ETH_RSS_IPV6) RTE_ETH_RSS_IPV6
613 #define ETH_RSS_FRAG_IPV6 RTE_DEPRECATED(ETH_RSS_FRAG_IPV6) RTE_ETH_RSS_FRAG_IPV6
614 #define ETH_RSS_NONFRAG_IPV6_TCP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV6_TCP) RTE_ETH_RSS_NONFRAG_IPV6_TCP
615 #define ETH_RSS_NONFRAG_IPV6_UDP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV6_UDP) RTE_ETH_RSS_NONFRAG_IPV6_UDP
616 #define ETH_RSS_NONFRAG_IPV6_SCTP RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV6_SCTP) RTE_ETH_RSS_NONFRAG_IPV6_SCTP
617 #define ETH_RSS_NONFRAG_IPV6_OTHER RTE_DEPRECATED(ETH_RSS_NONFRAG_IPV6_OTHER) RTE_ETH_RSS_NONFRAG_IPV6_OTHER
618 #define ETH_RSS_L2_PAYLOAD RTE_DEPRECATED(ETH_RSS_L2_PAYLOAD) RTE_ETH_RSS_L2_PAYLOAD
619 #define ETH_RSS_IPV6_EX RTE_DEPRECATED(ETH_RSS_IPV6_EX) RTE_ETH_RSS_IPV6_EX
620 #define ETH_RSS_IPV6_TCP_EX RTE_DEPRECATED(ETH_RSS_IPV6_TCP_EX) RTE_ETH_RSS_IPV6_TCP_EX
621 #define ETH_RSS_IPV6_UDP_EX RTE_DEPRECATED(ETH_RSS_IPV6_UDP_EX) RTE_ETH_RSS_IPV6_UDP_EX
622 #define ETH_RSS_PORT RTE_DEPRECATED(ETH_RSS_PORT) RTE_ETH_RSS_PORT
623 #define ETH_RSS_VXLAN RTE_DEPRECATED(ETH_RSS_VXLAN) RTE_ETH_RSS_VXLAN
624 #define ETH_RSS_GENEVE RTE_DEPRECATED(ETH_RSS_GENEVE) RTE_ETH_RSS_GENEVE
625 #define ETH_RSS_NVGRE RTE_DEPRECATED(ETH_RSS_NVGRE) RTE_ETH_RSS_NVGRE
626 #define ETH_RSS_GTPU RTE_DEPRECATED(ETH_RSS_GTPU) RTE_ETH_RSS_GTPU
627 #define ETH_RSS_ETH RTE_DEPRECATED(ETH_RSS_ETH) RTE_ETH_RSS_ETH
628 #define ETH_RSS_S_VLAN RTE_DEPRECATED(ETH_RSS_S_VLAN) RTE_ETH_RSS_S_VLAN
629 #define ETH_RSS_C_VLAN RTE_DEPRECATED(ETH_RSS_C_VLAN) RTE_ETH_RSS_C_VLAN
630 #define ETH_RSS_ESP RTE_DEPRECATED(ETH_RSS_ESP) RTE_ETH_RSS_ESP
631 #define ETH_RSS_AH RTE_DEPRECATED(ETH_RSS_AH) RTE_ETH_RSS_AH
632 #define ETH_RSS_L2TPV3 RTE_DEPRECATED(ETH_RSS_L2TPV3) RTE_ETH_RSS_L2TPV3
633 #define ETH_RSS_PFCP RTE_DEPRECATED(ETH_RSS_PFCP) RTE_ETH_RSS_PFCP
634 #define ETH_RSS_PPPOE RTE_DEPRECATED(ETH_RSS_PPPOE) RTE_ETH_RSS_PPPOE
635 #define ETH_RSS_ECPRI RTE_DEPRECATED(ETH_RSS_ECPRI) RTE_ETH_RSS_ECPRI
636 #define ETH_RSS_MPLS RTE_DEPRECATED(ETH_RSS_MPLS) RTE_ETH_RSS_MPLS
637 #define ETH_RSS_IPV4_CHKSUM RTE_DEPRECATED(ETH_RSS_IPV4_CHKSUM) RTE_ETH_RSS_IPV4_CHKSUM
638 
651 #define RTE_ETH_RSS_L4_CHKSUM RTE_BIT64(35)
652 #define ETH_RSS_L4_CHKSUM RTE_DEPRECATED(ETH_RSS_L4_CHKSUM) RTE_ETH_RSS_L4_CHKSUM
653 
654 #define RTE_ETH_RSS_L2TPV2 RTE_BIT64(36)
655 
656 /*
657  * We use the following macros to combine with above RTE_ETH_RSS_* for
658  * more specific input set selection. These bits are defined starting
659  * from the high end of the 64 bits.
660  * Note: If we use above RTE_ETH_RSS_* without SRC/DST_ONLY, it represents
661  * both SRC and DST are taken into account. If SRC_ONLY and DST_ONLY of
662  * the same level are used simultaneously, it is the same case as none of
663  * them are added.
664  */
665 #define RTE_ETH_RSS_L3_SRC_ONLY RTE_BIT64(63)
666 #define RTE_ETH_RSS_L3_DST_ONLY RTE_BIT64(62)
667 #define RTE_ETH_RSS_L4_SRC_ONLY RTE_BIT64(61)
668 #define RTE_ETH_RSS_L4_DST_ONLY RTE_BIT64(60)
669 #define RTE_ETH_RSS_L2_SRC_ONLY RTE_BIT64(59)
670 #define RTE_ETH_RSS_L2_DST_ONLY RTE_BIT64(58)
671 
672 #define ETH_RSS_L3_SRC_ONLY RTE_DEPRECATED(ETH_RSS_L3_SRC_ONLY) RTE_ETH_RSS_L3_SRC_ONLY
673 #define ETH_RSS_L3_DST_ONLY RTE_DEPRECATED(ETH_RSS_L3_DST_ONLY) RTE_ETH_RSS_L3_DST_ONLY
674 #define ETH_RSS_L4_SRC_ONLY RTE_DEPRECATED(ETH_RSS_L4_SRC_ONLY) RTE_ETH_RSS_L4_SRC_ONLY
675 #define ETH_RSS_L4_DST_ONLY RTE_DEPRECATED(ETH_RSS_L4_DST_ONLY) RTE_ETH_RSS_L4_DST_ONLY
676 #define ETH_RSS_L2_SRC_ONLY RTE_DEPRECATED(ETH_RSS_L2_SRC_ONLY) RTE_ETH_RSS_L2_SRC_ONLY
677 #define ETH_RSS_L2_DST_ONLY RTE_DEPRECATED(ETH_RSS_L2_DST_ONLY) RTE_ETH_RSS_L2_DST_ONLY
678 
679 /*
680  * Only select IPV6 address prefix as RSS input set according to
681  * https://tools.ietf.org/html/rfc6052
682  * Must be combined with RTE_ETH_RSS_IPV6, RTE_ETH_RSS_NONFRAG_IPV6_UDP,
683  * RTE_ETH_RSS_NONFRAG_IPV6_TCP, RTE_ETH_RSS_NONFRAG_IPV6_SCTP.
684  */
685 #define RTE_ETH_RSS_L3_PRE32 RTE_BIT64(57)
686 #define RTE_ETH_RSS_L3_PRE40 RTE_BIT64(56)
687 #define RTE_ETH_RSS_L3_PRE48 RTE_BIT64(55)
688 #define RTE_ETH_RSS_L3_PRE56 RTE_BIT64(54)
689 #define RTE_ETH_RSS_L3_PRE64 RTE_BIT64(53)
690 #define RTE_ETH_RSS_L3_PRE96 RTE_BIT64(52)
691 
692 /*
693  * Use the following macros to combine with the above layers
694  * to choose inner and outer layers or both for RSS computation.
695  * Bits 50 and 51 are reserved for this.
696  */
697 
705 #define RTE_ETH_RSS_LEVEL_PMD_DEFAULT (UINT64_C(0) << 50)
706 #define ETH_RSS_LEVEL_PMD_DEFAULT RTE_DEPRECATED(ETH_RSS_LEVEL_PMD_DEFAULT) RTE_ETH_RSS_LEVEL_PMD_DEFAULT
707 
712 #define RTE_ETH_RSS_LEVEL_OUTERMOST (UINT64_C(1) << 50)
713 #define ETH_RSS_LEVEL_OUTERMOST RTE_DEPRECATED(ETH_RSS_LEVEL_OUTERMOST) RTE_ETH_RSS_LEVEL_OUTERMOST
714 
719 #define RTE_ETH_RSS_LEVEL_INNERMOST (UINT64_C(2) << 50)
720 #define RTE_ETH_RSS_LEVEL_MASK (UINT64_C(3) << 50)
721 
722 #define ETH_RSS_LEVEL_INNERMOST RTE_DEPRECATED(ETH_RSS_LEVEL_INNERMOST) RTE_ETH_RSS_LEVEL_INNERMOST
723 #define ETH_RSS_LEVEL_MASK RTE_DEPRECATED(ETH_RSS_LEVEL_MASK) RTE_ETH_RSS_LEVEL_MASK
724 
725 #define RTE_ETH_RSS_LEVEL(rss_hf) ((rss_hf & RTE_ETH_RSS_LEVEL_MASK) >> 50)
726 #define ETH_RSS_LEVEL(rss_hf) RTE_DEPRECATED(ETH_RSS_LEVEL(rss_hf)) RTE_ETH_RSS_LEVEL(rss_hf)
727 
738 static inline uint64_t
739 rte_eth_rss_hf_refine(uint64_t rss_hf)
740 {
741  if ((rss_hf & RTE_ETH_RSS_L3_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L3_DST_ONLY))
742  rss_hf &= ~(RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY);
743 
744  if ((rss_hf & RTE_ETH_RSS_L4_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L4_DST_ONLY))
745  rss_hf &= ~(RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY);
746 
747  return rss_hf;
748 }
749 
750 #define RTE_ETH_RSS_IPV6_PRE32 ( \
751  RTE_ETH_RSS_IPV6 | \
752  RTE_ETH_RSS_L3_PRE32)
753 #define ETH_RSS_IPV6_PRE32 RTE_DEPRECATED(ETH_RSS_IPV6_PRE32) RTE_ETH_RSS_IPV6_PRE32
754 
755 #define RTE_ETH_RSS_IPV6_PRE40 ( \
756  RTE_ETH_RSS_IPV6 | \
757  RTE_ETH_RSS_L3_PRE40)
758 #define ETH_RSS_IPV6_PRE40 RTE_DEPRECATED(ETH_RSS_IPV6_PRE40) RTE_ETH_RSS_IPV6_PRE40
759 
760 #define RTE_ETH_RSS_IPV6_PRE48 ( \
761  RTE_ETH_RSS_IPV6 | \
762  RTE_ETH_RSS_L3_PRE48)
763 #define ETH_RSS_IPV6_PRE48 RTE_DEPRECATED(ETH_RSS_IPV6_PRE48) RTE_ETH_RSS_IPV6_PRE48
764 
765 #define RTE_ETH_RSS_IPV6_PRE56 ( \
766  RTE_ETH_RSS_IPV6 | \
767  RTE_ETH_RSS_L3_PRE56)
768 #define ETH_RSS_IPV6_PRE56 RTE_DEPRECATED(ETH_RSS_IPV6_PRE56) RTE_ETH_RSS_IPV6_PRE56
769 
770 #define RTE_ETH_RSS_IPV6_PRE64 ( \
771  RTE_ETH_RSS_IPV6 | \
772  RTE_ETH_RSS_L3_PRE64)
773 #define ETH_RSS_IPV6_PRE64 RTE_DEPRECATED(ETH_RSS_IPV6_PRE64) RTE_ETH_RSS_IPV6_PRE64
774 
775 #define RTE_ETH_RSS_IPV6_PRE96 ( \
776  RTE_ETH_RSS_IPV6 | \
777  RTE_ETH_RSS_L3_PRE96)
778 #define ETH_RSS_IPV6_PRE96 RTE_DEPRECATED(ETH_RSS_IPV6_PRE96) RTE_ETH_RSS_IPV6_PRE96
779 
780 #define RTE_ETH_RSS_IPV6_PRE32_UDP ( \
781  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
782  RTE_ETH_RSS_L3_PRE32)
783 #define ETH_RSS_IPV6_PRE32_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE32_UDP) RTE_ETH_RSS_IPV6_PRE32_UDP
784 
785 #define RTE_ETH_RSS_IPV6_PRE40_UDP ( \
786  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
787  RTE_ETH_RSS_L3_PRE40)
788 #define ETH_RSS_IPV6_PRE40_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE40_UDP) RTE_ETH_RSS_IPV6_PRE40_UDP
789 
790 #define RTE_ETH_RSS_IPV6_PRE48_UDP ( \
791  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
792  RTE_ETH_RSS_L3_PRE48)
793 #define ETH_RSS_IPV6_PRE48_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE48_UDP) RTE_ETH_RSS_IPV6_PRE48_UDP
794 
795 #define RTE_ETH_RSS_IPV6_PRE56_UDP ( \
796  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
797  RTE_ETH_RSS_L3_PRE56)
798 #define ETH_RSS_IPV6_PRE56_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE56_UDP) RTE_ETH_RSS_IPV6_PRE56_UDP
799 
800 #define RTE_ETH_RSS_IPV6_PRE64_UDP ( \
801  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
802  RTE_ETH_RSS_L3_PRE64)
803 #define ETH_RSS_IPV6_PRE64_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE64_UDP) RTE_ETH_RSS_IPV6_PRE64_UDP
804 
805 #define RTE_ETH_RSS_IPV6_PRE96_UDP ( \
806  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
807  RTE_ETH_RSS_L3_PRE96)
808 #define ETH_RSS_IPV6_PRE96_UDP RTE_DEPRECATED(ETH_RSS_IPV6_PRE96_UDP) RTE_ETH_RSS_IPV6_PRE96_UDP
809 
810 #define RTE_ETH_RSS_IPV6_PRE32_TCP ( \
811  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
812  RTE_ETH_RSS_L3_PRE32)
813 #define ETH_RSS_IPV6_PRE32_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE32_TCP) RTE_ETH_RSS_IPV6_PRE32_TCP
814 
815 #define RTE_ETH_RSS_IPV6_PRE40_TCP ( \
816  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
817  RTE_ETH_RSS_L3_PRE40)
818 #define ETH_RSS_IPV6_PRE40_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE40_TCP) RTE_ETH_RSS_IPV6_PRE40_TCP
819 
820 #define RTE_ETH_RSS_IPV6_PRE48_TCP ( \
821  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
822  RTE_ETH_RSS_L3_PRE48)
823 #define ETH_RSS_IPV6_PRE48_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE48_TCP) RTE_ETH_RSS_IPV6_PRE48_TCP
824 
825 #define RTE_ETH_RSS_IPV6_PRE56_TCP ( \
826  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
827  RTE_ETH_RSS_L3_PRE56)
828 #define ETH_RSS_IPV6_PRE56_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE56_TCP) RTE_ETH_RSS_IPV6_PRE56_TCP
829 
830 #define RTE_ETH_RSS_IPV6_PRE64_TCP ( \
831  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
832  RTE_ETH_RSS_L3_PRE64)
833 #define ETH_RSS_IPV6_PRE64_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE64_TCP) RTE_ETH_RSS_IPV6_PRE64_TCP
834 
835 #define RTE_ETH_RSS_IPV6_PRE96_TCP ( \
836  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
837  RTE_ETH_RSS_L3_PRE96)
838 #define ETH_RSS_IPV6_PRE96_TCP RTE_DEPRECATED(ETH_RSS_IPV6_PRE96_TCP) RTE_ETH_RSS_IPV6_PRE96_TCP
839 
840 #define RTE_ETH_RSS_IPV6_PRE32_SCTP ( \
841  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
842  RTE_ETH_RSS_L3_PRE32)
843 #define ETH_RSS_IPV6_PRE32_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE32_SCTP) RTE_ETH_RSS_IPV6_PRE32_SCTP
844 
845 #define RTE_ETH_RSS_IPV6_PRE40_SCTP ( \
846  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
847  RTE_ETH_RSS_L3_PRE40)
848 #define ETH_RSS_IPV6_PRE40_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE40_SCTP) RTE_ETH_RSS_IPV6_PRE40_SCTP
849 
850 #define RTE_ETH_RSS_IPV6_PRE48_SCTP ( \
851  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
852  RTE_ETH_RSS_L3_PRE48)
853 #define ETH_RSS_IPV6_PRE48_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE48_SCTP) RTE_ETH_RSS_IPV6_PRE48_SCTP
854 
855 #define RTE_ETH_RSS_IPV6_PRE56_SCTP ( \
856  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
857  RTE_ETH_RSS_L3_PRE56)
858 #define ETH_RSS_IPV6_PRE56_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE56_SCTP) RTE_ETH_RSS_IPV6_PRE56_SCTP
859 
860 #define RTE_ETH_RSS_IPV6_PRE64_SCTP ( \
861  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
862  RTE_ETH_RSS_L3_PRE64)
863 #define ETH_RSS_IPV6_PRE64_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE64_SCTP) RTE_ETH_RSS_IPV6_PRE64_SCTP
864 
865 #define RTE_ETH_RSS_IPV6_PRE96_SCTP ( \
866  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
867  RTE_ETH_RSS_L3_PRE96)
868 #define ETH_RSS_IPV6_PRE96_SCTP RTE_DEPRECATED(ETH_RSS_IPV6_PRE96_SCTP) RTE_ETH_RSS_IPV6_PRE96_SCTP
869 
870 #define RTE_ETH_RSS_IP ( \
871  RTE_ETH_RSS_IPV4 | \
872  RTE_ETH_RSS_FRAG_IPV4 | \
873  RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
874  RTE_ETH_RSS_IPV6 | \
875  RTE_ETH_RSS_FRAG_IPV6 | \
876  RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
877  RTE_ETH_RSS_IPV6_EX)
878 #define ETH_RSS_IP RTE_DEPRECATED(ETH_RSS_IP) RTE_ETH_RSS_IP
879 
880 #define RTE_ETH_RSS_UDP ( \
881  RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
882  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
883  RTE_ETH_RSS_IPV6_UDP_EX)
884 #define ETH_RSS_UDP RTE_DEPRECATED(ETH_RSS_UDP) RTE_ETH_RSS_UDP
885 
886 #define RTE_ETH_RSS_TCP ( \
887  RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
888  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
889  RTE_ETH_RSS_IPV6_TCP_EX)
890 #define ETH_RSS_TCP RTE_DEPRECATED(ETH_RSS_TCP) RTE_ETH_RSS_TCP
891 
892 #define RTE_ETH_RSS_SCTP ( \
893  RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
894  RTE_ETH_RSS_NONFRAG_IPV6_SCTP)
895 #define ETH_RSS_SCTP RTE_DEPRECATED(ETH_RSS_SCTP) RTE_ETH_RSS_SCTP
896 
897 #define RTE_ETH_RSS_TUNNEL ( \
898  RTE_ETH_RSS_VXLAN | \
899  RTE_ETH_RSS_GENEVE | \
900  RTE_ETH_RSS_NVGRE)
901 #define ETH_RSS_TUNNEL RTE_DEPRECATED(ETH_RSS_TUNNEL) RTE_ETH_RSS_TUNNEL
902 
903 #define RTE_ETH_RSS_VLAN ( \
904  RTE_ETH_RSS_S_VLAN | \
905  RTE_ETH_RSS_C_VLAN)
906 #define ETH_RSS_VLAN RTE_DEPRECATED(ETH_RSS_VLAN) RTE_ETH_RSS_VLAN
907 
909 #define RTE_ETH_RSS_PROTO_MASK ( \
910  RTE_ETH_RSS_IPV4 | \
911  RTE_ETH_RSS_FRAG_IPV4 | \
912  RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
913  RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
914  RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
915  RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
916  RTE_ETH_RSS_IPV6 | \
917  RTE_ETH_RSS_FRAG_IPV6 | \
918  RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
919  RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
920  RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
921  RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
922  RTE_ETH_RSS_L2_PAYLOAD | \
923  RTE_ETH_RSS_IPV6_EX | \
924  RTE_ETH_RSS_IPV6_TCP_EX | \
925  RTE_ETH_RSS_IPV6_UDP_EX | \
926  RTE_ETH_RSS_PORT | \
927  RTE_ETH_RSS_VXLAN | \
928  RTE_ETH_RSS_GENEVE | \
929  RTE_ETH_RSS_NVGRE | \
930  RTE_ETH_RSS_MPLS)
931 #define ETH_RSS_PROTO_MASK RTE_DEPRECATED(ETH_RSS_PROTO_MASK) RTE_ETH_RSS_PROTO_MASK
932 
933 /*
934  * Definitions used for redirection table entry size.
935  * Some RSS RETA sizes may not be supported by some drivers, check the
936  * documentation or the description of relevant functions for more details.
937  */
938 #define RTE_ETH_RSS_RETA_SIZE_64 64
939 #define RTE_ETH_RSS_RETA_SIZE_128 128
940 #define RTE_ETH_RSS_RETA_SIZE_256 256
941 #define RTE_ETH_RSS_RETA_SIZE_512 512
942 #define RTE_ETH_RETA_GROUP_SIZE 64
943 
944 #define ETH_RSS_RETA_SIZE_64 RTE_DEPRECATED(ETH_RSS_RETA_SIZE_64) RTE_ETH_RSS_RETA_SIZE_64
945 #define ETH_RSS_RETA_SIZE_128 RTE_DEPRECATED(ETH_RSS_RETA_SIZE_128) RTE_ETH_RSS_RETA_SIZE_128
946 #define ETH_RSS_RETA_SIZE_256 RTE_DEPRECATED(ETH_RSS_RETA_SIZE_256) RTE_ETH_RSS_RETA_SIZE_256
947 #define ETH_RSS_RETA_SIZE_512 RTE_DEPRECATED(ETH_RSS_RETA_SIZE_512) RTE_ETH_RSS_RETA_SIZE_512
948 #define RTE_RETA_GROUP_SIZE RTE_DEPRECATED(RTE_RETA_GROUP_SIZE) RTE_ETH_RETA_GROUP_SIZE
949 
951 #define RTE_ETH_VMDQ_MAX_VLAN_FILTERS 64
952 #define RTE_ETH_DCB_NUM_USER_PRIORITIES 8
953 #define RTE_ETH_VMDQ_DCB_NUM_QUEUES 128
954 #define RTE_ETH_DCB_NUM_QUEUES 128
957 #define ETH_VMDQ_MAX_VLAN_FILTERS RTE_DEPRECATED(ETH_VMDQ_MAX_VLAN_FILTERS) RTE_ETH_VMDQ_MAX_VLAN_FILTERS
958 #define ETH_DCB_NUM_USER_PRIORITIES RTE_DEPRECATED(ETH_DCB_NUM_USER_PRIORITIES) RTE_ETH_DCB_NUM_USER_PRIORITIES
959 #define ETH_VMDQ_DCB_NUM_QUEUES RTE_DEPRECATED(ETH_VMDQ_DCB_NUM_QUEUES) RTE_ETH_VMDQ_DCB_NUM_QUEUES
960 #define ETH_DCB_NUM_QUEUES RTE_DEPRECATED(ETH_DCB_NUM_QUEUES) RTE_ETH_DCB_NUM_QUEUES
961 
963 #define RTE_ETH_DCB_PG_SUPPORT RTE_BIT32(0)
964 #define RTE_ETH_DCB_PFC_SUPPORT RTE_BIT32(1)
967 #define ETH_DCB_PG_SUPPORT RTE_DEPRECATED(ETH_DCB_PG_SUPPORT) RTE_ETH_DCB_PG_SUPPORT
968 #define ETH_DCB_PFC_SUPPORT RTE_DEPRECATED(ETH_DCB_PFC_SUPPORT) RTE_ETH_DCB_PFC_SUPPORT
969 
971 #define RTE_ETH_VLAN_STRIP_OFFLOAD 0x0001
972 #define RTE_ETH_VLAN_FILTER_OFFLOAD 0x0002
973 #define RTE_ETH_VLAN_EXTEND_OFFLOAD 0x0004
974 #define RTE_ETH_QINQ_STRIP_OFFLOAD 0x0008
976 #define ETH_VLAN_STRIP_OFFLOAD RTE_DEPRECATED(ETH_VLAN_STRIP_OFFLOAD) RTE_ETH_VLAN_STRIP_OFFLOAD
977 #define ETH_VLAN_FILTER_OFFLOAD RTE_DEPRECATED(ETH_VLAN_FILTER_OFFLOAD) RTE_ETH_VLAN_FILTER_OFFLOAD
978 #define ETH_VLAN_EXTEND_OFFLOAD RTE_DEPRECATED(ETH_VLAN_EXTEND_OFFLOAD) RTE_ETH_VLAN_EXTEND_OFFLOAD
979 #define ETH_QINQ_STRIP_OFFLOAD RTE_DEPRECATED(ETH_QINQ_STRIP_OFFLOAD) RTE_ETH_QINQ_STRIP_OFFLOAD
980 
981 #define RTE_ETH_VLAN_STRIP_MASK 0x0001
982 #define RTE_ETH_VLAN_FILTER_MASK 0x0002
983 #define RTE_ETH_VLAN_EXTEND_MASK 0x0004
984 #define RTE_ETH_QINQ_STRIP_MASK 0x0008
985 #define RTE_ETH_VLAN_ID_MAX 0x0FFF
988 #define ETH_VLAN_STRIP_MASK RTE_DEPRECATED(ETH_VLAN_STRIP_MASK) RTE_ETH_VLAN_STRIP_MASK
989 #define ETH_VLAN_FILTER_MASK RTE_DEPRECATED(ETH_VLAN_FILTER_MASK) RTE_ETH_VLAN_FILTER_MASK
990 #define ETH_VLAN_EXTEND_MASK RTE_DEPRECATED(ETH_VLAN_EXTEND_MASK) RTE_ETH_VLAN_EXTEND_MASK
991 #define ETH_QINQ_STRIP_MASK RTE_DEPRECATED(ETH_QINQ_STRIP_MASK) RTE_ETH_QINQ_STRIP_MASK
992 #define ETH_VLAN_ID_MAX RTE_DEPRECATED(ETH_VLAN_ID_MAX) RTE_ETH_VLAN_ID_MAX
993 
994 /* Definitions used for receive MAC address */
995 #define RTE_ETH_NUM_RECEIVE_MAC_ADDR 128
996 #define ETH_NUM_RECEIVE_MAC_ADDR RTE_DEPRECATED(ETH_NUM_RECEIVE_MAC_ADDR) RTE_ETH_NUM_RECEIVE_MAC_ADDR
997 
998 /* Definitions used for unicast hash */
999 #define RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY 128
1000 #define ETH_VMDQ_NUM_UC_HASH_ARRAY RTE_DEPRECATED(ETH_VMDQ_NUM_UC_HASH_ARRAY) RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY
1001 
1006 #define RTE_ETH_VMDQ_ACCEPT_UNTAG RTE_BIT32(0)
1007 
1008 #define RTE_ETH_VMDQ_ACCEPT_HASH_MC RTE_BIT32(1)
1009 
1010 #define RTE_ETH_VMDQ_ACCEPT_HASH_UC RTE_BIT32(2)
1011 
1012 #define RTE_ETH_VMDQ_ACCEPT_BROADCAST RTE_BIT32(3)
1013 
1014 #define RTE_ETH_VMDQ_ACCEPT_MULTICAST RTE_BIT32(4)
1015 
1017 #define ETH_VMDQ_ACCEPT_UNTAG RTE_DEPRECATED(ETH_VMDQ_ACCEPT_UNTAG) RTE_ETH_VMDQ_ACCEPT_UNTAG
1018 #define ETH_VMDQ_ACCEPT_HASH_MC RTE_DEPRECATED(ETH_VMDQ_ACCEPT_HASH_MC) RTE_ETH_VMDQ_ACCEPT_HASH_MC
1019 #define ETH_VMDQ_ACCEPT_HASH_UC RTE_DEPRECATED(ETH_VMDQ_ACCEPT_HASH_UC) RTE_ETH_VMDQ_ACCEPT_HASH_UC
1020 #define ETH_VMDQ_ACCEPT_BROADCAST RTE_DEPRECATED(ETH_VMDQ_ACCEPT_BROADCAST) RTE_ETH_VMDQ_ACCEPT_BROADCAST
1021 #define ETH_VMDQ_ACCEPT_MULTICAST RTE_DEPRECATED(ETH_VMDQ_ACCEPT_MULTICAST) RTE_ETH_VMDQ_ACCEPT_MULTICAST
1022 
1029 struct rte_eth_rss_reta_entry64 {
1031  uint64_t mask;
1033  uint16_t reta[RTE_ETH_RETA_GROUP_SIZE];
1034 };
1035 
1040 enum rte_eth_nb_tcs {
1041  RTE_ETH_4_TCS = 4,
1042  RTE_ETH_8_TCS = 8
1043 };
1044 #define ETH_4_TCS RTE_DEPRECATED(ETH_4_TCS) RTE_ETH_4_TCS
1045 #define ETH_8_TCS RTE_DEPRECATED(ETH_8_TCS) RTE_ETH_8_TCS
1046 
1051 enum rte_eth_nb_pools {
1052  RTE_ETH_8_POOLS = 8,
1053  RTE_ETH_16_POOLS = 16,
1054  RTE_ETH_32_POOLS = 32,
1055  RTE_ETH_64_POOLS = 64
1056 };
1057 #define ETH_8_POOLS RTE_DEPRECATED(ETH_8_POOLS) RTE_ETH_8_POOLS
1058 #define ETH_16_POOLS RTE_DEPRECATED(ETH_16_POOLS) RTE_ETH_16_POOLS
1059 #define ETH_32_POOLS RTE_DEPRECATED(ETH_32_POOLS) RTE_ETH_32_POOLS
1060 #define ETH_64_POOLS RTE_DEPRECATED(ETH_64_POOLS) RTE_ETH_64_POOLS
1061 
1062 /* This structure may be extended in future. */
1063 struct rte_eth_dcb_rx_conf {
1064  enum rte_eth_nb_tcs nb_tcs;
1066  uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
1067 };
1068 
1069 struct rte_eth_vmdq_dcb_tx_conf {
1070  enum rte_eth_nb_pools nb_queue_pools;
1072  uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
1073 };
1074 
1075 struct rte_eth_dcb_tx_conf {
1076  enum rte_eth_nb_tcs nb_tcs;
1078  uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
1079 };
1080 
1081 struct rte_eth_vmdq_tx_conf {
1082  enum rte_eth_nb_pools nb_queue_pools;
1083 };
1084 
1096 struct rte_eth_vmdq_dcb_conf {
1097  enum rte_eth_nb_pools nb_queue_pools;
1098  uint8_t enable_default_pool;
1099  uint8_t default_pool;
1100  uint8_t nb_pool_maps;
1101  struct {
1102  uint16_t vlan_id;
1103  uint64_t pools;
1104  } pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS];
1106  uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
1107 };
1108 
1127 struct rte_eth_vmdq_rx_conf {
1128  enum rte_eth_nb_pools nb_queue_pools;
1129  uint8_t enable_default_pool;
1130  uint8_t default_pool;
1131  uint8_t enable_loop_back;
1132  uint8_t nb_pool_maps;
1133  uint32_t rx_mode;
1134  struct {
1135  uint16_t vlan_id;
1136  uint64_t pools;
1137  } pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS];
1138 };
1139 
1143 struct rte_eth_txmode {
1144  enum rte_eth_tx_mq_mode mq_mode;
1150  uint64_t offloads;
1151 
1152  uint16_t pvid;
1153  __extension__
1154  uint8_t
1155  hw_vlan_reject_tagged : 1,
1157  hw_vlan_reject_untagged : 1,
1159  hw_vlan_insert_pvid : 1;
1160 
1161  uint64_t reserved_64s[2];
1162  void *reserved_ptrs[2];
1163 };
1164 
1201 struct rte_eth_rxseg_split {
1202  struct rte_mempool *mp;
1203  uint16_t length;
1204  uint16_t offset;
1205  uint32_t reserved;
1206 };
1207 
1214 union rte_eth_rxseg {
1215  /* The settings for buffer split offload. */
1216  struct rte_eth_rxseg_split split;
1217  /* The other features settings should be added here. */
1218 };
1219 
1223 struct rte_eth_rxconf {
1224  struct rte_eth_thresh rx_thresh;
1225  uint16_t rx_free_thresh;
1226  uint8_t rx_drop_en;
1227  uint8_t rx_deferred_start;
1228  uint16_t rx_nseg;
1235  uint16_t share_group;
1236  uint16_t share_qid;
1242  uint64_t offloads;
1250  union rte_eth_rxseg *rx_seg;
1251 
1252  uint64_t reserved_64s[2];
1253  void *reserved_ptrs[2];
1254 };
1255 
1259 struct rte_eth_txconf {
1260  struct rte_eth_thresh tx_thresh;
1261  uint16_t tx_rs_thresh;
1262  uint16_t tx_free_thresh;
1265  uint8_t tx_deferred_start;
1271  uint64_t offloads;
1272 
1273  uint64_t reserved_64s[2];
1274  void *reserved_ptrs[2];
1275 };
1276 
1283 struct rte_eth_hairpin_cap {
1285  uint16_t max_nb_queues;
1287  uint16_t max_rx_2_tx;
1289  uint16_t max_tx_2_rx;
1290  uint16_t max_nb_desc;
1291 };
1292 
1293 #define RTE_ETH_MAX_HAIRPIN_PEERS 32
1294 
1301 struct rte_eth_hairpin_peer {
1302  uint16_t port;
1303  uint16_t queue;
1304 };
1305 
1312 struct rte_eth_hairpin_conf {
1313  uint32_t peer_count:16;
1324  uint32_t tx_explicit:1;
1325 
1337  uint32_t manual_bind:1;
1338  uint32_t reserved:14;
1339  struct rte_eth_hairpin_peer peers[RTE_ETH_MAX_HAIRPIN_PEERS];
1340 };
1341 
1345 struct rte_eth_desc_lim {
1346  uint16_t nb_max;
1347  uint16_t nb_min;
1348  uint16_t nb_align;
1358  uint16_t nb_seg_max;
1359 
1371  uint16_t nb_mtu_seg_max;
1372 };
1373 
1377 enum rte_eth_fc_mode {
1378  RTE_ETH_FC_NONE = 0,
1379  RTE_ETH_FC_RX_PAUSE,
1380  RTE_ETH_FC_TX_PAUSE,
1381  RTE_ETH_FC_FULL
1382 };
1383 #define RTE_FC_NONE RTE_DEPRECATED(RTE_FC_NONE) RTE_ETH_FC_NONE
1384 #define RTE_FC_RX_PAUSE RTE_DEPRECATED(RTE_FC_RX_PAUSE) RTE_ETH_FC_RX_PAUSE
1385 #define RTE_FC_TX_PAUSE RTE_DEPRECATED(RTE_FC_TX_PAUSE) RTE_ETH_FC_TX_PAUSE
1386 #define RTE_FC_FULL RTE_DEPRECATED(RTE_FC_FULL) RTE_ETH_FC_FULL
1387 
1393 struct rte_eth_fc_conf {
1394  uint32_t high_water;
1395  uint32_t low_water;
1396  uint16_t pause_time;
1397  uint16_t send_xon;
1398  enum rte_eth_fc_mode mode;
1399  uint8_t mac_ctrl_frame_fwd;
1400  uint8_t autoneg;
1401 };
1402 
1408 struct rte_eth_pfc_conf {
1409  struct rte_eth_fc_conf fc;
1410  uint8_t priority;
1411 };
1412 
1419 struct rte_eth_pfc_queue_info {
1423  uint8_t tc_max;
1425  enum rte_eth_fc_mode mode_capa;
1426 };
1427 
1445 struct rte_eth_pfc_queue_conf {
1446  enum rte_eth_fc_mode mode;
1448  struct {
1449  uint16_t tx_qid;
1453  uint8_t tc;
1454  } rx_pause; /* Valid when (mode == FC_RX_PAUSE || mode == FC_FULL) */
1455 
1456  struct {
1457  uint16_t pause_time;
1458  uint16_t rx_qid;
1462  uint8_t tc;
1463  } tx_pause; /* Valid when (mode == FC_TX_PAUSE || mode == FC_FULL) */
1464 };
1465 
1470 enum rte_eth_tunnel_type {
1471  RTE_ETH_TUNNEL_TYPE_NONE = 0,
1472  RTE_ETH_TUNNEL_TYPE_VXLAN,
1473  RTE_ETH_TUNNEL_TYPE_GENEVE,
1474  RTE_ETH_TUNNEL_TYPE_TEREDO,
1475  RTE_ETH_TUNNEL_TYPE_NVGRE,
1476  RTE_ETH_TUNNEL_TYPE_IP_IN_GRE,
1477  RTE_ETH_L2_TUNNEL_TYPE_E_TAG,
1478  RTE_ETH_TUNNEL_TYPE_VXLAN_GPE,
1479  RTE_ETH_TUNNEL_TYPE_ECPRI,
1480  RTE_ETH_TUNNEL_TYPE_MAX,
1481 };
1482 #define RTE_TUNNEL_TYPE_NONE RTE_DEPRECATED(RTE_TUNNEL_TYPE_NONE) RTE_ETH_TUNNEL_TYPE_NONE
1483 #define RTE_TUNNEL_TYPE_VXLAN RTE_DEPRECATED(RTE_TUNNEL_TYPE_VXLAN) RTE_ETH_TUNNEL_TYPE_VXLAN
1484 #define RTE_TUNNEL_TYPE_GENEVE RTE_DEPRECATED(RTE_TUNNEL_TYPE_GENEVE) RTE_ETH_TUNNEL_TYPE_GENEVE
1485 #define RTE_TUNNEL_TYPE_TEREDO RTE_DEPRECATED(RTE_TUNNEL_TYPE_TEREDO) RTE_ETH_TUNNEL_TYPE_TEREDO
1486 #define RTE_TUNNEL_TYPE_NVGRE RTE_DEPRECATED(RTE_TUNNEL_TYPE_NVGRE) RTE_ETH_TUNNEL_TYPE_NVGRE
1487 #define RTE_TUNNEL_TYPE_IP_IN_GRE RTE_DEPRECATED(RTE_TUNNEL_TYPE_IP_IN_GRE) RTE_ETH_TUNNEL_TYPE_IP_IN_GRE
1488 #define RTE_L2_TUNNEL_TYPE_E_TAG RTE_DEPRECATED(RTE_L2_TUNNEL_TYPE_E_TAG) RTE_ETH_L2_TUNNEL_TYPE_E_TAG
1489 #define RTE_TUNNEL_TYPE_VXLAN_GPE RTE_DEPRECATED(RTE_TUNNEL_TYPE_VXLAN_GPE) RTE_ETH_TUNNEL_TYPE_VXLAN_GPE
1490 #define RTE_TUNNEL_TYPE_ECPRI RTE_DEPRECATED(RTE_TUNNEL_TYPE_ECPRI) RTE_ETH_TUNNEL_TYPE_ECPRI
1491 #define RTE_TUNNEL_TYPE_MAX RTE_DEPRECATED(RTE_TUNNEL_TYPE_MAX) RTE_ETH_TUNNEL_TYPE_MAX
1492 
1493 /* Deprecated API file for rte_eth_dev_filter_* functions */
1494 #include "rte_eth_ctrl.h"
1495 
1500 enum rte_eth_fdir_pballoc_type {
1501  RTE_ETH_FDIR_PBALLOC_64K = 0,
1502  RTE_ETH_FDIR_PBALLOC_128K,
1503  RTE_ETH_FDIR_PBALLOC_256K,
1504 };
1505 #define rte_fdir_pballoc_type rte_eth_fdir_pballoc_type
1506 
1507 #define RTE_FDIR_PBALLOC_64K RTE_DEPRECATED(RTE_FDIR_PBALLOC_64K) RTE_ETH_FDIR_PBALLOC_64K
1508 #define RTE_FDIR_PBALLOC_128K RTE_DEPRECATED(RTE_FDIR_PBALLOC_128K) RTE_ETH_FDIR_PBALLOC_128K
1509 #define RTE_FDIR_PBALLOC_256K RTE_DEPRECATED(RTE_FDIR_PBALLOC_256K) RTE_ETH_FDIR_PBALLOC_256K
1510 
1514 enum rte_fdir_status_mode {
1515  RTE_FDIR_NO_REPORT_STATUS = 0,
1516  RTE_FDIR_REPORT_STATUS,
1517  RTE_FDIR_REPORT_STATUS_ALWAYS,
1518 };
1519 
1526 struct rte_eth_fdir_conf {
1527  enum rte_fdir_mode mode;
1528  enum rte_eth_fdir_pballoc_type pballoc;
1529  enum rte_fdir_status_mode status;
1531  uint8_t drop_queue;
1532  struct rte_eth_fdir_masks mask;
1534  struct rte_eth_fdir_flex_conf flex_conf;
1535 };
1536 #define rte_fdir_conf rte_eth_fdir_conf
1537 
1547 struct rte_eth_udp_tunnel {
1548  uint16_t udp_port;
1549  uint8_t prot_type;
1550 };
1551 
1555 struct rte_eth_intr_conf {
1557  uint32_t lsc:1;
1559  uint32_t rxq:1;
1561  uint32_t rmv:1;
1562 };
1563 
1564 #define rte_intr_conf rte_eth_intr_conf
1565 
1571 struct rte_eth_conf {
1572  uint32_t link_speeds;
1579  struct rte_eth_rxmode rxmode;
1580  struct rte_eth_txmode txmode;
1581  uint32_t lpbk_mode;
1586  struct {
1587  struct rte_eth_rss_conf rss_conf;
1589  struct rte_eth_vmdq_dcb_conf vmdq_dcb_conf;
1591  struct rte_eth_dcb_rx_conf dcb_rx_conf;
1593  struct rte_eth_vmdq_rx_conf vmdq_rx_conf;
1594  } rx_adv_conf;
1595  union {
1597  struct rte_eth_vmdq_dcb_tx_conf vmdq_dcb_tx_conf;
1599  struct rte_eth_dcb_tx_conf dcb_tx_conf;
1601  struct rte_eth_vmdq_tx_conf vmdq_tx_conf;
1602  } tx_adv_conf;
1605  uint32_t dcb_capability_en;
1606  struct rte_eth_fdir_conf fdir_conf;
1607  struct rte_eth_intr_conf intr_conf;
1608 };
1609 
1613 #define RTE_ETH_RX_OFFLOAD_VLAN_STRIP RTE_BIT64(0)
1614 #define RTE_ETH_RX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1615 #define RTE_ETH_RX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1616 #define RTE_ETH_RX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1617 #define RTE_ETH_RX_OFFLOAD_TCP_LRO RTE_BIT64(4)
1618 #define RTE_ETH_RX_OFFLOAD_QINQ_STRIP RTE_BIT64(5)
1619 #define RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(6)
1620 #define RTE_ETH_RX_OFFLOAD_MACSEC_STRIP RTE_BIT64(7)
1621 #define RTE_ETH_RX_OFFLOAD_HEADER_SPLIT RTE_BIT64(8)
1622 #define RTE_ETH_RX_OFFLOAD_VLAN_FILTER RTE_BIT64(9)
1623 #define RTE_ETH_RX_OFFLOAD_VLAN_EXTEND RTE_BIT64(10)
1624 #define RTE_ETH_RX_OFFLOAD_SCATTER RTE_BIT64(13)
1625 
1630 #define RTE_ETH_RX_OFFLOAD_TIMESTAMP RTE_BIT64(14)
1631 #define RTE_ETH_RX_OFFLOAD_SECURITY RTE_BIT64(15)
1632 #define RTE_ETH_RX_OFFLOAD_KEEP_CRC RTE_BIT64(16)
1633 #define RTE_ETH_RX_OFFLOAD_SCTP_CKSUM RTE_BIT64(17)
1634 #define RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(18)
1635 #define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19)
1636 #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20)
1637 
1638 #define DEV_RX_OFFLOAD_VLAN_STRIP RTE_DEPRECATED(DEV_RX_OFFLOAD_VLAN_STRIP) RTE_ETH_RX_OFFLOAD_VLAN_STRIP
1639 #define DEV_RX_OFFLOAD_IPV4_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_IPV4_CKSUM) RTE_ETH_RX_OFFLOAD_IPV4_CKSUM
1640 #define DEV_RX_OFFLOAD_UDP_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_UDP_CKSUM) RTE_ETH_RX_OFFLOAD_UDP_CKSUM
1641 #define DEV_RX_OFFLOAD_TCP_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_TCP_CKSUM) RTE_ETH_RX_OFFLOAD_TCP_CKSUM
1642 #define DEV_RX_OFFLOAD_TCP_LRO RTE_DEPRECATED(DEV_RX_OFFLOAD_TCP_LRO) RTE_ETH_RX_OFFLOAD_TCP_LRO
1643 #define DEV_RX_OFFLOAD_QINQ_STRIP RTE_DEPRECATED(DEV_RX_OFFLOAD_QINQ_STRIP) RTE_ETH_RX_OFFLOAD_QINQ_STRIP
1644 #define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM
1645 #define DEV_RX_OFFLOAD_MACSEC_STRIP RTE_DEPRECATED(DEV_RX_OFFLOAD_MACSEC_STRIP) RTE_ETH_RX_OFFLOAD_MACSEC_STRIP
1646 #define DEV_RX_OFFLOAD_HEADER_SPLIT RTE_DEPRECATED(DEV_RX_OFFLOAD_HEADER_SPLIT) RTE_ETH_RX_OFFLOAD_HEADER_SPLIT
1647 #define DEV_RX_OFFLOAD_VLAN_FILTER RTE_DEPRECATED(DEV_RX_OFFLOAD_VLAN_FILTER) RTE_ETH_RX_OFFLOAD_VLAN_FILTER
1648 #define DEV_RX_OFFLOAD_VLAN_EXTEND RTE_DEPRECATED(DEV_RX_OFFLOAD_VLAN_EXTEND) RTE_ETH_RX_OFFLOAD_VLAN_EXTEND
1649 #define DEV_RX_OFFLOAD_SCATTER RTE_DEPRECATED(DEV_RX_OFFLOAD_SCATTER) RTE_ETH_RX_OFFLOAD_SCATTER
1650 #define DEV_RX_OFFLOAD_TIMESTAMP RTE_DEPRECATED(DEV_RX_OFFLOAD_TIMESTAMP) RTE_ETH_RX_OFFLOAD_TIMESTAMP
1651 #define DEV_RX_OFFLOAD_SECURITY RTE_DEPRECATED(DEV_RX_OFFLOAD_SECURITY) RTE_ETH_RX_OFFLOAD_SECURITY
1652 #define DEV_RX_OFFLOAD_KEEP_CRC RTE_DEPRECATED(DEV_RX_OFFLOAD_KEEP_CRC) RTE_ETH_RX_OFFLOAD_KEEP_CRC
1653 #define DEV_RX_OFFLOAD_SCTP_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_SCTP_CKSUM) RTE_ETH_RX_OFFLOAD_SCTP_CKSUM
1654 #define DEV_RX_OFFLOAD_OUTER_UDP_CKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_OUTER_UDP_CKSUM) RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM
1655 #define DEV_RX_OFFLOAD_RSS_HASH RTE_DEPRECATED(DEV_RX_OFFLOAD_RSS_HASH) RTE_ETH_RX_OFFLOAD_RSS_HASH
1656 
1657 #define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
1658  RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
1659  RTE_ETH_RX_OFFLOAD_TCP_CKSUM)
1660 #define DEV_RX_OFFLOAD_CHECKSUM RTE_DEPRECATED(DEV_RX_OFFLOAD_CHECKSUM) RTE_ETH_RX_OFFLOAD_CHECKSUM
1661 #define RTE_ETH_RX_OFFLOAD_VLAN (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
1662  RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \
1663  RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \
1664  RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
1665 #define DEV_RX_OFFLOAD_VLAN RTE_DEPRECATED(DEV_RX_OFFLOAD_VLAN) RTE_ETH_RX_OFFLOAD_VLAN
1666 
1667 /*
1668  * If new Rx offload capabilities are defined, they also must be
1669  * mentioned in rte_rx_offload_names in rte_ethdev.c file.
1670  */
1671 
1675 #define RTE_ETH_TX_OFFLOAD_VLAN_INSERT RTE_BIT64(0)
1676 #define RTE_ETH_TX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1677 #define RTE_ETH_TX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1678 #define RTE_ETH_TX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1679 #define RTE_ETH_TX_OFFLOAD_SCTP_CKSUM RTE_BIT64(4)
1680 #define RTE_ETH_TX_OFFLOAD_TCP_TSO RTE_BIT64(5)
1681 #define RTE_ETH_TX_OFFLOAD_UDP_TSO RTE_BIT64(6)
1682 #define RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(7)
1683 #define RTE_ETH_TX_OFFLOAD_QINQ_INSERT RTE_BIT64(8)
1684 #define RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO RTE_BIT64(9)
1685 #define RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO RTE_BIT64(10)
1686 #define RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO RTE_BIT64(11)
1687 #define RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO RTE_BIT64(12)
1688 #define RTE_ETH_TX_OFFLOAD_MACSEC_INSERT RTE_BIT64(13)
1689 
1693 #define RTE_ETH_TX_OFFLOAD_MT_LOCKFREE RTE_BIT64(14)
1694 
1695 #define RTE_ETH_TX_OFFLOAD_MULTI_SEGS RTE_BIT64(15)
1696 
1701 #define RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE RTE_BIT64(16)
1702 #define RTE_ETH_TX_OFFLOAD_SECURITY RTE_BIT64(17)
1703 
1708 #define RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO RTE_BIT64(18)
1709 
1714 #define RTE_ETH_TX_OFFLOAD_IP_TNL_TSO RTE_BIT64(19)
1715 
1716 #define RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(20)
1717 
1722 #define RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP RTE_BIT64(21)
1723 /*
1724  * If new Tx offload capabilities are defined, they also must be
1725  * mentioned in rte_tx_offload_names in rte_ethdev.c file.
1726  */
1727 
1728 #define DEV_TX_OFFLOAD_VLAN_INSERT RTE_DEPRECATED(DEV_TX_OFFLOAD_VLAN_INSERT) RTE_ETH_TX_OFFLOAD_VLAN_INSERT
1729 #define DEV_TX_OFFLOAD_IPV4_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_IPV4_CKSUM) RTE_ETH_TX_OFFLOAD_IPV4_CKSUM
1730 #define DEV_TX_OFFLOAD_UDP_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_UDP_CKSUM) RTE_ETH_TX_OFFLOAD_UDP_CKSUM
1731 #define DEV_TX_OFFLOAD_TCP_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_TCP_CKSUM) RTE_ETH_TX_OFFLOAD_TCP_CKSUM
1732 #define DEV_TX_OFFLOAD_SCTP_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_SCTP_CKSUM) RTE_ETH_TX_OFFLOAD_SCTP_CKSUM
1733 #define DEV_TX_OFFLOAD_TCP_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_TCP_TSO) RTE_ETH_TX_OFFLOAD_TCP_TSO
1734 #define DEV_TX_OFFLOAD_UDP_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_UDP_TSO) RTE_ETH_TX_OFFLOAD_UDP_TSO
1735 #define DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM) RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM
1736 #define DEV_TX_OFFLOAD_QINQ_INSERT RTE_DEPRECATED(DEV_TX_OFFLOAD_QINQ_INSERT) RTE_ETH_TX_OFFLOAD_QINQ_INSERT
1737 #define DEV_TX_OFFLOAD_VXLAN_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_VXLAN_TNL_TSO) RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO
1738 #define DEV_TX_OFFLOAD_GRE_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_GRE_TNL_TSO) RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO
1739 #define DEV_TX_OFFLOAD_IPIP_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_IPIP_TNL_TSO) RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO
1740 #define DEV_TX_OFFLOAD_GENEVE_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_GENEVE_TNL_TSO) RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO
1741 #define DEV_TX_OFFLOAD_MACSEC_INSERT RTE_DEPRECATED(DEV_TX_OFFLOAD_MACSEC_INSERT) RTE_ETH_TX_OFFLOAD_MACSEC_INSERT
1742 #define DEV_TX_OFFLOAD_MT_LOCKFREE RTE_DEPRECATED(DEV_TX_OFFLOAD_MT_LOCKFREE) RTE_ETH_TX_OFFLOAD_MT_LOCKFREE
1743 #define DEV_TX_OFFLOAD_MULTI_SEGS RTE_DEPRECATED(DEV_TX_OFFLOAD_MULTI_SEGS) RTE_ETH_TX_OFFLOAD_MULTI_SEGS
1744 #define DEV_TX_OFFLOAD_MBUF_FAST_FREE RTE_DEPRECATED(DEV_TX_OFFLOAD_MBUF_FAST_FREE) RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE
1745 #define DEV_TX_OFFLOAD_SECURITY RTE_DEPRECATED(DEV_TX_OFFLOAD_SECURITY) RTE_ETH_TX_OFFLOAD_SECURITY
1746 #define DEV_TX_OFFLOAD_UDP_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_UDP_TNL_TSO) RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO
1747 #define DEV_TX_OFFLOAD_IP_TNL_TSO RTE_DEPRECATED(DEV_TX_OFFLOAD_IP_TNL_TSO) RTE_ETH_TX_OFFLOAD_IP_TNL_TSO
1748 #define DEV_TX_OFFLOAD_OUTER_UDP_CKSUM RTE_DEPRECATED(DEV_TX_OFFLOAD_OUTER_UDP_CKSUM) RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM
1749 #define DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP RTE_DEPRECATED(DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP) RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP
1750 
1755 #define RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP RTE_BIT64(0)
1756 
1757 #define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP RTE_BIT64(1)
1758 
1767 #define RTE_ETH_DEV_CAPA_RXQ_SHARE RTE_BIT64(2)
1768 
1769 #define RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP RTE_BIT64(3)
1770 
1771 #define RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP RTE_BIT64(4)
1772 
1774 /*
1775  * Fallback default preferred Rx/Tx port parameters.
1776  * These are used if an application requests default parameters
1777  * but the PMD does not provide preferred values.
1778  */
1779 #define RTE_ETH_DEV_FALLBACK_RX_RINGSIZE 512
1780 #define RTE_ETH_DEV_FALLBACK_TX_RINGSIZE 512
1781 #define RTE_ETH_DEV_FALLBACK_RX_NBQUEUES 1
1782 #define RTE_ETH_DEV_FALLBACK_TX_NBQUEUES 1
1783 
1789 struct rte_eth_dev_portconf {
1790  uint16_t burst_size;
1791  uint16_t ring_size;
1792  uint16_t nb_queues;
1793 };
1794 
1799 #define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID (UINT16_MAX)
1800 
1804 struct rte_eth_switch_info {
1805  const char *name;
1806  uint16_t domain_id;
1814  uint16_t port_id;
1820  uint16_t rx_domain;
1821 };
1822 
1829 struct rte_eth_rxseg_capa {
1830  __extension__
1831  uint32_t multi_pools:1;
1832  uint32_t offset_allowed:1;
1833  uint32_t offset_align_log2:4;
1834  uint16_t max_nseg;
1835  uint16_t reserved;
1836 };
1837 
1845 enum rte_eth_representor_type {
1846  RTE_ETH_REPRESENTOR_NONE,
1847  RTE_ETH_REPRESENTOR_VF,
1848  RTE_ETH_REPRESENTOR_SF,
1849  RTE_ETH_REPRESENTOR_PF,
1850 };
1851 
1857 struct rte_eth_dev_info {
1858  struct rte_device *device;
1859  const char *driver_name;
1860  unsigned int if_index;
1862  uint16_t min_mtu;
1863  uint16_t max_mtu;
1864  const uint32_t *dev_flags;
1865  uint32_t min_rx_bufsize;
1866  uint32_t max_rx_pktlen;
1868  uint32_t max_lro_pkt_size;
1869  uint16_t max_rx_queues;
1870  uint16_t max_tx_queues;
1871  uint32_t max_mac_addrs;
1873  uint32_t max_hash_mac_addrs;
1874  uint16_t max_vfs;
1875  uint16_t max_vmdq_pools;
1876  struct rte_eth_rxseg_capa rx_seg_capa;
1878  uint64_t rx_offload_capa;
1880  uint64_t tx_offload_capa;
1882  uint64_t rx_queue_offload_capa;
1884  uint64_t tx_queue_offload_capa;
1886  uint16_t reta_size;
1887  uint8_t hash_key_size;
1889  uint64_t flow_type_rss_offloads;
1890  struct rte_eth_rxconf default_rxconf;
1891  struct rte_eth_txconf default_txconf;
1892  uint16_t vmdq_queue_base;
1893  uint16_t vmdq_queue_num;
1894  uint16_t vmdq_pool_base;
1895  struct rte_eth_desc_lim rx_desc_lim;
1896  struct rte_eth_desc_lim tx_desc_lim;
1897  uint32_t speed_capa;
1899  uint16_t nb_rx_queues;
1900  uint16_t nb_tx_queues;
1902  struct rte_eth_dev_portconf default_rxportconf;
1904  struct rte_eth_dev_portconf default_txportconf;
1906  uint64_t dev_capa;
1911  struct rte_eth_switch_info switch_info;
1912 
1913  uint64_t reserved_64s[2];
1914  void *reserved_ptrs[2];
1915 };
1916 
1918 #define RTE_ETH_QUEUE_STATE_STOPPED 0
1919 #define RTE_ETH_QUEUE_STATE_STARTED 1
1920 #define RTE_ETH_QUEUE_STATE_HAIRPIN 2
1927 struct rte_eth_rxq_info {
1928  struct rte_mempool *mp;
1929  struct rte_eth_rxconf conf;
1930  uint8_t scattered_rx;
1931  uint8_t queue_state;
1932  uint16_t nb_desc;
1933  uint16_t rx_buf_size;
1934 } __rte_cache_min_aligned;
1935 
1940 struct rte_eth_txq_info {
1941  struct rte_eth_txconf conf;
1942  uint16_t nb_desc;
1943  uint8_t queue_state;
1944 } __rte_cache_min_aligned;
1945 
1946 /* Generic Burst mode flag definition, values can be ORed. */
1947 
1953 #define RTE_ETH_BURST_FLAG_PER_QUEUE RTE_BIT64(0)
1954 
1959 struct rte_eth_burst_mode {
1960  uint64_t flags;
1962 #define RTE_ETH_BURST_MODE_INFO_SIZE 1024
1963  char info[RTE_ETH_BURST_MODE_INFO_SIZE];
1964 };
1965 
1967 #define RTE_ETH_XSTATS_NAME_SIZE 64
1968 
1978 struct rte_eth_xstat {
1979  uint64_t id;
1980  uint64_t value;
1981 };
1982 
1997 struct rte_eth_xstat_name {
1998  char name[RTE_ETH_XSTATS_NAME_SIZE];
1999 };
2000 
2001 #define RTE_ETH_DCB_NUM_TCS 8
2002 #define RTE_ETH_MAX_VMDQ_POOL 64
2003 
2004 #define ETH_DCB_NUM_TCS RTE_DEPRECATED(ETH_DCB_NUM_TCS) RTE_ETH_DCB_NUM_TCS
2005 #define ETH_MAX_VMDQ_POOL RTE_DEPRECATED(ETH_MAX_VMDQ_POOL) RTE_ETH_MAX_VMDQ_POOL
2006 
2011 struct rte_eth_dcb_tc_queue_mapping {
2013  struct {
2014  uint16_t base;
2015  uint16_t nb_queue;
2016  } tc_rxq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
2018  struct {
2019  uint16_t base;
2020  uint16_t nb_queue;
2021  } tc_txq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
2022 };
2023 
2028 struct rte_eth_dcb_info {
2029  uint8_t nb_tcs;
2030  uint8_t prio_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
2031  uint8_t tc_bws[RTE_ETH_DCB_NUM_TCS];
2033  struct rte_eth_dcb_tc_queue_mapping tc_queue;
2034 };
2035 
2040 enum rte_eth_fec_mode {
2041  RTE_ETH_FEC_NOFEC = 0,
2042  RTE_ETH_FEC_AUTO,
2043  RTE_ETH_FEC_BASER,
2044  RTE_ETH_FEC_RS,
2045 };
2046 
2047 /* Translate from FEC mode to FEC capa */
2048 #define RTE_ETH_FEC_MODE_TO_CAPA(x) RTE_BIT32(x)
2049 
2050 /* This macro indicates FEC capa mask */
2051 #define RTE_ETH_FEC_MODE_CAPA_MASK(x) RTE_BIT32(RTE_ETH_FEC_ ## x)
2052 
2053 /* A structure used to get capabilities per link speed */
2054 struct rte_eth_fec_capa {
2055  uint32_t speed;
2056  uint32_t capa;
2057 };
2058 
2059 #define RTE_ETH_ALL RTE_MAX_ETHPORTS
2060 
2061 /* Macros to check for valid port */
2062 #define RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, retval) do { \
2063  if (!rte_eth_dev_is_valid_port(port_id)) { \
2064  RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
2065  return retval; \
2066  } \
2067 } while (0)
2068 
2069 #define RTE_ETH_VALID_PORTID_OR_RET(port_id) do { \
2070  if (!rte_eth_dev_is_valid_port(port_id)) { \
2071  RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
2072  return; \
2073  } \
2074 } while (0)
2075 
2098 typedef uint16_t (*rte_rx_callback_fn)(uint16_t port_id, uint16_t queue,
2099  struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts,
2100  void *user_param);
2101 
2122 typedef uint16_t (*rte_tx_callback_fn)(uint16_t port_id, uint16_t queue,
2123  struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param);
2124 
2128 enum rte_eth_dev_state {
2130  RTE_ETH_DEV_UNUSED = 0,
2132  RTE_ETH_DEV_ATTACHED,
2134  RTE_ETH_DEV_REMOVED,
2135 };
2136 
2137 struct rte_eth_dev_sriov {
2138  uint8_t active;
2139  uint8_t nb_q_per_pool;
2140  uint16_t def_vmdq_idx;
2141  uint16_t def_pool_q_idx;
2142 };
2143 #define RTE_ETH_DEV_SRIOV(dev) ((dev)->data->sriov)
2144 
2145 #define RTE_ETH_NAME_MAX_LEN RTE_DEV_NAME_MAX_LEN
2146 
2147 #define RTE_ETH_DEV_NO_OWNER 0
2148 
2149 #define RTE_ETH_MAX_OWNER_NAME_LEN 64
2150 
2151 struct rte_eth_dev_owner {
2152  uint64_t id;
2153  char name[RTE_ETH_MAX_OWNER_NAME_LEN];
2154 };
2155 
2161 #define RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE RTE_BIT32(0)
2162 
2163 #define RTE_ETH_DEV_INTR_LSC RTE_BIT32(1)
2164 
2165 #define RTE_ETH_DEV_BONDED_SLAVE RTE_BIT32(2)
2166 
2167 #define RTE_ETH_DEV_INTR_RMV RTE_BIT32(3)
2168 
2169 #define RTE_ETH_DEV_REPRESENTOR RTE_BIT32(4)
2170 
2171 #define RTE_ETH_DEV_NOLIVE_MAC_ADDR RTE_BIT32(5)
2172 
2176 #define RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS RTE_BIT32(6)
2177 
2190 uint64_t rte_eth_find_next_owned_by(uint16_t port_id,
2191  const uint64_t owner_id);
2192 
2196 #define RTE_ETH_FOREACH_DEV_OWNED_BY(p, o) \
2197  for (p = rte_eth_find_next_owned_by(0, o); \
2198  (unsigned int)p < (unsigned int)RTE_MAX_ETHPORTS; \
2199  p = rte_eth_find_next_owned_by(p + 1, o))
2200 
2209 uint16_t rte_eth_find_next(uint16_t port_id);
2210 
2214 #define RTE_ETH_FOREACH_DEV(p) \
2215  RTE_ETH_FOREACH_DEV_OWNED_BY(p, RTE_ETH_DEV_NO_OWNER)
2216 
2228 uint16_t
2229 rte_eth_find_next_of(uint16_t port_id_start,
2230  const struct rte_device *parent);
2231 
2240 #define RTE_ETH_FOREACH_DEV_OF(port_id, parent) \
2241  for (port_id = rte_eth_find_next_of(0, parent); \
2242  port_id < RTE_MAX_ETHPORTS; \
2243  port_id = rte_eth_find_next_of(port_id + 1, parent))
2244 
2256 uint16_t
2257 rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id);
2258 
2269 #define RTE_ETH_FOREACH_DEV_SIBLING(port_id, ref_port_id) \
2270  for (port_id = rte_eth_find_next_sibling(0, ref_port_id); \
2271  port_id < RTE_MAX_ETHPORTS; \
2272  port_id = rte_eth_find_next_sibling(port_id + 1, ref_port_id))
2273 
2287 __rte_experimental
2288 int rte_eth_dev_owner_new(uint64_t *owner_id);
2289 
2303 __rte_experimental
2304 int rte_eth_dev_owner_set(const uint16_t port_id,
2305  const struct rte_eth_dev_owner *owner);
2306 
2320 __rte_experimental
2321 int rte_eth_dev_owner_unset(const uint16_t port_id,
2322  const uint64_t owner_id);
2323 
2335 __rte_experimental
2336 int rte_eth_dev_owner_delete(const uint64_t owner_id);
2337 
2351 __rte_experimental
2352 int rte_eth_dev_owner_get(const uint16_t port_id,
2353  struct rte_eth_dev_owner *owner);
2354 
2365 uint16_t rte_eth_dev_count_avail(void);
2366 
2375 uint16_t rte_eth_dev_count_total(void);
2376 
2388 uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex);
2389 
2398 const char *rte_eth_dev_rx_offload_name(uint64_t offload);
2399 
2408 const char *rte_eth_dev_tx_offload_name(uint64_t offload);
2409 
2421 __rte_experimental
2422 const char *rte_eth_dev_capability_name(uint64_t capability);
2423 
2463 int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue,
2464  uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf);
2465 
2474 int
2475 rte_eth_dev_is_removed(uint16_t port_id);
2476 
2539 int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2540  uint16_t nb_rx_desc, unsigned int socket_id,
2541  const struct rte_eth_rxconf *rx_conf,
2542  struct rte_mempool *mb_pool);
2543 
2571 __rte_experimental
2572 int rte_eth_rx_hairpin_queue_setup
2573  (uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc,
2574  const struct rte_eth_hairpin_conf *conf);
2575 
2624 int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2625  uint16_t nb_tx_desc, unsigned int socket_id,
2626  const struct rte_eth_txconf *tx_conf);
2627 
2653 __rte_experimental
2654 int rte_eth_tx_hairpin_queue_setup
2655  (uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc,
2656  const struct rte_eth_hairpin_conf *conf);
2657 
2684 __rte_experimental
2685 int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2686  size_t len, uint32_t direction);
2687 
2710 __rte_experimental
2711 int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port);
2712 
2737 __rte_experimental
2738 int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port);
2739 
2750 int rte_eth_dev_socket_id(uint16_t port_id);
2751 
2761 int rte_eth_dev_is_valid_port(uint16_t port_id);
2762 
2780 int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id);
2781 
2798 int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id);
2799 
2817 int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id);
2818 
2835 int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id);
2836 
2856 int rte_eth_dev_start(uint16_t port_id);
2857 
2868 int rte_eth_dev_stop(uint16_t port_id);
2869 
2882 int rte_eth_dev_set_link_up(uint16_t port_id);
2883 
2893 int rte_eth_dev_set_link_down(uint16_t port_id);
2894 
2905 int rte_eth_dev_close(uint16_t port_id);
2906 
2944 int rte_eth_dev_reset(uint16_t port_id);
2945 
2957 int rte_eth_promiscuous_enable(uint16_t port_id);
2958 
2970 int rte_eth_promiscuous_disable(uint16_t port_id);
2971 
2982 int rte_eth_promiscuous_get(uint16_t port_id);
2983 
2995 int rte_eth_allmulticast_enable(uint16_t port_id);
2996 
3008 int rte_eth_allmulticast_disable(uint16_t port_id);
3009 
3020 int rte_eth_allmulticast_get(uint16_t port_id);
3021 
3039 int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link);
3040 
3055 int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link);
3056 
3070 __rte_experimental
3071 const char *rte_eth_link_speed_to_str(uint32_t link_speed);
3072 
3091 __rte_experimental
3092 int rte_eth_link_to_str(char *str, size_t len,
3093  const struct rte_eth_link *eth_link);
3094 
3112 int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats);
3113 
3125 int rte_eth_stats_reset(uint16_t port_id);
3126 
3156 int rte_eth_xstats_get_names(uint16_t port_id,
3157  struct rte_eth_xstat_name *xstats_names,
3158  unsigned int size);
3159 
3189 int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3190  unsigned int n);
3191 
3216 int
3217 rte_eth_xstats_get_names_by_id(uint16_t port_id,
3218  struct rte_eth_xstat_name *xstats_names, unsigned int size,
3219  uint64_t *ids);
3220 
3245 int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3246  uint64_t *values, unsigned int size);
3247 
3267 int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
3268  uint64_t *id);
3269 
3282 int rte_eth_xstats_reset(uint16_t port_id);
3283 
3302 int rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id,
3303  uint16_t tx_queue_id, uint8_t stat_idx);
3304 
3323 int rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id,
3324  uint16_t rx_queue_id,
3325  uint8_t stat_idx);
3326 
3340 int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr);
3341 
3362 __rte_experimental
3363 int rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,
3364  unsigned int num);
3365 
3409 int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info);
3410 
3426 __rte_experimental
3427 int rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf);
3428 
3449 int rte_eth_dev_fw_version_get(uint16_t port_id,
3450  char *fw_version, size_t fw_size);
3451 
3491 int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3492  uint32_t *ptypes, int num);
3523 int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3524  uint32_t *set_ptypes, unsigned int num);
3525 
3538 int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu);
3539 
3557 int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu);
3558 
3578 int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on);
3579 
3598 int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3599  int on);
3600 
3617 int rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3618  enum rte_vlan_type vlan_type,
3619  uint16_t tag_type);
3620 
3638 int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask);
3639 
3653 int rte_eth_dev_get_vlan_offload(uint16_t port_id);
3654 
3669 int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on);
3670 
3671 typedef void (*buffer_tx_error_fn)(struct rte_mbuf **unsent, uint16_t count,
3672  void *userdata);
3673 
3678 struct rte_eth_dev_tx_buffer {
3679  buffer_tx_error_fn error_callback;
3680  void *error_userdata;
3681  uint16_t size;
3682  uint16_t length;
3684  struct rte_mbuf *pkts[];
3685 };
3686 
3693 #define RTE_ETH_TX_BUFFER_SIZE(sz) \
3694  (sizeof(struct rte_eth_dev_tx_buffer) + (sz) * sizeof(struct rte_mbuf *))
3695 
3706 int
3707 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size);
3708 
3733 int
3734 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
3735  buffer_tx_error_fn callback, void *userdata);
3736 
3759 void
3760 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
3761  void *userdata);
3762 
3786 void
3787 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
3788  void *userdata);
3789 
3815 int
3816 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt);
3817 
3822 enum rte_eth_event_ipsec_subtype {
3824  RTE_ETH_EVENT_IPSEC_UNKNOWN = 0,
3826  RTE_ETH_EVENT_IPSEC_ESN_OVERFLOW,
3828  RTE_ETH_EVENT_IPSEC_SA_TIME_EXPIRY,
3830  RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY,
3832  RTE_ETH_EVENT_IPSEC_MAX
3833 };
3834 
3839 struct rte_eth_event_ipsec_desc {
3841  enum rte_eth_event_ipsec_subtype subtype;
3856  uint64_t metadata;
3857 };
3858 
3862 enum rte_eth_event_type {
3863  RTE_ETH_EVENT_UNKNOWN,
3864  RTE_ETH_EVENT_INTR_LSC,
3866  RTE_ETH_EVENT_QUEUE_STATE,
3868  RTE_ETH_EVENT_INTR_RESET,
3869  RTE_ETH_EVENT_VF_MBOX,
3870  RTE_ETH_EVENT_MACSEC,
3871  RTE_ETH_EVENT_INTR_RMV,
3872  RTE_ETH_EVENT_NEW,
3873  RTE_ETH_EVENT_DESTROY,
3874  RTE_ETH_EVENT_IPSEC,
3875  RTE_ETH_EVENT_FLOW_AGED,
3876  RTE_ETH_EVENT_MAX
3877 };
3878 
3880 typedef int (*rte_eth_dev_cb_fn)(uint16_t port_id,
3881  enum rte_eth_event_type event, void *cb_arg, void *ret_param);
3882 
3900 int rte_eth_dev_callback_register(uint16_t port_id,
3901  enum rte_eth_event_type event,
3902  rte_eth_dev_cb_fn cb_fn, void *cb_arg);
3903 
3922 int rte_eth_dev_callback_unregister(uint16_t port_id,
3923  enum rte_eth_event_type event,
3924  rte_eth_dev_cb_fn cb_fn, void *cb_arg);
3925 
3947 int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id);
3948 
3969 int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id);
3970 
3988 int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data);
3989 
4011 int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4012  int epfd, int op, void *data);
4013 
4028 int
4029 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id);
4030 
4044 int rte_eth_led_on(uint16_t port_id);
4045 
4059 int rte_eth_led_off(uint16_t port_id);
4060 
4089 __rte_experimental
4090 int rte_eth_fec_get_capability(uint16_t port_id,
4091  struct rte_eth_fec_capa *speed_fec_capa,
4092  unsigned int num);
4093 
4117 __rte_experimental
4118 int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa);
4119 
4140 __rte_experimental
4141 int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa);
4142 
4157 int rte_eth_dev_flow_ctrl_get(uint16_t port_id,
4158  struct rte_eth_fc_conf *fc_conf);
4159 
4174 int rte_eth_dev_flow_ctrl_set(uint16_t port_id,
4175  struct rte_eth_fc_conf *fc_conf);
4176 
4192 int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
4193  struct rte_eth_pfc_conf *pfc_conf);
4194 
4213 int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr,
4214  uint32_t pool);
4215 
4233 __rte_experimental
4234 int rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id,
4235  struct rte_eth_pfc_queue_info *pfc_queue_info);
4236 
4260 __rte_experimental
4261 int rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id,
4262  struct rte_eth_pfc_queue_conf *pfc_queue_conf);
4263 
4278 int rte_eth_dev_mac_addr_remove(uint16_t port_id,
4279  struct rte_ether_addr *mac_addr);
4280 
4294 int rte_eth_dev_default_mac_addr_set(uint16_t port_id,
4295  struct rte_ether_addr *mac_addr);
4296 
4314 int rte_eth_dev_rss_reta_update(uint16_t port_id,
4315  struct rte_eth_rss_reta_entry64 *reta_conf,
4316  uint16_t reta_size);
4317 
4336 int rte_eth_dev_rss_reta_query(uint16_t port_id,
4337  struct rte_eth_rss_reta_entry64 *reta_conf,
4338  uint16_t reta_size);
4339 
4359 int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4360  uint8_t on);
4361 
4380 int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on);
4381 
4398 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4399  uint16_t tx_rate);
4400 
4415 int rte_eth_dev_rss_hash_update(uint16_t port_id,
4416  struct rte_eth_rss_conf *rss_conf);
4417 
4433 int
4434 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4435  struct rte_eth_rss_conf *rss_conf);
4436 
4461 int
4462 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4463  struct rte_eth_udp_tunnel *tunnel_udp);
4464 
4484 int
4485 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4486  struct rte_eth_udp_tunnel *tunnel_udp);
4487 
4502 int rte_eth_dev_get_dcb_info(uint16_t port_id,
4503  struct rte_eth_dcb_info *dcb_info);
4504 
4505 struct rte_eth_rxtx_callback;
4506 
4532 const struct rte_eth_rxtx_callback *
4533 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4534  rte_rx_callback_fn fn, void *user_param);
4535 
4562 const struct rte_eth_rxtx_callback *
4563 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4564  rte_rx_callback_fn fn, void *user_param);
4565 
4591 const struct rte_eth_rxtx_callback *
4592 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4593  rte_tx_callback_fn fn, void *user_param);
4594 
4628 int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4629  const struct rte_eth_rxtx_callback *user_cb);
4630 
4664 int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4665  const struct rte_eth_rxtx_callback *user_cb);
4666 
4686 int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4687  struct rte_eth_rxq_info *qinfo);
4688 
4708 int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4709  struct rte_eth_txq_info *qinfo);
4710 
4729 int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4730  struct rte_eth_burst_mode *mode);
4731 
4750 int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4751  struct rte_eth_burst_mode *mode);
4752 
4773 __rte_experimental
4774 int rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
4775  struct rte_power_monitor_cond *pmc);
4776 
4795 int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info);
4796 
4809 int rte_eth_dev_get_eeprom_length(uint16_t port_id);
4810 
4827 int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info);
4828 
4845 int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info);
4846 
4865 __rte_experimental
4866 int
4867 rte_eth_dev_get_module_info(uint16_t port_id,
4868  struct rte_eth_dev_module_info *modinfo);
4869 
4889 __rte_experimental
4890 int
4891 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4892  struct rte_dev_eeprom_info *info);
4893 
4913 int rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4914  struct rte_ether_addr *mc_addr_set,
4915  uint32_t nb_mc_addr);
4916 
4929 int rte_eth_timesync_enable(uint16_t port_id);
4930 
4943 int rte_eth_timesync_disable(uint16_t port_id);
4944 
4963 int rte_eth_timesync_read_rx_timestamp(uint16_t port_id,
4964  struct timespec *timestamp, uint32_t flags);
4965 
4981 int rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4982  struct timespec *timestamp);
4983 
5001 int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta);
5002 
5018 int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time);
5019 
5038 int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time);
5039 
5085 __rte_experimental
5086 int
5087 rte_eth_read_clock(uint16_t port_id, uint64_t *clock);
5088 
5104 int
5105 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id);
5106 
5122 int
5123 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name);
5124 
5141 int rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5142  uint16_t *nb_rx_desc,
5143  uint16_t *nb_tx_desc);
5144 
5159 int
5160 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool);
5161 
5171 void *
5172 rte_eth_dev_get_sec_ctx(uint16_t port_id);
5173 
5189 __rte_experimental
5190 int rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5191  struct rte_eth_hairpin_cap *cap);
5192 
5199 struct rte_eth_representor_range {
5200  enum rte_eth_representor_type type;
5201  int controller;
5202  int pf;
5203  __extension__
5204  union {
5205  int vf;
5206  int sf;
5207  };
5208  uint32_t id_base;
5209  uint32_t id_end;
5210  char name[RTE_DEV_NAME_MAX_LEN];
5211 };
5212 
5219 struct rte_eth_representor_info {
5220  uint16_t controller;
5221  uint16_t pf;
5222  uint32_t nb_ranges_alloc;
5223  uint32_t nb_ranges;
5224  struct rte_eth_representor_range ranges[];
5225 };
5226 
5250 __rte_experimental
5251 int rte_eth_representor_info_get(uint16_t port_id,
5252  struct rte_eth_representor_info *info);
5253 
5255 #define RTE_ETH_RX_METADATA_USER_FLAG RTE_BIT64(0)
5256 
5258 #define RTE_ETH_RX_METADATA_USER_MARK RTE_BIT64(1)
5259 
5261 #define RTE_ETH_RX_METADATA_TUNNEL_ID RTE_BIT64(2)
5262 
5305 __rte_experimental
5306 int rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features);
5307 
5309 #define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0))
5310 
5311 #define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1))
5312 
5321 struct rte_eth_ip_reassembly_params {
5323  uint32_t timeout_ms;
5325  uint16_t max_frags;
5330  uint16_t flags;
5331 };
5332 
5353 __rte_experimental
5354 int rte_eth_ip_reassembly_capability_get(uint16_t port_id,
5355  struct rte_eth_ip_reassembly_params *capa);
5356 
5378 __rte_experimental
5379 int rte_eth_ip_reassembly_conf_get(uint16_t port_id,
5380  struct rte_eth_ip_reassembly_params *conf);
5381 
5411 __rte_experimental
5412 int rte_eth_ip_reassembly_conf_set(uint16_t port_id,
5413  const struct rte_eth_ip_reassembly_params *conf);
5414 
5422 typedef struct {
5427  struct rte_mbuf *next_frag;
5429  uint16_t time_spent;
5431  uint16_t nb_frags;
5432 } rte_eth_ip_reassembly_dynfield_t;
5433 
5452 __rte_experimental
5453 int rte_eth_dev_priv_dump(uint16_t port_id, FILE *file);
5454 
5455 #include <rte_ethdev_core.h>
5456 
5480 uint16_t rte_eth_call_rx_callbacks(uint16_t port_id, uint16_t queue_id,
5481  struct rte_mbuf **rx_pkts, uint16_t nb_rx, uint16_t nb_pkts,
5482  void *opaque);
5483 
5571 static inline uint16_t
5572 rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,
5573  struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
5574 {
5575  uint16_t nb_rx;
5576  struct rte_eth_fp_ops *p;
5577  void *qd;
5578 
5579 #ifdef RTE_ETHDEV_DEBUG_RX
5580  if (port_id >= RTE_MAX_ETHPORTS ||
5581  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5582  RTE_ETHDEV_LOG(ERR,
5583  "Invalid port_id=%u or queue_id=%u\n",
5584  port_id, queue_id);
5585  return 0;
5586  }
5587 #endif
5588 
5589  /* fetch pointer to queue data */
5590  p = &rte_eth_fp_ops[port_id];
5591  qd = p->rxq.data[queue_id];
5592 
5593 #ifdef RTE_ETHDEV_DEBUG_RX
5594  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
5595 
5596  if (qd == NULL) {
5597  RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u for port_id=%u\n",
5598  queue_id, port_id);
5599  return 0;
5600  }
5601 #endif
5602 
5603  nb_rx = p->rx_pkt_burst(qd, rx_pkts, nb_pkts);
5604 
5605 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
5606  {
5607  void *cb;
5608 
5609  /* __ATOMIC_RELEASE memory order was used when the
5610  * call back was inserted into the list.
5611  * Since there is a clear dependency between loading
5612  * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
5613  * not required.
5614  */
5615  cb = __atomic_load_n((void **)&p->rxq.clbk[queue_id],
5616  __ATOMIC_RELAXED);
5617  if (unlikely(cb != NULL))
5618  nb_rx = rte_eth_call_rx_callbacks(port_id, queue_id,
5619  rx_pkts, nb_rx, nb_pkts, cb);
5620  }
5621 #endif
5622 
5623  rte_ethdev_trace_rx_burst(port_id, queue_id, (void **)rx_pkts, nb_rx);
5624  return nb_rx;
5625 }
5626 
5640 static inline int
5641 rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
5642 {
5643  struct rte_eth_fp_ops *p;
5644  void *qd;
5645 
5646  if (port_id >= RTE_MAX_ETHPORTS ||
5647  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5648  RTE_ETHDEV_LOG(ERR,
5649  "Invalid port_id=%u or queue_id=%u\n",
5650  port_id, queue_id);
5651  return -EINVAL;
5652  }
5653 
5654  /* fetch pointer to queue data */
5655  p = &rte_eth_fp_ops[port_id];
5656  qd = p->rxq.data[queue_id];
5657 
5658  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5659  RTE_FUNC_PTR_OR_ERR_RET(*p->rx_queue_count, -ENOTSUP);
5660  if (qd == NULL)
5661  return -EINVAL;
5662 
5663  return (int)(*p->rx_queue_count)(qd);
5664 }
5665 
5669 #define RTE_ETH_RX_DESC_AVAIL 0
5670 #define RTE_ETH_RX_DESC_DONE 1
5671 #define RTE_ETH_RX_DESC_UNAVAIL 2
5707 static inline int
5708 rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id,
5709  uint16_t offset)
5710 {
5711  struct rte_eth_fp_ops *p;
5712  void *qd;
5713 
5714 #ifdef RTE_ETHDEV_DEBUG_RX
5715  if (port_id >= RTE_MAX_ETHPORTS ||
5716  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5717  RTE_ETHDEV_LOG(ERR,
5718  "Invalid port_id=%u or queue_id=%u\n",
5719  port_id, queue_id);
5720  return -EINVAL;
5721  }
5722 #endif
5723 
5724  /* fetch pointer to queue data */
5725  p = &rte_eth_fp_ops[port_id];
5726  qd = p->rxq.data[queue_id];
5727 
5728 #ifdef RTE_ETHDEV_DEBUG_RX
5729  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5730  if (qd == NULL)
5731  return -ENODEV;
5732 #endif
5733  RTE_FUNC_PTR_OR_ERR_RET(*p->rx_descriptor_status, -ENOTSUP);
5734  return (*p->rx_descriptor_status)(qd, offset);
5735 }
5736 
5740 #define RTE_ETH_TX_DESC_FULL 0
5741 #define RTE_ETH_TX_DESC_DONE 1
5742 #define RTE_ETH_TX_DESC_UNAVAIL 2
5778 static inline int rte_eth_tx_descriptor_status(uint16_t port_id,
5779  uint16_t queue_id, uint16_t offset)
5780 {
5781  struct rte_eth_fp_ops *p;
5782  void *qd;
5783 
5784 #ifdef RTE_ETHDEV_DEBUG_TX
5785  if (port_id >= RTE_MAX_ETHPORTS ||
5786  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5787  RTE_ETHDEV_LOG(ERR,
5788  "Invalid port_id=%u or queue_id=%u\n",
5789  port_id, queue_id);
5790  return -EINVAL;
5791  }
5792 #endif
5793 
5794  /* fetch pointer to queue data */
5795  p = &rte_eth_fp_ops[port_id];
5796  qd = p->txq.data[queue_id];
5797 
5798 #ifdef RTE_ETHDEV_DEBUG_TX
5799  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5800  if (qd == NULL)
5801  return -ENODEV;
5802 #endif
5803  RTE_FUNC_PTR_OR_ERR_RET(*p->tx_descriptor_status, -ENOTSUP);
5804  return (*p->tx_descriptor_status)(qd, offset);
5805 }
5806 
5826 uint16_t rte_eth_call_tx_callbacks(uint16_t port_id, uint16_t queue_id,
5827  struct rte_mbuf **tx_pkts, uint16_t nb_pkts, void *opaque);
5828 
5895 static inline uint16_t
5896 rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id,
5897  struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
5898 {
5899  struct rte_eth_fp_ops *p;
5900  void *qd;
5901 
5902 #ifdef RTE_ETHDEV_DEBUG_TX
5903  if (port_id >= RTE_MAX_ETHPORTS ||
5904  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5905  RTE_ETHDEV_LOG(ERR,
5906  "Invalid port_id=%u or queue_id=%u\n",
5907  port_id, queue_id);
5908  return 0;
5909  }
5910 #endif
5911 
5912  /* fetch pointer to queue data */
5913  p = &rte_eth_fp_ops[port_id];
5914  qd = p->txq.data[queue_id];
5915 
5916 #ifdef RTE_ETHDEV_DEBUG_TX
5917  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
5918 
5919  if (qd == NULL) {
5920  RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u for port_id=%u\n",
5921  queue_id, port_id);
5922  return 0;
5923  }
5924 #endif
5925 
5926 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
5927  {
5928  void *cb;
5929 
5930  /* __ATOMIC_RELEASE memory order was used when the
5931  * call back was inserted into the list.
5932  * Since there is a clear dependency between loading
5933  * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
5934  * not required.
5935  */
5936  cb = __atomic_load_n((void **)&p->txq.clbk[queue_id],
5937  __ATOMIC_RELAXED);
5938  if (unlikely(cb != NULL))
5939  nb_pkts = rte_eth_call_tx_callbacks(port_id, queue_id,
5940  tx_pkts, nb_pkts, cb);
5941  }
5942 #endif
5943 
5944  nb_pkts = p->tx_pkt_burst(qd, tx_pkts, nb_pkts);
5945 
5946  rte_ethdev_trace_tx_burst(port_id, queue_id, (void **)tx_pkts, nb_pkts);
5947  return nb_pkts;
5948 }
5949 
6004 #ifndef RTE_ETHDEV_TX_PREPARE_NOOP
6005 
6006 static inline uint16_t
6007 rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id,
6008  struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6009 {
6010  struct rte_eth_fp_ops *p;
6011  void *qd;
6012 
6013 #ifdef RTE_ETHDEV_DEBUG_TX
6014  if (port_id >= RTE_MAX_ETHPORTS ||
6015  queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6016  RTE_ETHDEV_LOG(ERR,
6017  "Invalid port_id=%u or queue_id=%u\n",
6018  port_id, queue_id);
6019  rte_errno = ENODEV;
6020  return 0;
6021  }
6022 #endif
6023 
6024  /* fetch pointer to queue data */
6025  p = &rte_eth_fp_ops[port_id];
6026  qd = p->txq.data[queue_id];
6027 
6028 #ifdef RTE_ETHDEV_DEBUG_TX
6029  if (!rte_eth_dev_is_valid_port(port_id)) {
6030  RTE_ETHDEV_LOG(ERR, "Invalid Tx port_id=%u\n", port_id);
6031  rte_errno = ENODEV;
6032  return 0;
6033  }
6034  if (qd == NULL) {
6035  RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u for port_id=%u\n",
6036  queue_id, port_id);
6037  rte_errno = EINVAL;
6038  return 0;
6039  }
6040 #endif
6041 
6042  if (!p->tx_pkt_prepare)
6043  return nb_pkts;
6044 
6045  return p->tx_pkt_prepare(qd, tx_pkts, nb_pkts);
6046 }
6047 
6048 #else
6049 
6050 /*
6051  * Native NOOP operation for compilation targets which doesn't require any
6052  * preparations steps, and functional NOOP may introduce unnecessary performance
6053  * drop.
6054  *
6055  * Generally this is not a good idea to turn it on globally and didn't should
6056  * be used if behavior of tx_preparation can change.
6057  */
6058 
6059 static inline uint16_t
6060 rte_eth_tx_prepare(__rte_unused uint16_t port_id,
6061  __rte_unused uint16_t queue_id,
6062  __rte_unused struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6063 {
6064  return nb_pkts;
6065 }
6066 
6067 #endif
6068 
6091 static inline uint16_t
6092 rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id,
6093  struct rte_eth_dev_tx_buffer *buffer)
6094 {
6095  uint16_t sent;
6096  uint16_t to_send = buffer->length;
6097 
6098  if (to_send == 0)
6099  return 0;
6100 
6101  sent = rte_eth_tx_burst(port_id, queue_id, buffer->pkts, to_send);
6102 
6103  buffer->length = 0;
6104 
6105  /* All packets sent, or to be dealt with by callback below */
6106  if (unlikely(sent != to_send))
6107  buffer->error_callback(&buffer->pkts[sent],
6108  (uint16_t)(to_send - sent),
6109  buffer->error_userdata);
6110 
6111  return sent;
6112 }
6113 
6144 static __rte_always_inline uint16_t
6145 rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id,
6146  struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
6147 {
6148  buffer->pkts[buffer->length++] = tx_pkt;
6149  if (buffer->length < buffer->size)
6150  return 0;
6151 
6152  return rte_eth_tx_buffer_flush(port_id, queue_id, buffer);
6153 }
6154 
6155 #ifdef __cplusplus
6156 }
6157 #endif
6158 
6159 #endif /* _RTE_ETHDEV_H_ */
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Definition: rte_ethdev.h:1899
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Definition: rte_ethdev.h:367
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__rte_experimental int rte_eth_representor_info_get(uint16_t port_id, struct rte_eth_representor_info *info)
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__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id, struct rte_eth_pfc_queue_conf *pfc_queue_conf)
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__rte_experimental int rte_eth_fec_get_capability(uint16_t port_id, struct rte_eth_fec_capa *speed_fec_capa, unsigned int num)
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Definition: rte_ethdev.h:426
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__rte_experimental int rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id, struct rte_power_monitor_cond *pmc)
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Definition: rte_ethdev.h:1516
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__rte_experimental int rte_eth_dev_get_module_info(uint16_t port_id, struct rte_eth_dev_module_info *modinfo)
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Definition: rte_ethdev.h:1835
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Definition: rte_ethdev.h:3864
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__rte_experimental int rte_eth_ip_reassembly_capability_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *capa)
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Definition: rte_ethdev.h:1502
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Definition: rte_ethdev.h:1894
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__rte_experimental int rte_eth_ip_reassembly_conf_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *conf)
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Definition: rte_ethdev.h:3872
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Definition: rte_ethdev.h:1054
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Definition: rte_ethdev.h:1214
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__rte_experimental int rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
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Definition: rte_ethdev.h:1127
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__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id, struct rte_eth_pfc_queue_info *pfc_queue_info)
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Definition: rte_ethdev.h:1338
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Definition: rte_dev.h:231
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Definition: rte_ethdev.h:408
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__rte_experimental int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports, size_t len, uint32_t direction)
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Definition: rte_ethdev.h:951
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__rte_experimental int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
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Definition: rte_ethdev.h:262
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Definition: rte_ethdev.h:1874
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Definition: rte_ethdev.h:421
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Definition: rte_ethdev.h:6145
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Definition: rte_ethdev.h:1155
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Definition: rte_ethdev.h:397
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Definition: rte_ethdev.h:419
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__rte_experimental const char * rte_eth_link_speed_to_str(uint32_t link_speed)
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__rte_experimental int rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
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Definition: rte_ethdev.h:1379
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Definition: rte_ethdev.h:1859
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Definition: rte_ethdev.h:1559
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Definition: rte_ethdev.h:5641
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int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_rxq_info *qinfo)
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Definition: rte_ethdev.h:5202
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__extension__ struct rte_eth_link __rte_aligned(8)
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Definition: rte_dev_info.h:38
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int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
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Definition: rte_ethdev.h:1900
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int rte_eth_dev_set_vlan_ether_type(uint16_t port_id, enum rte_vlan_type vlan_type, uint16_t tag_type)
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Definition: rte_ethdev.h:1205
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Definition: rte_ethdev.h:5429
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Definition: rte_ethdev.h:493
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Definition: rte_ethdev.h:3870
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int rte_eth_xstats_get_names_by_id(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size, uint64_t *ids)
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Definition: rte_ethdev.h:1470
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__rte_experimental const char * rte_eth_dev_capability_name(uint64_t capability)
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Definition: rte_ether.h:60
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__rte_experimental int rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, const struct rte_eth_hairpin_conf *conf)
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Definition: rte_ethdev.h:1980
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static uint64_t rte_eth_rss_hf_refine(uint64_t rss_hf)
Definition: rte_ethdev.h:739
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__rte_experimental int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
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__rte_experimental int rte_eth_ip_reassembly_conf_set(uint16_t port_id, const struct rte_eth_ip_reassembly_params *conf)
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Definition: rte_ethdev.h:458
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Definition: rte_ethdev.h:1052
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__rte_experimental int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
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int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id, const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mb_pool)
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