DPDK 21.11.9
rte_dmadev.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2021 HiSilicon Limited
3 * Copyright(c) 2021 Intel Corporation
4 * Copyright(c) 2021 Marvell International Ltd
5 * Copyright(c) 2021 SmartShare Systems
6 */
7
8#ifndef RTE_DMADEV_H
9#define RTE_DMADEV_H
10
147#include <stdint.h>
148
149#include <rte_bitops.h>
150#include <rte_common.h>
151#include <rte_compat.h>
152#include <rte_dev.h>
153
154#ifdef __cplusplus
155extern "C" {
156#endif
157
159#define RTE_DMADEV_DEFAULT_MAX 64
160
176__rte_experimental
177int rte_dma_dev_max(size_t dev_max);
178
192__rte_experimental
193int rte_dma_get_dev_id_by_name(const char *name);
194
207__rte_experimental
208bool rte_dma_is_valid(int16_t dev_id);
209
220__rte_experimental
221uint16_t rte_dma_count_avail(void);
222
231__rte_experimental
232int16_t rte_dma_next_dev(int16_t start_dev_id);
233
235#define RTE_DMA_FOREACH_DEV(p) \
236 for (p = rte_dma_next_dev(0); \
237 p != -1; \
238 p = rte_dma_next_dev(p + 1))
239
240
245#define RTE_DMA_CAPA_MEM_TO_MEM RTE_BIT64(0)
247#define RTE_DMA_CAPA_MEM_TO_DEV RTE_BIT64(1)
249#define RTE_DMA_CAPA_DEV_TO_MEM RTE_BIT64(2)
251#define RTE_DMA_CAPA_DEV_TO_DEV RTE_BIT64(3)
258#define RTE_DMA_CAPA_SVA RTE_BIT64(4)
264#define RTE_DMA_CAPA_SILENT RTE_BIT64(5)
272#define RTE_DMA_CAPA_HANDLES_ERRORS RTE_BIT64(6)
277#define RTE_DMA_CAPA_OPS_COPY RTE_BIT64(32)
279#define RTE_DMA_CAPA_OPS_COPY_SG RTE_BIT64(33)
281#define RTE_DMA_CAPA_OPS_FILL RTE_BIT64(34)
290 const char *dev_name;
292 uint64_t dev_capa;
294 uint16_t max_vchans;
296 uint16_t max_desc;
298 uint16_t min_desc;
306 uint16_t max_sges;
308 int16_t numa_node;
310 uint16_t nb_vchans;
311};
312
328__rte_experimental
329int rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info);
330
341 uint16_t nb_vchans;
350};
351
371__rte_experimental
372int rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf);
373
389__rte_experimental
390int rte_dma_start(int16_t dev_id);
391
406__rte_experimental
407int rte_dma_stop(int16_t dev_id);
408
423__rte_experimental
424int rte_dma_close(int16_t dev_id);
425
464};
465
472 RTE_DMA_PORT_NONE,
474};
475
489 union {
538 __extension__
539 struct {
540 uint64_t coreid : 4;
541 uint64_t pfid : 8;
542 uint64_t vfen : 1;
543 uint64_t vfid : 16;
545 uint64_t pasid : 20;
547 uint64_t attr : 3;
549 uint64_t ph : 2;
551 uint64_t st : 16;
553 };
554 uint64_t reserved[2];
555};
556
569 uint16_t nb_desc;
586};
587
606__rte_experimental
607int rte_dma_vchan_setup(int16_t dev_id, uint16_t vchan,
608 const struct rte_dma_vchan_conf *conf);
609
617 uint64_t submitted;
621 uint64_t completed;
623 uint64_t errors;
624};
625
632#define RTE_DMA_ALL_VCHAN 0xFFFFu
633
652__rte_experimental
653int rte_dma_stats_get(int16_t dev_id, uint16_t vchan,
654 struct rte_dma_stats *stats);
655
671__rte_experimental
672int rte_dma_stats_reset(int16_t dev_id, uint16_t vchan);
673
684};
685
704__rte_experimental
705int
706rte_dma_vchan_status(int16_t dev_id, uint16_t vchan, enum rte_dma_vchan_status *status);
707
722__rte_experimental
723int rte_dma_dump(int16_t dev_id, FILE *f);
724
787};
788
796 uint32_t length;
797};
798
799#include "rte_dmadev_core.h"
800
812#define RTE_DMA_OP_FLAG_FENCE RTE_BIT64(0)
817#define RTE_DMA_OP_FLAG_SUBMIT RTE_BIT64(1)
822#define RTE_DMA_OP_FLAG_LLC RTE_BIT64(2)
854__rte_experimental
855static inline int
856rte_dma_copy(int16_t dev_id, uint16_t vchan, rte_iova_t src, rte_iova_t dst,
857 uint32_t length, uint64_t flags)
858{
859 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
860
861#ifdef RTE_DMADEV_DEBUG
862 if (!rte_dma_is_valid(dev_id) || length == 0)
863 return -EINVAL;
864 RTE_FUNC_PTR_OR_ERR_RET(*obj->copy, -ENOTSUP);
865#endif
866
867 return (*obj->copy)(obj->dev_private, vchan, src, dst, length, flags);
868}
869
903__rte_experimental
904static inline int
905rte_dma_copy_sg(int16_t dev_id, uint16_t vchan, struct rte_dma_sge *src,
906 struct rte_dma_sge *dst, uint16_t nb_src, uint16_t nb_dst,
907 uint64_t flags)
908{
909 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
910
911#ifdef RTE_DMADEV_DEBUG
912 if (!rte_dma_is_valid(dev_id) || src == NULL || dst == NULL ||
913 nb_src == 0 || nb_dst == 0)
914 return -EINVAL;
915 RTE_FUNC_PTR_OR_ERR_RET(*obj->copy_sg, -ENOTSUP);
916#endif
917
918 return (*obj->copy_sg)(obj->dev_private, vchan, src, dst, nb_src,
919 nb_dst, flags);
920}
921
951__rte_experimental
952static inline int
953rte_dma_fill(int16_t dev_id, uint16_t vchan, uint64_t pattern,
954 rte_iova_t dst, uint32_t length, uint64_t flags)
955{
956 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
957
958#ifdef RTE_DMADEV_DEBUG
959 if (!rte_dma_is_valid(dev_id) || length == 0)
960 return -EINVAL;
961 RTE_FUNC_PTR_OR_ERR_RET(*obj->fill, -ENOTSUP);
962#endif
963
964 return (*obj->fill)(obj->dev_private, vchan, pattern, dst, length,
965 flags);
966}
967
985__rte_experimental
986static inline int
987rte_dma_submit(int16_t dev_id, uint16_t vchan)
988{
989 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
990
991#ifdef RTE_DMADEV_DEBUG
992 if (!rte_dma_is_valid(dev_id))
993 return -EINVAL;
994 RTE_FUNC_PTR_OR_ERR_RET(*obj->submit, -ENOTSUP);
995#endif
996
997 return (*obj->submit)(obj->dev_private, vchan);
998}
999
1023__rte_experimental
1024static inline uint16_t
1025rte_dma_completed(int16_t dev_id, uint16_t vchan, const uint16_t nb_cpls,
1026 uint16_t *last_idx, bool *has_error)
1027{
1028 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
1029 uint16_t idx;
1030 bool err;
1031
1032#ifdef RTE_DMADEV_DEBUG
1033 if (!rte_dma_is_valid(dev_id) || nb_cpls == 0)
1034 return 0;
1035 RTE_FUNC_PTR_OR_ERR_RET(*obj->completed, 0);
1036#endif
1037
1038 /* Ensure the pointer values are non-null to simplify drivers.
1039 * In most cases these should be compile time evaluated, since this is
1040 * an inline function.
1041 * - If NULL is explicitly passed as parameter, then compiler knows the
1042 * value is NULL
1043 * - If address of local variable is passed as parameter, then compiler
1044 * can know it's non-NULL.
1045 */
1046 if (last_idx == NULL)
1047 last_idx = &idx;
1048 if (has_error == NULL)
1049 has_error = &err;
1050
1051 *has_error = false;
1052 return (*obj->completed)(obj->dev_private, vchan, nb_cpls, last_idx,
1053 has_error);
1054}
1055
1083__rte_experimental
1084static inline uint16_t
1085rte_dma_completed_status(int16_t dev_id, uint16_t vchan,
1086 const uint16_t nb_cpls, uint16_t *last_idx,
1087 enum rte_dma_status_code *status)
1088{
1089 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
1090 uint16_t idx;
1091
1092#ifdef RTE_DMADEV_DEBUG
1093 if (!rte_dma_is_valid(dev_id) || nb_cpls == 0 || status == NULL)
1094 return 0;
1095 RTE_FUNC_PTR_OR_ERR_RET(*obj->completed_status, 0);
1096#endif
1097
1098 if (last_idx == NULL)
1099 last_idx = &idx;
1100
1101 return (*obj->completed_status)(obj->dev_private, vchan, nb_cpls,
1102 last_idx, status);
1103}
1104
1120__rte_experimental
1121static inline uint16_t
1122rte_dma_burst_capacity(int16_t dev_id, uint16_t vchan)
1123{
1124 struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
1125
1126#ifdef RTE_DMADEV_DEBUG
1127 if (!rte_dma_is_valid(dev_id))
1128 return 0;
1129 RTE_FUNC_PTR_OR_ERR_RET(*obj->burst_capacity, 0);
1130#endif
1131 return (*obj->burst_capacity)(obj->dev_private, vchan);
1132}
1133
1134#ifdef __cplusplus
1135}
1136#endif
1137
1138#endif /* RTE_DMADEV_H */
uint64_t rte_iova_t
Definition: rte_common.h:438
#define RTE_STD_C11
Definition: rte_common.h:42
__rte_experimental int rte_dma_close(int16_t dev_id)
rte_dma_direction
Definition: rte_dmadev.h:431
@ RTE_DMA_DIR_MEM_TO_DEV
Definition: rte_dmadev.h:445
@ RTE_DMA_DIR_DEV_TO_MEM
Definition: rte_dmadev.h:454
@ RTE_DMA_DIR_MEM_TO_MEM
Definition: rte_dmadev.h:436
@ RTE_DMA_DIR_DEV_TO_DEV
Definition: rte_dmadev.h:463
static __rte_experimental uint16_t rte_dma_completed(int16_t dev_id, uint16_t vchan, const uint16_t nb_cpls, uint16_t *last_idx, bool *has_error)
Definition: rte_dmadev.h:1025
__rte_experimental int rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info)
static __rte_experimental int rte_dma_fill(int16_t dev_id, uint16_t vchan, uint64_t pattern, rte_iova_t dst, uint32_t length, uint64_t flags)
Definition: rte_dmadev.h:953
__rte_experimental uint16_t rte_dma_count_avail(void)
static __rte_experimental int rte_dma_copy(int16_t dev_id, uint16_t vchan, rte_iova_t src, rte_iova_t dst, uint32_t length, uint64_t flags)
Definition: rte_dmadev.h:856
static __rte_experimental uint16_t rte_dma_completed_status(int16_t dev_id, uint16_t vchan, const uint16_t nb_cpls, uint16_t *last_idx, enum rte_dma_status_code *status)
Definition: rte_dmadev.h:1085
__rte_experimental int rte_dma_stats_get(int16_t dev_id, uint16_t vchan, struct rte_dma_stats *stats)
__rte_experimental int rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
rte_dma_status_code
Definition: rte_dmadev.h:730
@ RTE_DMA_STATUS_DESCRIPTOR_READ_ERROR
Definition: rte_dmadev.h:775
@ RTE_DMA_STATUS_INVALID_DST_ADDR
Definition: rte_dmadev.h:751
@ RTE_DMA_STATUS_PAGE_FAULT
Definition: rte_dmadev.h:782
@ RTE_DMA_STATUS_INVALID_LENGTH
Definition: rte_dmadev.h:758
@ RTE_DMA_STATUS_NOT_ATTEMPTED
Definition: rte_dmadev.h:747
@ RTE_DMA_STATUS_BUS_READ_ERROR
Definition: rte_dmadev.h:765
@ RTE_DMA_STATUS_INVALID_ADDR
Definition: rte_dmadev.h:756
@ RTE_DMA_STATUS_ERROR_UNKNOWN
Definition: rte_dmadev.h:786
@ RTE_DMA_STATUS_BUS_ERROR
Definition: rte_dmadev.h:771
@ RTE_DMA_STATUS_BUS_WRITE_ERROR
Definition: rte_dmadev.h:767
@ RTE_DMA_STATUS_DATA_POISION
Definition: rte_dmadev.h:773
@ RTE_DMA_STATUS_INVALID_OPCODE
Definition: rte_dmadev.h:763
@ RTE_DMA_STATUS_INVALID_SRC_ADDR
Definition: rte_dmadev.h:749
@ RTE_DMA_STATUS_USER_ABORT
Definition: rte_dmadev.h:739
@ RTE_DMA_STATUS_DEV_LINK_ERROR
Definition: rte_dmadev.h:780
@ RTE_DMA_STATUS_SUCCESSFUL
Definition: rte_dmadev.h:732
__rte_experimental int16_t rte_dma_next_dev(int16_t start_dev_id)
static __rte_experimental int rte_dma_copy_sg(int16_t dev_id, uint16_t vchan, struct rte_dma_sge *src, struct rte_dma_sge *dst, uint16_t nb_src, uint16_t nb_dst, uint64_t flags)
Definition: rte_dmadev.h:905
__rte_experimental int rte_dma_dev_max(size_t dev_max)
__rte_experimental int rte_dma_stats_reset(int16_t dev_id, uint16_t vchan)
__rte_experimental int rte_dma_vchan_setup(int16_t dev_id, uint16_t vchan, const struct rte_dma_vchan_conf *conf)
static __rte_experimental int rte_dma_submit(int16_t dev_id, uint16_t vchan)
Definition: rte_dmadev.h:987
__rte_experimental int rte_dma_dump(int16_t dev_id, FILE *f)
__rte_experimental bool rte_dma_is_valid(int16_t dev_id)
__rte_experimental int rte_dma_start(int16_t dev_id)
__rte_experimental int rte_dma_get_dev_id_by_name(const char *name)
rte_dma_port_type
Definition: rte_dmadev.h:471
@ RTE_DMA_PORT_PCIE
Definition: rte_dmadev.h:473
__rte_experimental int rte_dma_stop(int16_t dev_id)
rte_dma_vchan_status
Definition: rte_dmadev.h:680
@ RTE_DMA_VCHAN_HALTED_ERROR
Definition: rte_dmadev.h:683
@ RTE_DMA_VCHAN_ACTIVE
Definition: rte_dmadev.h:682
@ RTE_DMA_VCHAN_IDLE
Definition: rte_dmadev.h:681
static __rte_experimental uint16_t rte_dma_burst_capacity(int16_t dev_id, uint16_t vchan)
Definition: rte_dmadev.h:1122
uint16_t nb_vchans
Definition: rte_dmadev.h:341
bool enable_silent
Definition: rte_dmadev.h:349
uint64_t dev_capa
Definition: rte_dmadev.h:292
uint16_t max_sges
Definition: rte_dmadev.h:306
uint16_t max_vchans
Definition: rte_dmadev.h:294
uint16_t max_desc
Definition: rte_dmadev.h:296
uint16_t min_desc
Definition: rte_dmadev.h:298
const char * dev_name
Definition: rte_dmadev.h:290
uint16_t nb_vchans
Definition: rte_dmadev.h:310
int16_t numa_node
Definition: rte_dmadev.h:308
enum rte_dma_port_type port_type
Definition: rte_dmadev.h:487
__extension__ struct rte_dma_port_param::@142::@144 pcie
uint64_t reserved[2]
Definition: rte_dmadev.h:554
rte_iova_t addr
Definition: rte_dmadev.h:795
uint32_t length
Definition: rte_dmadev.h:796
uint64_t submitted
Definition: rte_dmadev.h:617
uint64_t errors
Definition: rte_dmadev.h:623
uint64_t completed
Definition: rte_dmadev.h:621
enum rte_dma_direction direction
Definition: rte_dmadev.h:567
struct rte_dma_port_param src_port
Definition: rte_dmadev.h:577
struct rte_dma_port_param dst_port
Definition: rte_dmadev.h:585