DPDK  17.11.10
rte_memory.h
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33 
34 #ifndef _RTE_MEMORY_H_
35 #define _RTE_MEMORY_H_
36 
43 #include <stdint.h>
44 #include <stddef.h>
45 #include <stdio.h>
46 
47 #ifdef __cplusplus
48 extern "C" {
49 #endif
50 
51 #include <rte_common.h>
52 #include <rte_config.h>
53 
54 __extension__
55 enum rte_page_sizes {
56  RTE_PGSIZE_4K = 1ULL << 12,
57  RTE_PGSIZE_64K = 1ULL << 16,
58  RTE_PGSIZE_256K = 1ULL << 18,
59  RTE_PGSIZE_2M = 1ULL << 21,
60  RTE_PGSIZE_16M = 1ULL << 24,
61  RTE_PGSIZE_256M = 1ULL << 28,
62  RTE_PGSIZE_512M = 1ULL << 29,
63  RTE_PGSIZE_1G = 1ULL << 30,
64  RTE_PGSIZE_4G = 1ULL << 32,
65  RTE_PGSIZE_16G = 1ULL << 34,
66 };
67 
68 #define SOCKET_ID_ANY -1
69 #define RTE_CACHE_LINE_MASK (RTE_CACHE_LINE_SIZE-1)
71 #define RTE_CACHE_LINE_ROUNDUP(size) \
72  (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE))
73 
76 #if RTE_CACHE_LINE_SIZE == 64
77 #define RTE_CACHE_LINE_SIZE_LOG2 6
78 #elif RTE_CACHE_LINE_SIZE == 128
79 #define RTE_CACHE_LINE_SIZE_LOG2 7
80 #else
81 #error "Unsupported cache line size"
82 #endif
83 
84 #define RTE_CACHE_LINE_MIN_SIZE 64
89 #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
90 
94 #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
95 
96 typedef uint64_t phys_addr_t;
97 #define RTE_BAD_PHYS_ADDR ((phys_addr_t)-1)
98 
105 typedef uint64_t rte_iova_t;
106 #define RTE_BAD_IOVA ((rte_iova_t)-1)
111 struct rte_memseg {
113  union {
114  phys_addr_t phys_addr;
115  rte_iova_t iova;
116  };
118  union {
119  void *addr;
120  uint64_t addr_64;
121  };
122  size_t len;
123  uint64_t hugepage_sz;
124  int32_t socket_id;
125  uint32_t nchannel;
126  uint32_t nrank;
137 int rte_mem_lock_page(const void *virt);
138 
149 phys_addr_t rte_mem_virt2phy(const void *virt);
150 
159 rte_iova_t rte_mem_virt2iova(const void *virt);
160 
176 const struct rte_memseg *rte_eal_get_physmem_layout(void);
177 
184 void rte_dump_physmem_layout(FILE *f);
185 
192 uint64_t rte_eal_get_physmem_size(void);
193 
201 unsigned rte_memory_get_nchannel(void);
202 
210 unsigned rte_memory_get_nrank(void);
211 
212 /* check memsegs iovas are within a range based on dma mask */
213 int rte_eal_check_dma_mask(uint8_t maskbits);
214 
224 int rte_eal_using_phys_addrs(void);
225 
226 #ifdef __cplusplus
227 }
228 #endif
229 
230 #endif /* _RTE_MEMORY_H_ */
void * addr
Definition: rte_memory.h:121
unsigned rte_memory_get_nchannel(void)
const struct rte_memseg * rte_eal_get_physmem_layout(void)
rte_iova_t iova
Definition: rte_memory.h:117
uint32_t nchannel
Definition: rte_memory.h:127
int rte_eal_using_phys_addrs(void)
int rte_mem_lock_page(const void *virt)
unsigned rte_memory_get_nrank(void)
int32_t socket_id
Definition: rte_memory.h:126
uint64_t addr_64
Definition: rte_memory.h:122
size_t len
Definition: rte_memory.h:124
uint64_t hugepage_sz
Definition: rte_memory.h:125
phys_addr_t rte_mem_virt2phy(const void *virt)
#define __rte_packed
Definition: rte_common.h:95
uint64_t rte_eal_get_physmem_size(void)
phys_addr_t phys_addr
Definition: rte_memory.h:116
void rte_dump_physmem_layout(FILE *f)
#define RTE_STD_C11
Definition: rte_common.h:66
uint64_t rte_iova_t
Definition: rte_memory.h:107
uint64_t phys_addr_t
Definition: rte_memory.h:98
uint32_t nrank
Definition: rte_memory.h:128
rte_iova_t rte_mem_virt2iova(const void *virt)