DPDK  16.11.11
rte_eth_ctrl.h
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1 /*-
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33 
34 #ifndef _RTE_ETH_CTRL_H_
35 #define _RTE_ETH_CTRL_H_
36 
37 #include <stdint.h>
38 #include <rte_common.h>
39 #include "rte_ether.h"
40 
49 #ifdef __cplusplus
50 extern "C" {
51 #endif
52 
53 /*
54  * A packet can be identified by hardware as different flow types. Different
55  * NIC hardwares may support different flow types.
56  * Basically, the NIC hardware identifies the flow type as deep protocol as
57  * possible, and exclusively. For example, if a packet is identified as
58  * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
59  * though it is an actual IPV4 packet.
60  * Note that the flow types are used to define RSS offload types in
61  * rte_ethdev.h.
62  */
63 #define RTE_ETH_FLOW_UNKNOWN 0
64 #define RTE_ETH_FLOW_RAW 1
65 #define RTE_ETH_FLOW_IPV4 2
66 #define RTE_ETH_FLOW_FRAG_IPV4 3
67 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4
68 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5
69 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6
70 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7
71 #define RTE_ETH_FLOW_IPV6 8
72 #define RTE_ETH_FLOW_FRAG_IPV6 9
73 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10
74 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11
75 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12
76 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
77 #define RTE_ETH_FLOW_L2_PAYLOAD 14
78 #define RTE_ETH_FLOW_IPV6_EX 15
79 #define RTE_ETH_FLOW_IPV6_TCP_EX 16
80 #define RTE_ETH_FLOW_IPV6_UDP_EX 17
81 #define RTE_ETH_FLOW_PORT 18
82 
83 #define RTE_ETH_FLOW_VXLAN 19
84 #define RTE_ETH_FLOW_GENEVE 20
85 #define RTE_ETH_FLOW_NVGRE 21
86 #define RTE_ETH_FLOW_MAX 22
87 
92  RTE_ETH_FILTER_NONE = 0,
93  RTE_ETH_FILTER_MACVLAN,
94  RTE_ETH_FILTER_ETHERTYPE,
95  RTE_ETH_FILTER_FLEXIBLE,
96  RTE_ETH_FILTER_SYN,
97  RTE_ETH_FILTER_NTUPLE,
98  RTE_ETH_FILTER_TUNNEL,
99  RTE_ETH_FILTER_FDIR,
100  RTE_ETH_FILTER_HASH,
101  RTE_ETH_FILTER_L2_TUNNEL,
102  RTE_ETH_FILTER_MAX
103 };
104 
119  RTE_ETH_FILTER_OP_MAX
120 };
121 
131 };
132 
137  uint8_t is_vf;
138  uint16_t dst_id;
140  struct ether_addr mac_addr;
141 };
142 
147 #define RTE_ETHTYPE_FLAGS_MAC 0x0001
148 #define RTE_ETHTYPE_FLAGS_DROP 0x0002
155 struct rte_eth_ethertype_filter {
156  struct ether_addr mac_addr;
157  uint16_t ether_type;
158  uint16_t flags;
159  uint16_t queue;
160 };
161 
162 #define RTE_FLEX_FILTER_MAXLEN 128
163 #define RTE_FLEX_FILTER_MASK_SIZE \
164  (RTE_ALIGN(RTE_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT)
165 
173  uint16_t len;
177  uint8_t priority;
178  uint16_t queue;
179 };
180 
187  uint8_t hig_pri;
189  uint16_t queue;
190 };
191 
196 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001
197 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002
198 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004
199 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008
200 #define RTE_NTUPLE_FLAGS_PROTO 0x0010
201 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020
203 #define RTE_5TUPLE_FLAGS ( \
204  RTE_NTUPLE_FLAGS_DST_IP | \
205  RTE_NTUPLE_FLAGS_SRC_IP | \
206  RTE_NTUPLE_FLAGS_DST_PORT | \
207  RTE_NTUPLE_FLAGS_SRC_PORT | \
208  RTE_NTUPLE_FLAGS_PROTO)
209 
210 #define RTE_2TUPLE_FLAGS ( \
211  RTE_NTUPLE_FLAGS_DST_PORT | \
212  RTE_NTUPLE_FLAGS_PROTO)
213 
214 #define TCP_URG_FLAG 0x20
215 #define TCP_ACK_FLAG 0x10
216 #define TCP_PSH_FLAG 0x08
217 #define TCP_RST_FLAG 0x04
218 #define TCP_SYN_FLAG 0x02
219 #define TCP_FIN_FLAG 0x01
220 #define TCP_FLAG_ALL 0x3F
221 
228  uint16_t flags;
229  uint32_t dst_ip;
230  uint32_t dst_ip_mask;
231  uint32_t src_ip;
232  uint32_t src_ip_mask;
233  uint16_t dst_port;
234  uint16_t dst_port_mask;
235  uint16_t src_port;
236  uint16_t src_port_mask;
237  uint8_t proto;
238  uint8_t proto_mask;
242  uint8_t tcp_flags;
243  uint16_t priority;
245  uint16_t queue;
246 };
247 
252  RTE_TUNNEL_TYPE_NONE = 0,
253  RTE_TUNNEL_TYPE_VXLAN,
254  RTE_TUNNEL_TYPE_GENEVE,
255  RTE_TUNNEL_TYPE_TEREDO,
256  RTE_TUNNEL_TYPE_NVGRE,
257  RTE_TUNNEL_TYPE_IP_IN_GRE,
258  RTE_L2_TUNNEL_TYPE_E_TAG,
259  RTE_TUNNEL_TYPE_MAX,
260 };
261 
265 #define ETH_TUNNEL_FILTER_OMAC 0x01
266 #define ETH_TUNNEL_FILTER_OIP 0x02
267 #define ETH_TUNNEL_FILTER_TENID 0x04
268 #define ETH_TUNNEL_FILTER_IMAC 0x08
269 #define ETH_TUNNEL_FILTER_IVLAN 0x10
270 #define ETH_TUNNEL_FILTER_IIP 0x20
272 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \
273  ETH_TUNNEL_FILTER_IVLAN)
274 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \
275  ETH_TUNNEL_FILTER_IVLAN | \
276  ETH_TUNNEL_FILTER_TENID)
277 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \
278  ETH_TUNNEL_FILTER_TENID)
279 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \
280  ETH_TUNNEL_FILTER_TENID | \
281  ETH_TUNNEL_FILTER_IMAC)
282 
289 };
290 
297  uint16_t inner_vlan;
302  union {
303  uint32_t ipv4_addr;
304  uint32_t ipv6_addr[4];
305  } ip_addr;
307  uint16_t filter_type;
309  uint32_t tenant_id;
310  uint16_t queue_id;
311 };
312 
317  RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
318  RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
319  RTE_ETH_GLOBAL_CFG_TYPE_MAX,
320 };
321 
327  union {
328  uint8_t gre_key_len;
329  uint64_t reserved;
330  } cfg;
331 };
332 
333 #define RTE_ETH_FDIR_MAX_FLEXLEN 16
334 #define RTE_ETH_INSET_SIZE_MAX 128
339 enum rte_eth_input_set_field {
340  RTE_ETH_INPUT_SET_UNKNOWN = 0,
341 
342  /* L2 */
343  RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
344  RTE_ETH_INPUT_SET_L2_DST_MAC,
345  RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
346  RTE_ETH_INPUT_SET_L2_INNER_VLAN,
347  RTE_ETH_INPUT_SET_L2_ETHERTYPE,
348 
349  /* L3 */
350  RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
351  RTE_ETH_INPUT_SET_L3_DST_IP4,
352  RTE_ETH_INPUT_SET_L3_SRC_IP6,
353  RTE_ETH_INPUT_SET_L3_DST_IP6,
354  RTE_ETH_INPUT_SET_L3_IP4_TOS,
355  RTE_ETH_INPUT_SET_L3_IP4_PROTO,
356  RTE_ETH_INPUT_SET_L3_IP6_TC,
357  RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
358  RTE_ETH_INPUT_SET_L3_IP4_TTL,
359  RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
360 
361  /* L4 */
362  RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
363  RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
364  RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
365  RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
366  RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
367  RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
368  RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
369 
370  /* Tunnel */
371  RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
372  RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
373  RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
374  RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
375  RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
376 
377  /* Flexible Payload */
378  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
379  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
380  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
381  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
382  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
383  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
384  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
385  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
386 
387  RTE_ETH_INPUT_SET_DEFAULT = 65533,
388  RTE_ETH_INPUT_SET_NONE = 65534,
389  RTE_ETH_INPUT_SET_MAX = 65535,
390 };
391 
396  RTE_ETH_INPUT_SET_OP_UNKNOWN,
399  RTE_ETH_INPUT_SET_OP_MAX
400 };
401 
402 
408  uint16_t flow_type;
409  uint16_t inset_size;
411  enum rte_filter_input_set_op op;
412 };
413 
418  uint16_t ether_type;
419 };
420 
425  uint32_t src_ip;
426  uint32_t dst_ip;
427  uint8_t tos;
428  uint8_t ttl;
429  uint8_t proto;
430 };
431 
437  uint16_t src_port;
438  uint16_t dst_port;
439 };
440 
446  uint16_t src_port;
447  uint16_t dst_port;
448 };
449 
455  uint16_t src_port;
456  uint16_t dst_port;
457  uint32_t verify_tag;
458 };
459 
464  uint32_t src_ip[4];
465  uint32_t dst_ip[4];
466  uint8_t tc;
467  uint8_t proto;
468  uint8_t hop_limits;
469 };
470 
476  uint16_t src_port;
477  uint16_t dst_port;
478 };
479 
485  uint16_t src_port;
486  uint16_t dst_port;
487 };
488 
494  uint16_t src_port;
495  uint16_t dst_port;
496  uint32_t verify_tag;
497 };
498 
504 };
505 
510  RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
511  RTE_FDIR_TUNNEL_TYPE_NVGRE,
512  RTE_FDIR_TUNNEL_TYPE_VXLAN,
513 };
514 
522  uint32_t tunnel_id;
524 };
525 
531  struct rte_eth_l2_flow l2_flow;
532  struct rte_eth_udpv4_flow udp4_flow;
533  struct rte_eth_tcpv4_flow tcp4_flow;
534  struct rte_eth_sctpv4_flow sctp4_flow;
535  struct rte_eth_ipv4_flow ip4_flow;
536  struct rte_eth_udpv6_flow udp6_flow;
537  struct rte_eth_tcpv6_flow tcp6_flow;
538  struct rte_eth_sctpv6_flow sctp6_flow;
539  struct rte_eth_ipv6_flow ipv6_flow;
540  struct rte_eth_mac_vlan_flow mac_vlan_flow;
541  struct rte_eth_tunnel_flow tunnel_flow;
542 };
543 
548  uint16_t vlan_tci;
551  uint8_t is_vf;
552  uint16_t dst_id;
553 };
554 
559  uint16_t flow_type;
564 };
565 
570  RTE_ETH_FDIR_ACCEPT = 0,
571  RTE_ETH_FDIR_REJECT,
572  RTE_ETH_FDIR_PASSTHRU,
573 };
574 
584 };
585 
590  uint16_t rx_queue;
593  uint8_t flex_off;
597 };
598 
605  uint32_t soft_id;
609 };
610 
616  uint16_t vlan_tci_mask;
622  uint16_t src_port_mask;
624  uint16_t dst_port_mask;
629  uint32_t tunnel_id_mask;
632 };
633 
638  RTE_ETH_PAYLOAD_UNKNOWN = 0,
639  RTE_ETH_RAW_PAYLOAD,
640  RTE_ETH_L2_PAYLOAD,
641  RTE_ETH_L3_PAYLOAD,
642  RTE_ETH_L4_PAYLOAD,
643  RTE_ETH_PAYLOAD_MAX = 8,
644 };
645 
657 };
658 
664  uint16_t flow_type;
667 };
668 
674  uint16_t nb_payloads;
675  uint16_t nb_flexmasks;
676  struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX];
678  struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX];
680 };
681 
691 };
692 
693 #define UINT32_BIT (CHAR_BIT * sizeof(uint32_t))
694 #define RTE_FLOW_MASK_ARRAY_SIZE \
695  (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
696 
706  struct rte_eth_fdir_masks mask;
709  uint32_t guarant_spc;
710  uint32_t best_spc;
712  uint32_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE];
713  uint32_t max_flexpayload;
729 };
730 
736  uint32_t collision;
737  uint32_t free;
738  uint32_t maxhash;
741  uint32_t maxlen;
742  uint64_t add;
743  uint64_t remove;
744  uint64_t f_add;
745  uint64_t f_remove;
746  uint32_t guarant_cnt;
747  uint32_t best_cnt;
748 };
749 
754  RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0,
757  RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX,
758 };
759 
767  union {
770  } info;
771 };
772 
784  RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0,
791  RTE_ETH_HASH_FILTER_INFO_TYPE_MAX,
792 };
793 
798  RTE_ETH_HASH_FUNCTION_DEFAULT = 0,
801  RTE_ETH_HASH_FUNCTION_MAX,
802 };
803 
804 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \
805  (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
806 
818  uint32_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
820  uint32_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
821 };
822 
830  union {
832  uint8_t enable;
837  } info;
838 };
839 
844  enum rte_eth_tunnel_type l2_tunnel_type;
845  uint16_t ether_type; /* ether type in l2 header */
846  uint32_t tunnel_id; /* port tag id for e-tag */
847  uint16_t vf_id; /* VF id for tag insertion */
848  uint32_t pool; /* destination pool for tag based forwarding */
849 };
850 
851 #ifdef __cplusplus
852 }
853 #endif
854 
855 #endif /* _RTE_ETH_CTRL_H_ */
uint32_t src_ip[4]
Definition: rte_eth_ctrl.h:464
struct rte_eth_fdir_flow_ext flow_ext
Definition: rte_eth_ctrl.h:562
#define RTE_ETH_FDIR_MAX_FLEXLEN
Definition: rte_eth_ctrl.h:333
enum rte_eth_fdir_status report_status
Definition: rte_eth_ctrl.h:592
uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN]
Definition: rte_eth_ctrl.h:665
rte_eth_input_set_field
Definition: rte_eth_ctrl.h:339
enum rte_fdir_mode mode
Definition: rte_eth_ctrl.h:705
uint32_t flex_payload_unit
Definition: rte_eth_ctrl.h:716
struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX]
Definition: rte_eth_ctrl.h:676
struct rte_eth_ipv4_flow ip
Definition: rte_eth_ctrl.h:436
rte_eth_fdir_filter_info_type
Definition: rte_eth_ctrl.h:753
union rte_eth_hash_filter_info::@44 info
union rte_eth_fdir_flow flow
Definition: rte_eth_ctrl.h:560
#define RTE_FLEX_FILTER_MAXLEN
Definition: rte_eth_ctrl.h:162
struct rte_eth_hash_global_conf global_conf
Definition: rte_eth_ctrl.h:834
enum rte_eth_hash_function hash_func
Definition: rte_eth_ctrl.h:816
rte_filter_op
Definition: rte_eth_ctrl.h:108
uint16_t src_port_mask
Definition: rte_eth_ctrl.h:622
rte_filter_input_set_op
Definition: rte_eth_ctrl.h:395
struct rte_eth_fdir_action action
Definition: rte_eth_ctrl.h:608
uint32_t guarant_spc
Definition: rte_eth_ctrl.h:709
struct rte_eth_input_set_conf input_set_conf
Definition: rte_eth_ctrl.h:836
uint32_t max_flex_payload_segment_num
Definition: rte_eth_ctrl.h:719
rte_eth_hash_function
Definition: rte_eth_ctrl.h:797
struct ether_addr inner_mac
Definition: rte_eth_ctrl.h:296
rte_eth_fdir_status
Definition: rte_eth_ctrl.h:579
struct rte_eth_ipv6_flow ipv6_mask
Definition: rte_eth_ctrl.h:620
struct rte_eth_fdir_input input
Definition: rte_eth_ctrl.h:607
union rte_eth_fdir_filter_info::@43 info
struct rte_eth_ipv4_flow ipv4_mask
Definition: rte_eth_ctrl.h:618
struct rte_eth_ipv4_flow ip
Definition: rte_eth_ctrl.h:454
uint32_t max_flex_bitmask_num
Definition: rte_eth_ctrl.h:728
struct rte_eth_ipv4_flow ip
Definition: rte_eth_ctrl.h:445
uint32_t flex_bitmask_unit
Definition: rte_eth_ctrl.h:726
uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN]
Definition: rte_eth_ctrl.h:652
rte_eth_payload_type
Definition: rte_eth_ctrl.h:637
struct rte_eth_fdir_flex_conf flex_conf
Definition: rte_eth_ctrl.h:708
enum rte_mac_filter_type filter_type
Definition: rte_eth_ctrl.h:139
uint32_t dst_ip[4]
Definition: rte_eth_ctrl.h:465
enum rte_eth_fdir_tunnel_type tunnel_type
Definition: rte_eth_ctrl.h:520
uint32_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]
Definition: rte_eth_ctrl.h:818
uint16_t dst_port_mask
Definition: rte_eth_ctrl.h:624
uint16_t vlan_tci_mask
Definition: rte_eth_ctrl.h:616
enum rte_eth_fdir_filter_info_type info_type
Definition: rte_eth_ctrl.h:765
rte_eth_global_cfg_type
Definition: rte_eth_ctrl.h:316
union rte_eth_tunnel_filter_conf::@41 ip_addr
uint8_t tunnel_type_mask
Definition: rte_eth_ctrl.h:630
uint32_t tunnel_id_mask
Definition: rte_eth_ctrl.h:629
struct rte_eth_ipv6_flow ip
Definition: rte_eth_ctrl.h:493
enum rte_eth_tunnel_type tunnel_type
Definition: rte_eth_ctrl.h:308
uint16_t flex_payload_limit
Definition: rte_eth_ctrl.h:723
rte_filter_type
Definition: rte_eth_ctrl.h:91
rte_tunnel_iptype
Definition: rte_eth_ctrl.h:286
#define RTE_ETH_INSET_SIZE_MAX
Definition: rte_eth_ctrl.h:334
struct rte_eth_input_set_conf input_set_conf
Definition: rte_eth_ctrl.h:769
uint8_t mac_addr_byte_mask
Definition: rte_eth_ctrl.h:627
rte_eth_fdir_tunnel_type
Definition: rte_eth_ctrl.h:509
struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX]
Definition: rte_eth_ctrl.h:678
rte_eth_tunnel_type
Definition: rte_eth_ctrl.h:251
uint32_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]
Definition: rte_eth_ctrl.h:820
rte_mac_filter_type
Definition: rte_eth_ctrl.h:125
enum rte_eth_global_cfg_type cfg_type
Definition: rte_eth_ctrl.h:326
enum rte_eth_payload_type type
Definition: rte_eth_ctrl.h:651
uint32_t max_flexpayload
Definition: rte_eth_ctrl.h:713
enum rte_eth_hash_filter_info_type info_type
Definition: rte_eth_ctrl.h:828
rte_eth_fdir_behavior
Definition: rte_eth_ctrl.h:569
rte_fdir_mode
Definition: rte_eth_ctrl.h:685
uint16_t ether_type
Definition: rte_eth_ctrl.h:418
#define RTE_FLEX_FILTER_MASK_SIZE
Definition: rte_eth_ctrl.h:163
uint32_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE]
Definition: rte_eth_ctrl.h:712
enum rte_eth_fdir_behavior behavior
Definition: rte_eth_ctrl.h:591
uint8_t bytes[RTE_FLEX_FILTER_MAXLEN]
Definition: rte_eth_ctrl.h:174
uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN]
Definition: rte_eth_ctrl.h:549
enum rte_tunnel_iptype ip_type
Definition: rte_eth_ctrl.h:298
struct rte_eth_ipv6_flow ip
Definition: rte_eth_ctrl.h:484
struct ether_addr outer_mac
Definition: rte_eth_ctrl.h:295
struct ether_addr mac_addr
Definition: rte_eth_ctrl.h:523
uint8_t mask[RTE_FLEX_FILTER_MASK_SIZE]
Definition: rte_eth_ctrl.h:175
struct rte_eth_ipv6_flow ip
Definition: rte_eth_ctrl.h:475
rte_eth_hash_filter_info_type
Definition: rte_eth_ctrl.h:783
struct ether_addr mac_addr
Definition: rte_eth_ctrl.h:503