DPDK  24.03.0-rc4
rte_dmadev.h
Go to the documentation of this file.
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2021 HiSilicon Limited
3  * Copyright(c) 2021 Intel Corporation
4  * Copyright(c) 2021 Marvell International Ltd
5  * Copyright(c) 2021 SmartShare Systems
6  */
7 
8 #ifndef RTE_DMADEV_H
9 #define RTE_DMADEV_H
10 
147 #include <stdint.h>
148 
149 #include <rte_bitops.h>
150 #include <rte_common.h>
151 
152 #ifdef __cplusplus
153 extern "C" {
154 #endif
155 
157 #define RTE_DMADEV_DEFAULT_MAX 64
158 
171 int rte_dma_dev_max(size_t dev_max);
172 
183 int rte_dma_get_dev_id_by_name(const char *name);
184 
194 bool rte_dma_is_valid(int16_t dev_id);
195 
203 uint16_t rte_dma_count_avail(void);
204 
213 int16_t rte_dma_next_dev(int16_t start_dev_id);
214 
216 #define RTE_DMA_FOREACH_DEV(p) \
217  for (p = rte_dma_next_dev(0); \
218  p != -1; \
219  p = rte_dma_next_dev(p + 1))
220 
221 
226 #define RTE_DMA_CAPA_MEM_TO_MEM RTE_BIT64(0)
227 
228 #define RTE_DMA_CAPA_MEM_TO_DEV RTE_BIT64(1)
229 
230 #define RTE_DMA_CAPA_DEV_TO_MEM RTE_BIT64(2)
231 
232 #define RTE_DMA_CAPA_DEV_TO_DEV RTE_BIT64(3)
233 
239 #define RTE_DMA_CAPA_SVA RTE_BIT64(4)
240 
245 #define RTE_DMA_CAPA_SILENT RTE_BIT64(5)
246 
253 #define RTE_DMA_CAPA_HANDLES_ERRORS RTE_BIT64(6)
254 
260 #define RTE_DMA_CAPA_M2D_AUTO_FREE RTE_BIT64(7)
261 
266 #define RTE_DMA_CAPA_OPS_COPY RTE_BIT64(32)
267 
268 #define RTE_DMA_CAPA_OPS_COPY_SG RTE_BIT64(33)
269 
270 #define RTE_DMA_CAPA_OPS_FILL RTE_BIT64(34)
271 
278 struct rte_dma_info {
279  const char *dev_name;
281  uint64_t dev_capa;
283  uint16_t max_vchans;
285  uint16_t max_desc;
287  uint16_t min_desc;
295  uint16_t max_sges;
297  int16_t numa_node;
299  uint16_t nb_vchans;
300 };
301 
314 int rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info);
315 
321 struct rte_dma_conf {
326  uint16_t nb_vchans;
335 };
336 
353 int rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf);
354 
367 int rte_dma_start(int16_t dev_id);
368 
380 int rte_dma_stop(int16_t dev_id);
381 
393 int rte_dma_close(int16_t dev_id);
394 
433 };
434 
441  RTE_DMA_PORT_NONE,
443 };
444 
456  enum rte_dma_port_type port_type;
457  union {
506  __extension__
507  struct {
508  uint64_t coreid : 4;
509  uint64_t pfid : 8;
510  uint64_t vfen : 1;
511  uint64_t vfid : 16;
513  uint64_t pasid : 20;
515  uint64_t attr : 3;
517  uint64_t ph : 2;
519  uint64_t st : 16;
520  } pcie;
521  };
522  uint64_t reserved[2];
523 };
524 
529  union {
530  struct {
538  struct rte_mempool *pool;
539  } m2d;
540  };
542  uint64_t reserved[2];
543 };
544 
555  enum rte_dma_direction direction;
557  uint16_t nb_desc;
565  struct rte_dma_port_param src_port;
573  struct rte_dma_port_param dst_port;
581  struct rte_dma_auto_free_param auto_free;
582 };
583 
599 int rte_dma_vchan_setup(int16_t dev_id, uint16_t vchan,
600  const struct rte_dma_vchan_conf *conf);
601 
609  uint64_t submitted;
613  uint64_t completed;
615  uint64_t errors;
616 };
617 
624 #define RTE_DMA_ALL_VCHAN 0xFFFFu
625 
641 int rte_dma_stats_get(int16_t dev_id, uint16_t vchan,
642  struct rte_dma_stats *stats);
643 
656 int rte_dma_stats_reset(int16_t dev_id, uint16_t vchan);
657 
668 };
669 
685 int
686 rte_dma_vchan_status(int16_t dev_id, uint16_t vchan, enum rte_dma_vchan_status *status);
687 
699 int rte_dma_dump(int16_t dev_id, FILE *f);
700 
763 };
764 
770 struct rte_dma_sge {
772  uint32_t length;
773 };
774 
775 #include "rte_dmadev_core.h"
776 #include "rte_dmadev_trace_fp.h"
777 
789 #define RTE_DMA_OP_FLAG_FENCE RTE_BIT64(0)
790 
794 #define RTE_DMA_OP_FLAG_SUBMIT RTE_BIT64(1)
795 
799 #define RTE_DMA_OP_FLAG_LLC RTE_BIT64(2)
800 
806 #define RTE_DMA_OP_FLAG_AUTO_FREE RTE_BIT64(3)
807 
835 static inline int
836 rte_dma_copy(int16_t dev_id, uint16_t vchan, rte_iova_t src, rte_iova_t dst,
837  uint32_t length, uint64_t flags)
838 {
839  struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
840  int ret;
841 
842 #ifdef RTE_DMADEV_DEBUG
843  if (!rte_dma_is_valid(dev_id) || length == 0)
844  return -EINVAL;
845  if (*obj->copy == NULL)
846  return -ENOTSUP;
847 #endif
848 
849  ret = (*obj->copy)(obj->dev_private, vchan, src, dst, length, flags);
850  rte_dma_trace_copy(dev_id, vchan, src, dst, length, flags, ret);
851 
852  return ret;
853 }
854 
885 static inline int
886 rte_dma_copy_sg(int16_t dev_id, uint16_t vchan, struct rte_dma_sge *src,
887  struct rte_dma_sge *dst, uint16_t nb_src, uint16_t nb_dst,
888  uint64_t flags)
889 {
890  struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
891  int ret;
892 
893 #ifdef RTE_DMADEV_DEBUG
894  if (!rte_dma_is_valid(dev_id) || src == NULL || dst == NULL ||
895  nb_src == 0 || nb_dst == 0)
896  return -EINVAL;
897  if (*obj->copy_sg == NULL)
898  return -ENOTSUP;
899 #endif
900 
901  ret = (*obj->copy_sg)(obj->dev_private, vchan, src, dst, nb_src,
902  nb_dst, flags);
903  rte_dma_trace_copy_sg(dev_id, vchan, src, dst, nb_src, nb_dst, flags,
904  ret);
905 
906  return ret;
907 }
908 
935 static inline int
936 rte_dma_fill(int16_t dev_id, uint16_t vchan, uint64_t pattern,
937  rte_iova_t dst, uint32_t length, uint64_t flags)
938 {
939  struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
940  int ret;
941 
942 #ifdef RTE_DMADEV_DEBUG
943  if (!rte_dma_is_valid(dev_id) || length == 0)
944  return -EINVAL;
945  if (*obj->fill == NULL)
946  return -ENOTSUP;
947 #endif
948 
949  ret = (*obj->fill)(obj->dev_private, vchan, pattern, dst, length,
950  flags);
951  rte_dma_trace_fill(dev_id, vchan, pattern, dst, length, flags, ret);
952 
953  return ret;
954 }
955 
970 static inline int
971 rte_dma_submit(int16_t dev_id, uint16_t vchan)
972 {
973  struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
974  int ret;
975 
976 #ifdef RTE_DMADEV_DEBUG
977  if (!rte_dma_is_valid(dev_id))
978  return -EINVAL;
979  if (*obj->submit == NULL)
980  return -ENOTSUP;
981 #endif
982 
983  ret = (*obj->submit)(obj->dev_private, vchan);
984  rte_dma_trace_submit(dev_id, vchan, ret);
985 
986  return ret;
987 }
988 
1011 static inline uint16_t
1012 rte_dma_completed(int16_t dev_id, uint16_t vchan, const uint16_t nb_cpls,
1013  uint16_t *last_idx, bool *has_error)
1014 {
1015  struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
1016  uint16_t idx, ret;
1017  bool err;
1018 
1019 #ifdef RTE_DMADEV_DEBUG
1020  if (!rte_dma_is_valid(dev_id) || nb_cpls == 0)
1021  return 0;
1022  if (*obj->completed == NULL)
1023  return 0;
1024 #endif
1025 
1026  /* Ensure the pointer values are non-null to simplify drivers.
1027  * In most cases these should be compile time evaluated, since this is
1028  * an inline function.
1029  * - If NULL is explicitly passed as parameter, then compiler knows the
1030  * value is NULL
1031  * - If address of local variable is passed as parameter, then compiler
1032  * can know it's non-NULL.
1033  */
1034  if (last_idx == NULL)
1035  last_idx = &idx;
1036  if (has_error == NULL)
1037  has_error = &err;
1038 
1039  *has_error = false;
1040  ret = (*obj->completed)(obj->dev_private, vchan, nb_cpls, last_idx,
1041  has_error);
1042  rte_dma_trace_completed(dev_id, vchan, nb_cpls, last_idx, has_error,
1043  ret);
1044 
1045  return ret;
1046 }
1047 
1074 static inline uint16_t
1075 rte_dma_completed_status(int16_t dev_id, uint16_t vchan,
1076  const uint16_t nb_cpls, uint16_t *last_idx,
1077  enum rte_dma_status_code *status)
1078 {
1079  struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
1080  uint16_t idx, ret;
1081 
1082 #ifdef RTE_DMADEV_DEBUG
1083  if (!rte_dma_is_valid(dev_id) || nb_cpls == 0 || status == NULL)
1084  return 0;
1085  if (*obj->completed_status == NULL)
1086  return 0;
1087 #endif
1088 
1089  if (last_idx == NULL)
1090  last_idx = &idx;
1091 
1092  ret = (*obj->completed_status)(obj->dev_private, vchan, nb_cpls,
1093  last_idx, status);
1094  rte_dma_trace_completed_status(dev_id, vchan, nb_cpls, last_idx, status,
1095  ret);
1096 
1097  return ret;
1098 }
1099 
1112 static inline uint16_t
1113 rte_dma_burst_capacity(int16_t dev_id, uint16_t vchan)
1114 {
1115  struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
1116  uint16_t ret;
1117 
1118 #ifdef RTE_DMADEV_DEBUG
1119  if (!rte_dma_is_valid(dev_id))
1120  return 0;
1121  if (*obj->burst_capacity == NULL)
1122  return 0;
1123 #endif
1124  ret = (*obj->burst_capacity)(obj->dev_private, vchan);
1125  rte_dma_trace_burst_capacity(dev_id, vchan, ret);
1126 
1127  return ret;
1128 }
1129 
1130 #ifdef __cplusplus
1131 }
1132 #endif
1133 
1134 #endif /* RTE_DMADEV_H */
uint16_t max_desc
Definition: rte_dmadev.h:285
int rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
uint16_t nb_vchans
Definition: rte_dmadev.h:326
uint16_t rte_dma_count_avail(void)
int rte_dma_stats_get(int16_t dev_id, uint16_t vchan, struct rte_dma_stats *stats)
int rte_dma_start(int16_t dev_id)
int rte_dma_stop(int16_t dev_id)
static int rte_dma_copy_sg(int16_t dev_id, uint16_t vchan, struct rte_dma_sge *src, struct rte_dma_sge *dst, uint16_t nb_src, uint16_t nb_dst, uint64_t flags)
Definition: rte_dmadev.h:886
uint64_t rte_iova_t
Definition: rte_common.h:584
rte_iova_t addr
Definition: rte_dmadev.h:771
int rte_dma_stats_reset(int16_t dev_id, uint16_t vchan)
uint64_t dev_capa
Definition: rte_dmadev.h:281
static int rte_dma_copy(int16_t dev_id, uint16_t vchan, rte_iova_t src, rte_iova_t dst, uint32_t length, uint64_t flags)
Definition: rte_dmadev.h:836
bool rte_dma_is_valid(int16_t dev_id)
int rte_dma_get_dev_id_by_name(const char *name)
int rte_dma_close(int16_t dev_id)
int rte_dma_dev_max(size_t dev_max)
int16_t rte_dma_next_dev(int16_t start_dev_id)
rte_dma_direction
Definition: rte_dmadev.h:400
int rte_dma_dump(int16_t dev_id, FILE *f)
bool enable_silent
Definition: rte_dmadev.h:334
rte_dma_port_type
Definition: rte_dmadev.h:440
uint16_t max_sges
Definition: rte_dmadev.h:295
const char * dev_name
Definition: rte_dmadev.h:279
static int rte_dma_submit(int16_t dev_id, uint16_t vchan)
Definition: rte_dmadev.h:971
uint64_t errors
Definition: rte_dmadev.h:615
int rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info)
int16_t numa_node
Definition: rte_dmadev.h:297
rte_dma_status_code
Definition: rte_dmadev.h:706
int rte_dma_vchan_setup(int16_t dev_id, uint16_t vchan, const struct rte_dma_vchan_conf *conf)
uint16_t min_desc
Definition: rte_dmadev.h:287
static uint16_t rte_dma_completed_status(int16_t dev_id, uint16_t vchan, const uint16_t nb_cpls, uint16_t *last_idx, enum rte_dma_status_code *status)
Definition: rte_dmadev.h:1075
uint16_t max_vchans
Definition: rte_dmadev.h:283
static uint16_t rte_dma_burst_capacity(int16_t dev_id, uint16_t vchan)
Definition: rte_dmadev.h:1113
rte_dma_vchan_status
Definition: rte_dmadev.h:664
uint64_t completed
Definition: rte_dmadev.h:613
uint64_t submitted
Definition: rte_dmadev.h:609
static int rte_dma_fill(int16_t dev_id, uint16_t vchan, uint64_t pattern, rte_iova_t dst, uint32_t length, uint64_t flags)
Definition: rte_dmadev.h:936
static uint16_t rte_dma_completed(int16_t dev_id, uint16_t vchan, const uint16_t nb_cpls, uint16_t *last_idx, bool *has_error)
Definition: rte_dmadev.h:1012
uint16_t nb_vchans
Definition: rte_dmadev.h:299
uint32_t length
Definition: rte_dmadev.h:772
struct rte_mempool * pool
Definition: rte_dmadev.h:538