DPDK 25.03.0-rc0
rte_cryptodev.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020 Intel Corporation.
3 */
4
5#ifndef _RTE_CRYPTODEV_H_
6#define _RTE_CRYPTODEV_H_
7
17#include <rte_compat.h>
18#include "rte_kvargs.h"
19#include "rte_crypto.h"
20#include <rte_common.h>
21#include <rte_rcu_qsbr.h>
22
23#include "rte_cryptodev_trace_fp.h"
24
28extern int rte_cryptodev_logtype;
29#define RTE_LOGTYPE_CRYPTODEV rte_cryptodev_logtype
30
31/* Logging Macros */
32#define CDEV_LOG_ERR(...) \
33 RTE_LOG_LINE_PREFIX(ERR, CRYPTODEV, \
34 "%s() line %u: ", __func__ RTE_LOG_COMMA __LINE__, __VA_ARGS__)
35
36#define CDEV_LOG_INFO(...) \
37 RTE_LOG_LINE(INFO, CRYPTODEV, "" __VA_ARGS__)
38
39#define CDEV_LOG_DEBUG(...) \
40 RTE_LOG_LINE_PREFIX(DEBUG, CRYPTODEV, \
41 "%s() line %u: ", __func__ RTE_LOG_COMMA __LINE__, __VA_ARGS__)
42
43#define CDEV_PMD_TRACE(...) \
44 RTE_LOG_LINE_PREFIX(DEBUG, CRYPTODEV, \
45 "[%s] %s: ", dev RTE_LOG_COMMA __func__, __VA_ARGS__)
46
60#define rte_crypto_op_ctod_offset(c, t, o) \
61 ((t)((char *)(c) + (o)))
62
74#define rte_crypto_op_ctophys_offset(c, o) \
75 (rte_iova_t)((c)->phys_addr + (o))
76
81 uint16_t min;
82 uint16_t max;
83 uint16_t increment;
89};
90
96#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_512_BYTES RTE_BIT32(0)
97#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_4096_BYTES RTE_BIT32(1)
98#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_1_MEGABYTES RTE_BIT32(2)
99
106 union {
107 struct {
110 uint16_t block_size;
120 } auth;
122 struct {
125 uint16_t block_size;
131 uint32_t dataunit_set;
137 } cipher;
139 struct {
142 uint16_t block_size;
152 } aead;
153 };
154};
155
163 uint32_t op_types;
172 __extension__
173 union {
185 uint32_t op_capa[RTE_CRYPTO_ASYM_OP_LIST_END];
187 };
188
189 uint64_t hash_algos;
191};
192
198};
199
200
206 union {
211 };
212};
213
217 union {
218 enum rte_crypto_cipher_algorithm cipher;
221 } algo;
222};
223
231};
232
245 const struct rte_cryptodev_sym_capability_idx *idx);
246
259 const struct rte_cryptodev_asym_capability_idx *idx);
260
273int
275 const struct rte_cryptodev_symmetric_capability *capability,
276 uint16_t key_size, uint16_t iv_size);
277
291int
293 const struct rte_cryptodev_symmetric_capability *capability,
294 uint16_t key_size, uint16_t digest_size, uint16_t iv_size);
295
310int
312 const struct rte_cryptodev_symmetric_capability *capability,
313 uint16_t key_size, uint16_t digest_size, uint16_t aad_size,
314 uint16_t iv_size);
315
326int
328 const struct rte_cryptodev_asymmetric_xform_capability *capability,
329 enum rte_crypto_asym_op_type op_type);
330
341int
343 const struct rte_cryptodev_asymmetric_xform_capability *capability,
344 uint16_t modlen);
345
356bool
358 const struct rte_cryptodev_asymmetric_xform_capability *capability,
359 enum rte_crypto_auth_algorithm hash);
360
375__rte_experimental
376int
378 const struct rte_cryptodev_asymmetric_xform_capability *capability,
379 enum rte_crypto_asym_op_type op_type, uint8_t cap);
380
392int
394 const char *algo_string);
395
407int
409 const char *algo_string);
410
422int
424 const char *algo_string);
425
437int
439 const char *xform_string);
440
450__rte_experimental
451const char *
453
463__rte_experimental
464const char *
466
476__rte_experimental
477const char *
479
489__rte_experimental
490const char *
492
493
495#define RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() \
496 { RTE_CRYPTO_OP_TYPE_UNDEFINED }
497
498
507#define RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO (1ULL << 0)
509#define RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO (1ULL << 1)
511#define RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING (1ULL << 2)
513#define RTE_CRYPTODEV_FF_CPU_SSE (1ULL << 3)
515#define RTE_CRYPTODEV_FF_CPU_AVX (1ULL << 4)
517#define RTE_CRYPTODEV_FF_CPU_AVX2 (1ULL << 5)
519#define RTE_CRYPTODEV_FF_CPU_AESNI (1ULL << 6)
521#define RTE_CRYPTODEV_FF_HW_ACCELERATED (1ULL << 7)
525#define RTE_CRYPTODEV_FF_CPU_AVX512 (1ULL << 8)
527#define RTE_CRYPTODEV_FF_IN_PLACE_SGL (1ULL << 9)
531#define RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT (1ULL << 10)
535#define RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT (1ULL << 11)
540#define RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT (1ULL << 12)
544#define RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT (1ULL << 13)
546#define RTE_CRYPTODEV_FF_CPU_NEON (1ULL << 14)
548#define RTE_CRYPTODEV_FF_CPU_ARM_CE (1ULL << 15)
550#define RTE_CRYPTODEV_FF_SECURITY (1ULL << 16)
552#define RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_EXP (1ULL << 17)
554#define RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT (1ULL << 18)
556#define RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED (1ULL << 19)
558#define RTE_CRYPTODEV_FF_ASYM_SESSIONLESS (1ULL << 20)
560#define RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO (1ULL << 21)
562#define RTE_CRYPTODEV_FF_SYM_SESSIONLESS (1ULL << 22)
564#define RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA (1ULL << 23)
566#define RTE_CRYPTODEV_FF_SYM_RAW_DP (1ULL << 24)
568#define RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS (1ULL << 25)
570#define RTE_CRYPTODEV_FF_CIPHER_WRAPPED_KEY (1ULL << 26)
572#define RTE_CRYPTODEV_FF_SECURITY_INNER_CSUM (1ULL << 27)
574#define RTE_CRYPTODEV_FF_SECURITY_RX_INJECT (1ULL << 28)
585const char *
587
589/* Structure rte_cryptodev_info 8< */
591 const char *driver_name;
592 uint8_t driver_id;
593 struct rte_device *device;
610 struct {
616 } sym;
617};
618/* >8 End of structure rte_cryptodev_info. */
619
620#define RTE_CRYPTODEV_DETACHED (0)
621#define RTE_CRYPTODEV_ATTACHED (1)
622
629
630/* Crypto queue pair priority levels */
631#define RTE_CRYPTODEV_QP_PRIORITY_HIGHEST 0
635#define RTE_CRYPTODEV_QP_PRIORITY_NORMAL 128
639#define RTE_CRYPTODEV_QP_PRIORITY_LOWEST 255
645/* Structure rte_cryptodev_qp_conf 8<*/
647 uint32_t nb_descriptors;
650 uint8_t priority;
658};
659/* >8 End of structure rte_cryptodev_qp_conf. */
660
682typedef uint16_t (*rte_cryptodev_callback_fn)(uint16_t dev_id, uint16_t qp_id,
683 struct rte_crypto_op **ops, uint16_t nb_ops, void *user_param);
684
694typedef void (*rte_cryptodev_cb_fn)(uint8_t dev_id,
695 enum rte_cryptodev_event_type event, void *cb_arg);
696
697
709};
710
711#define RTE_CRYPTODEV_NAME_MAX_LEN (64)
723int
724rte_cryptodev_get_dev_id(const char *name);
725
736const char *
738
746uint8_t
748
757uint8_t
759
771uint8_t
772rte_cryptodev_devices_get(const char *driver_name, uint8_t *devices,
773 uint8_t nb_devices);
774/*
775 * Return the NUMA socket to which a device is connected
776 *
777 * @param dev_id
778 * The identifier of the device
779 * @return
780 * The NUMA socket id to which the device is connected or
781 * a default of zero if the socket could not be determined.
782 * -1 if returned is the dev_id value is out of range.
783 */
784int
785rte_cryptodev_socket_id(uint8_t dev_id);
786
788/* Structure rte_cryptodev_config 8< */
793 uint64_t ff_disable;
800};
801/* >8 End of structure rte_cryptodev_config. */
802
817int
818rte_cryptodev_configure(uint8_t dev_id, struct rte_cryptodev_config *config);
819
835int
836rte_cryptodev_start(uint8_t dev_id);
837
844void
845rte_cryptodev_stop(uint8_t dev_id);
846
856int
857rte_cryptodev_close(uint8_t dev_id);
858
880int
881rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pair_id,
882 const struct rte_cryptodev_qp_conf *qp_conf, int socket_id);
883
908__rte_experimental
909int
910rte_cryptodev_queue_pair_reset(uint8_t dev_id, uint16_t queue_pair_id,
911 const struct rte_cryptodev_qp_conf *qp_conf, int socket_id);
912
926int
927rte_cryptodev_get_qp_status(uint8_t dev_id, uint16_t queue_pair_id);
928
936uint16_t
938
939
951int
952rte_cryptodev_stats_get(uint8_t dev_id, struct rte_cryptodev_stats *stats);
953
959void
961
975void
976rte_cryptodev_info_get(uint8_t dev_id, struct rte_cryptodev_info *dev_info);
977
978
992int
994 enum rte_cryptodev_event_type event,
995 rte_cryptodev_cb_fn cb_fn, void *cb_arg);
996
1010int
1012 enum rte_cryptodev_event_type event,
1013 rte_cryptodev_cb_fn cb_fn, void *cb_arg);
1014
1030__rte_experimental
1031int
1032rte_cryptodev_queue_pair_event_error_query(uint8_t dev_id, uint16_t qp_id);
1033
1034struct rte_cryptodev_callback;
1035
1037RTE_TAILQ_HEAD(rte_cryptodev_cb_list, rte_cryptodev_callback);
1038
1044 RTE_ATOMIC(struct rte_cryptodev_cb *) next;
1048 void *arg;
1050};
1051
1056struct rte_cryptodev_cb_rcu {
1057 RTE_ATOMIC(struct rte_cryptodev_cb *) next;
1059 struct rte_rcu_qsbr *qsbr;
1061};
1062
1072void *
1074
1104struct rte_mempool *
1105rte_cryptodev_sym_session_pool_create(const char *name, uint32_t nb_elts,
1106 uint32_t elt_size, uint32_t cache_size, uint16_t priv_size,
1107 int socket_id);
1108
1109
1130struct rte_mempool *
1131rte_cryptodev_asym_session_pool_create(const char *name, uint32_t nb_elts,
1132 uint32_t cache_size, uint16_t user_data_size, int socket_id);
1133
1150void *
1152 struct rte_crypto_sym_xform *xforms,
1153 struct rte_mempool *mp);
1171int
1173 struct rte_crypto_asym_xform *xforms, struct rte_mempool *mp,
1174 void **session);
1175
1188int
1190 void *sess);
1191
1203int
1204rte_cryptodev_asym_session_free(uint8_t dev_id, void *sess);
1205
1212unsigned int
1214
1226unsigned int
1228
1239unsigned int
1241
1250unsigned int
1252
1262
1271const char *rte_cryptodev_driver_name_get(uint8_t driver_id);
1272
1285int
1287 void *data,
1288 uint16_t size);
1289
1290#define CRYPTO_SESS_OPAQUE_DATA_OFF 0
1294static inline uint64_t
1296{
1297 return *((uint64_t *)sess + CRYPTO_SESS_OPAQUE_DATA_OFF);
1298}
1299
1303static inline void
1305{
1306 uint64_t *data;
1307 data = (((uint64_t *)sess) + CRYPTO_SESS_OPAQUE_DATA_OFF);
1308 *data = opaque;
1309}
1310
1321void *
1323
1337int
1338rte_cryptodev_asym_session_set_user_data(void *sess, void *data, uint16_t size);
1339
1350void *
1352
1365uint32_t
1367 void *sess, union rte_crypto_sym_ofs ofs,
1368 struct rte_crypto_sym_vec *vec);
1369
1379int
1381
1397int
1398rte_cryptodev_session_event_mdata_set(uint8_t dev_id, void *sess,
1399 enum rte_crypto_op_type op_type,
1400 enum rte_crypto_op_sess_type sess_type,
1401 void *ev_mdata, uint16_t size);
1402
1407union rte_cryptodev_session_ctx {void *crypto_sess;
1408 struct rte_crypto_sym_xform *xform;
1409 struct rte_security_session *sec_sess;
1410};
1411
1438 void *qp, uint8_t *drv_ctx, struct rte_crypto_sym_vec *vec,
1439 union rte_crypto_sym_ofs ofs, void *user_data[], int *enqueue_status);
1440
1463 void *qp, uint8_t *drv_ctx, struct rte_crypto_vec *data_vec,
1464 uint16_t n_data_vecs, union rte_crypto_sym_ofs ofs,
1465 struct rte_crypto_va_iova_ptr *iv,
1466 struct rte_crypto_va_iova_ptr *digest,
1467 struct rte_crypto_va_iova_ptr *aad_or_auth_iv,
1468 void *user_data);
1469
1481typedef int (*cryptodev_sym_raw_operation_done_t)(void *qp, uint8_t *drv_ctx,
1482 uint32_t n);
1483
1493typedef uint32_t (*rte_cryptodev_raw_get_dequeue_count_t)(void *user_data);
1494
1503typedef void (*rte_cryptodev_raw_post_dequeue_t)(void *user_data,
1504 uint32_t index, uint8_t is_op_success);
1505
1547typedef uint32_t (*cryptodev_sym_raw_dequeue_burst_t)(void *qp,
1548 uint8_t *drv_ctx,
1549 rte_cryptodev_raw_get_dequeue_count_t get_dequeue_count,
1550 uint32_t max_nb_to_dequeue,
1552 void **out_user_data, uint8_t is_user_data_array,
1553 uint32_t *n_success, int *dequeue_status);
1554
1578typedef void * (*cryptodev_sym_raw_dequeue_t)(
1579 void *qp, uint8_t *drv_ctx, int *dequeue_status,
1580 enum rte_crypto_op_status *op_status);
1581
1588 void *qp_data;
1589
1596
1597 /* Driver specific context data */
1598 uint8_t drv_ctx_data[];
1599};
1600
1622int
1623rte_cryptodev_configure_raw_dp_ctx(uint8_t dev_id, uint16_t qp_id,
1624 struct rte_crypto_raw_dp_ctx *ctx,
1625 enum rte_crypto_op_sess_type sess_type,
1626 union rte_cryptodev_session_ctx session_ctx,
1627 uint8_t is_update);
1628
1653uint32_t
1655 struct rte_crypto_sym_vec *vec, union rte_crypto_sym_ofs ofs,
1656 void **user_data, int *enqueue_status);
1657
1678__rte_experimental
1679static __rte_always_inline int
1681 struct rte_crypto_vec *data_vec, uint16_t n_data_vecs,
1682 union rte_crypto_sym_ofs ofs,
1683 struct rte_crypto_va_iova_ptr *iv,
1684 struct rte_crypto_va_iova_ptr *digest,
1685 struct rte_crypto_va_iova_ptr *aad_or_auth_iv,
1686 void *user_data)
1687{
1688 return (*ctx->enqueue)(ctx->qp_data, ctx->drv_ctx_data, data_vec,
1689 n_data_vecs, ofs, iv, digest, aad_or_auth_iv, user_data);
1690}
1691
1702int
1704 uint32_t n);
1705
1747uint32_t
1749 rte_cryptodev_raw_get_dequeue_count_t get_dequeue_count,
1750 uint32_t max_nb_to_dequeue,
1752 void **out_user_data, uint8_t is_user_data_array,
1753 uint32_t *n_success, int *dequeue_status);
1754
1778__rte_experimental
1779static __rte_always_inline void *
1781 int *dequeue_status, enum rte_crypto_op_status *op_status)
1782{
1783 return (*ctx->dequeue)(ctx->qp_data, ctx->drv_ctx_data, dequeue_status,
1784 op_status);
1785}
1786
1796int
1798 uint32_t n);
1799
1835struct rte_cryptodev_cb *
1837 uint16_t qp_id,
1839 void *cb_arg);
1840
1863 uint16_t qp_id,
1864 struct rte_cryptodev_cb *cb);
1865
1900struct rte_cryptodev_cb *
1902 uint16_t qp_id,
1904 void *cb_arg);
1905
1928 uint16_t qp_id,
1929 struct rte_cryptodev_cb *cb);
1930
1931#include <rte_cryptodev_core.h>
1932
1933#ifdef __cplusplus
1934extern "C" {
1935#endif
1972static inline uint16_t
1973rte_cryptodev_dequeue_burst(uint8_t dev_id, uint16_t qp_id,
1974 struct rte_crypto_op **ops, uint16_t nb_ops)
1975{
1976 const struct rte_crypto_fp_ops *fp_ops;
1977 void *qp;
1978
1979 rte_cryptodev_trace_dequeue_burst(dev_id, qp_id, (void **)ops, nb_ops);
1980
1981 fp_ops = &rte_crypto_fp_ops[dev_id];
1982 qp = fp_ops->qp.data[qp_id];
1983
1984 nb_ops = fp_ops->dequeue_burst(qp, ops, nb_ops);
1985
1986#ifdef RTE_CRYPTO_CALLBACKS
1987 if (unlikely(fp_ops->qp.deq_cb[qp_id].next != NULL)) {
1988 struct rte_cryptodev_cb_rcu *list;
1989 struct rte_cryptodev_cb *cb;
1990
1991 /* rte_memory_order_release memory order was used when the
1992 * call back was inserted into the list.
1993 * Since there is a clear dependency between loading
1994 * cb and cb->fn/cb->next, rte_memory_order_acquire memory order is
1995 * not required.
1996 */
1997 list = &fp_ops->qp.deq_cb[qp_id];
1998 rte_rcu_qsbr_thread_online(list->qsbr, 0);
1999 cb = rte_atomic_load_explicit(&list->next, rte_memory_order_relaxed);
2000
2001 while (cb != NULL) {
2002 nb_ops = cb->fn(dev_id, qp_id, ops, nb_ops,
2003 cb->arg);
2004 cb = cb->next;
2005 };
2006
2007 rte_rcu_qsbr_thread_offline(list->qsbr, 0);
2008 }
2009#endif
2010 return nb_ops;
2011}
2012
2044static inline uint16_t
2045rte_cryptodev_enqueue_burst(uint8_t dev_id, uint16_t qp_id,
2046 struct rte_crypto_op **ops, uint16_t nb_ops)
2047{
2048 const struct rte_crypto_fp_ops *fp_ops;
2049 void *qp;
2050
2051 fp_ops = &rte_crypto_fp_ops[dev_id];
2052 qp = fp_ops->qp.data[qp_id];
2053#ifdef RTE_CRYPTO_CALLBACKS
2054 if (unlikely(fp_ops->qp.enq_cb[qp_id].next != NULL)) {
2055 struct rte_cryptodev_cb_rcu *list;
2056 struct rte_cryptodev_cb *cb;
2057
2058 /* rte_memory_order_release memory order was used when the
2059 * call back was inserted into the list.
2060 * Since there is a clear dependency between loading
2061 * cb and cb->fn/cb->next, rte_memory_order_acquire memory order is
2062 * not required.
2063 */
2064 list = &fp_ops->qp.enq_cb[qp_id];
2065 rte_rcu_qsbr_thread_online(list->qsbr, 0);
2066 cb = rte_atomic_load_explicit(&list->next, rte_memory_order_relaxed);
2067
2068 while (cb != NULL) {
2069 nb_ops = cb->fn(dev_id, qp_id, ops, nb_ops,
2070 cb->arg);
2071 cb = cb->next;
2072 };
2073
2074 rte_rcu_qsbr_thread_offline(list->qsbr, 0);
2075 }
2076#endif
2077
2078 rte_cryptodev_trace_enqueue_burst(dev_id, qp_id, (void **)ops, nb_ops);
2079 return fp_ops->enqueue_burst(qp, ops, nb_ops);
2080}
2081
2106__rte_experimental
2107static inline int
2108rte_cryptodev_qp_depth_used(uint8_t dev_id, uint16_t qp_id)
2109{
2110 const struct rte_crypto_fp_ops *fp_ops;
2111 void *qp;
2112 int rc;
2113
2114 fp_ops = &rte_crypto_fp_ops[dev_id];
2115 qp = fp_ops->qp.data[qp_id];
2116
2117 if (fp_ops->qp_depth_used == NULL) {
2118 rc = -ENOTSUP;
2119 goto out;
2120 }
2121
2122 rc = fp_ops->qp_depth_used(qp);
2123out:
2124 rte_cryptodev_trace_qp_depth_used(dev_id, qp_id);
2125 return rc;
2126}
2127
2128
2129#ifdef __cplusplus
2130}
2131#endif
2132
2133#endif /* _RTE_CRYPTODEV_H_ */
#define unlikely(x)
#define __rte_always_inline
Definition: rte_common.h:413
rte_crypto_op_sess_type
Definition: rte_crypto.h:61
rte_crypto_op_type
Definition: rte_crypto.h:28
rte_crypto_op_status
Definition: rte_crypto.h:38
rte_crypto_asym_op_type
rte_crypto_asym_xform_type
rte_crypto_auth_algorithm
rte_crypto_sym_xform_type
rte_crypto_aead_algorithm
rte_crypto_cipher_algorithm
static uint16_t rte_cryptodev_dequeue_burst(uint8_t dev_id, uint16_t qp_id, struct rte_crypto_op **ops, uint16_t nb_ops)
int rte_cryptodev_asym_session_create(uint8_t dev_id, struct rte_crypto_asym_xform *xforms, struct rte_mempool *mp, void **session)
uint32_t(* cryptodev_sym_raw_dequeue_burst_t)(void *qp, uint8_t *drv_ctx, rte_cryptodev_raw_get_dequeue_count_t get_dequeue_count, uint32_t max_nb_to_dequeue, rte_cryptodev_raw_post_dequeue_t post_dequeue, void **out_user_data, uint8_t is_user_data_array, uint32_t *n_success, int *dequeue_status)
int rte_cryptodev_close(uint8_t dev_id)
struct rte_mempool * rte_cryptodev_sym_session_pool_create(const char *name, uint32_t nb_elts, uint32_t elt_size, uint32_t cache_size, uint16_t priv_size, int socket_id)
rte_cryptodev_event_type
@ RTE_CRYPTODEV_EVENT_ERROR
@ RTE_CRYPTODEV_EVENT_UNKNOWN
@ RTE_CRYPTODEV_EVENT_MAX
uint8_t rte_cryptodev_devices_get(const char *driver_name, uint8_t *devices, uint8_t nb_devices)
uint8_t rte_cryptodev_count(void)
static uint16_t rte_cryptodev_enqueue_burst(uint8_t dev_id, uint16_t qp_id, struct rte_crypto_op **ops, uint16_t nb_ops)
int rte_cryptodev_start(uint8_t dev_id)
bool rte_cryptodev_asym_xform_capability_check_hash(const struct rte_cryptodev_asymmetric_xform_capability *capability, enum rte_crypto_auth_algorithm hash)
uint32_t rte_cryptodev_raw_enqueue_burst(struct rte_crypto_raw_dp_ctx *ctx, struct rte_crypto_sym_vec *vec, union rte_crypto_sym_ofs ofs, void **user_data, int *enqueue_status)
const char * rte_cryptodev_driver_name_get(uint8_t driver_id)
void *(* cryptodev_sym_raw_dequeue_t)(void *qp, uint8_t *drv_ctx, int *dequeue_status, enum rte_crypto_op_status *op_status)
const struct rte_cryptodev_asymmetric_xform_capability * rte_cryptodev_asym_capability_get(uint8_t dev_id, const struct rte_cryptodev_asym_capability_idx *idx)
__rte_experimental const char * rte_cryptodev_get_aead_algo_string(enum rte_crypto_aead_algorithm algo_enum)
int rte_cryptodev_asym_xform_capability_check_modlen(const struct rte_cryptodev_asymmetric_xform_capability *capability, uint16_t modlen)
static uint64_t rte_cryptodev_sym_session_opaque_data_get(void *sess)
int rte_cryptodev_configure_raw_dp_ctx(uint8_t dev_id, uint16_t qp_id, struct rte_crypto_raw_dp_ctx *ctx, enum rte_crypto_op_sess_type sess_type, union rte_cryptodev_session_ctx session_ctx, uint8_t is_update)
unsigned int rte_cryptodev_is_valid_dev(uint8_t dev_id)
int rte_cryptodev_session_event_mdata_set(uint8_t dev_id, void *sess, enum rte_crypto_op_type op_type, enum rte_crypto_op_sess_type sess_type, void *ev_mdata, uint16_t size)
uint32_t rte_cryptodev_raw_dequeue_burst(struct rte_crypto_raw_dp_ctx *ctx, rte_cryptodev_raw_get_dequeue_count_t get_dequeue_count, uint32_t max_nb_to_dequeue, rte_cryptodev_raw_post_dequeue_t post_dequeue, void **out_user_data, uint8_t is_user_data_array, uint32_t *n_success, int *dequeue_status)
unsigned int rte_cryptodev_sym_get_private_session_size(uint8_t dev_id)
int rte_cryptodev_get_auth_algo_enum(enum rte_crypto_auth_algorithm *algo_enum, const char *algo_string)
void rte_cryptodev_stop(uint8_t dev_id)
struct rte_cryptodev_cb * rte_cryptodev_add_enq_callback(uint8_t dev_id, uint16_t qp_id, rte_cryptodev_callback_fn cb_fn, void *cb_arg)
const char * rte_cryptodev_name_get(uint8_t dev_id)
RTE_TAILQ_HEAD(rte_cryptodev_cb_list, rte_cryptodev_callback)
int rte_cryptodev_sym_session_set_user_data(void *sess, void *data, uint16_t size)
int rte_cryptodev_callback_unregister(uint8_t dev_id, enum rte_cryptodev_event_type event, rte_cryptodev_cb_fn cb_fn, void *cb_arg)
static void rte_cryptodev_sym_session_opaque_data_set(void *sess, uint64_t opaque)
int rte_cryptodev_remove_enq_callback(uint8_t dev_id, uint16_t qp_id, struct rte_cryptodev_cb *cb)
int rte_cryptodev_remove_deq_callback(uint8_t dev_id, uint16_t qp_id, struct rte_cryptodev_cb *cb)
int rte_cryptodev_sym_capability_check_auth(const struct rte_cryptodev_symmetric_capability *capability, uint16_t key_size, uint16_t digest_size, uint16_t iv_size)
int rte_cryptodev_configure(uint8_t dev_id, struct rte_cryptodev_config *config)
int rte_cryptodev_raw_dequeue_done(struct rte_crypto_raw_dp_ctx *ctx, uint32_t n)
__rte_experimental int rte_cryptodev_asym_xform_capability_check_opcap(const struct rte_cryptodev_asymmetric_xform_capability *capability, enum rte_crypto_asym_op_type op_type, uint8_t cap)
int rte_cryptodev_callback_register(uint8_t dev_id, enum rte_cryptodev_event_type event, rte_cryptodev_cb_fn cb_fn, void *cb_arg)
__rte_experimental const char * rte_cryptodev_asym_get_xform_string(enum rte_crypto_asym_xform_type xform_enum)
uint16_t rte_cryptodev_queue_pair_count(uint8_t dev_id)
void(* rte_cryptodev_cb_fn)(uint8_t dev_id, enum rte_cryptodev_event_type event, void *cb_arg)
void * rte_cryptodev_sym_session_create(uint8_t dev_id, struct rte_crypto_sym_xform *xforms, struct rte_mempool *mp)
uint32_t(* cryptodev_sym_raw_enqueue_burst_t)(void *qp, uint8_t *drv_ctx, struct rte_crypto_sym_vec *vec, union rte_crypto_sym_ofs ofs, void *user_data[], int *enqueue_status)
struct rte_mempool * rte_cryptodev_asym_session_pool_create(const char *name, uint32_t nb_elts, uint32_t cache_size, uint16_t user_data_size, int socket_id)
void rte_cryptodev_stats_reset(uint8_t dev_id)
static __rte_experimental __rte_always_inline int rte_cryptodev_raw_enqueue(struct rte_crypto_raw_dp_ctx *ctx, struct rte_crypto_vec *data_vec, uint16_t n_data_vecs, union rte_crypto_sym_ofs ofs, struct rte_crypto_va_iova_ptr *iv, struct rte_crypto_va_iova_ptr *digest, struct rte_crypto_va_iova_ptr *aad_or_auth_iv, void *user_data)
int rte_cryptodev_asym_session_free(uint8_t dev_id, void *sess)
int rte_cryptodev_asym_get_xform_enum(enum rte_crypto_asym_xform_type *xform_enum, const char *xform_string)
void * rte_cryptodev_sym_session_get_user_data(void *sess)
void * rte_cryptodev_asym_session_get_user_data(void *sess)
void(* rte_cryptodev_raw_post_dequeue_t)(void *user_data, uint32_t index, uint8_t is_op_success)
int rte_cryptodev_driver_id_get(const char *name)
int rte_cryptodev_get_dev_id(const char *name)
void * rte_cryptodev_get_sec_ctx(uint8_t dev_id)
unsigned int rte_cryptodev_asym_get_private_session_size(uint8_t dev_id)
__rte_experimental const char * rte_cryptodev_get_cipher_algo_string(enum rte_crypto_cipher_algorithm algo_enum)
int rte_cryptodev_stats_get(uint8_t dev_id, struct rte_cryptodev_stats *stats)
int rte_cryptodev_get_cipher_algo_enum(enum rte_crypto_cipher_algorithm *algo_enum, const char *algo_string)
unsigned int rte_cryptodev_asym_get_header_session_size(void)
__rte_experimental const char * rte_cryptodev_get_auth_algo_string(enum rte_crypto_auth_algorithm algo_enum)
uint32_t(* rte_cryptodev_raw_get_dequeue_count_t)(void *user_data)
__rte_experimental int rte_cryptodev_queue_pair_event_error_query(uint8_t dev_id, uint16_t qp_id)
struct rte_cryptodev_cb * rte_cryptodev_add_deq_callback(uint8_t dev_id, uint16_t qp_id, rte_cryptodev_callback_fn cb_fn, void *cb_arg)
static __rte_experimental __rte_always_inline void * rte_cryptodev_raw_dequeue(struct rte_crypto_raw_dp_ctx *ctx, int *dequeue_status, enum rte_crypto_op_status *op_status)
int(* cryptodev_sym_raw_enqueue_t)(void *qp, uint8_t *drv_ctx, struct rte_crypto_vec *data_vec, uint16_t n_data_vecs, union rte_crypto_sym_ofs ofs, struct rte_crypto_va_iova_ptr *iv, struct rte_crypto_va_iova_ptr *digest, struct rte_crypto_va_iova_ptr *aad_or_auth_iv, void *user_data)
int rte_cryptodev_raw_enqueue_done(struct rte_crypto_raw_dp_ctx *ctx, uint32_t n)
int rte_cryptodev_sym_capability_check_aead(const struct rte_cryptodev_symmetric_capability *capability, uint16_t key_size, uint16_t digest_size, uint16_t aad_size, uint16_t iv_size)
int rte_cryptodev_asym_session_set_user_data(void *sess, void *data, uint16_t size)
const char * rte_cryptodev_get_feature_name(uint64_t flag)
int rte_cryptodev_sym_capability_check_cipher(const struct rte_cryptodev_symmetric_capability *capability, uint16_t key_size, uint16_t iv_size)
uint8_t rte_cryptodev_device_count_by_driver(uint8_t driver_id)
int rte_cryptodev_get_aead_algo_enum(enum rte_crypto_aead_algorithm *algo_enum, const char *algo_string)
uint16_t(* rte_cryptodev_callback_fn)(uint16_t dev_id, uint16_t qp_id, struct rte_crypto_op **ops, uint16_t nb_ops, void *user_param)
int rte_cryptodev_get_raw_dp_ctx_size(uint8_t dev_id)
int rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pair_id, const struct rte_cryptodev_qp_conf *qp_conf, int socket_id)
int(* cryptodev_sym_raw_operation_done_t)(void *qp, uint8_t *drv_ctx, uint32_t n)
int rte_cryptodev_asym_xform_capability_check_optype(const struct rte_cryptodev_asymmetric_xform_capability *capability, enum rte_crypto_asym_op_type op_type)
__rte_experimental int rte_cryptodev_queue_pair_reset(uint8_t dev_id, uint16_t queue_pair_id, const struct rte_cryptodev_qp_conf *qp_conf, int socket_id)
uint32_t rte_cryptodev_sym_cpu_crypto_process(uint8_t dev_id, void *sess, union rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec)
int rte_cryptodev_get_qp_status(uint8_t dev_id, uint16_t queue_pair_id)
void rte_cryptodev_info_get(uint8_t dev_id, struct rte_cryptodev_info *dev_info)
static __rte_experimental int rte_cryptodev_qp_depth_used(uint8_t dev_id, uint16_t qp_id)
int rte_cryptodev_sym_session_free(uint8_t dev_id, void *sess)
const struct rte_cryptodev_symmetric_capability * rte_cryptodev_sym_capability_get(uint8_t dev_id, const struct rte_cryptodev_sym_capability_idx *idx)
static __rte_always_inline void rte_rcu_qsbr_thread_online(struct rte_rcu_qsbr *v, unsigned int thread_id)
Definition: rte_rcu_qsbr.h:296
static __rte_always_inline void rte_rcu_qsbr_thread_offline(struct rte_rcu_qsbr *v, unsigned int thread_id)
Definition: rte_rcu_qsbr.h:349
enum rte_crypto_asym_xform_type type
uint32_t op_capa[RTE_CRYPTO_ASYM_OP_LIST_END]
struct rte_crypto_param_range modlen
enum rte_crypto_asym_xform_type xform_type
enum rte_crypto_op_type op
struct rte_cryptodev_symmetric_capability sym
struct rte_cryptodev_asymmetric_capability asym
struct rte_cryptodev_cb * next
rte_cryptodev_callback_fn fn
unsigned max_nb_queue_pairs
struct rte_device * device
uint16_t min_mbuf_headroom_req
const struct rte_cryptodev_capabilities * capabilities
uint16_t min_mbuf_tailroom_req
const char * driver_name
unsigned max_nb_sessions
struct rte_mempool * mp_session
uint64_t enqueue_err_count
uint64_t dequeue_err_count
enum rte_crypto_auth_algorithm algo
struct rte_cryptodev_symmetric_capability::@124::@126 auth
enum rte_crypto_cipher_algorithm algo
enum rte_crypto_aead_algorithm algo
struct rte_crypto_param_range iv_size
struct rte_crypto_param_range digest_size
struct rte_cryptodev_symmetric_capability::@124::@127 cipher
struct rte_crypto_param_range aad_size
struct rte_crypto_param_range key_size
enum rte_crypto_sym_xform_type xform_type
char name[RTE_MEMPOOL_NAMESIZE]
Definition: rte_mempool.h:231
uint32_t size
Definition: rte_mempool.h:240
uint32_t cache_size
Definition: rte_mempool.h:241
uint32_t elt_size
Definition: rte_mempool.h:244