rte_acl.h

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/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2010-2014 Intel Corporation
 */

#ifndef _RTE_ACL_H_
#define _RTE_ACL_H_

#include <rte_acl_osdep.h>

#ifdef __cplusplus
extern "C" {
#endif

#define RTE_ACL_MAX_CATEGORIES  16

#define RTE_ACL_RESULTS_MULTIPLIER  (XMM_SIZE / sizeof(uint32_t))

#define RTE_ACL_MAX_LEVELS 64
#define RTE_ACL_MAX_FIELDS 64

union rte_acl_field_types {
    uint8_t  u8;
    uint16_t u16;
    uint32_t u32;
    uint64_t u64;
};

enum {
    RTE_ACL_FIELD_TYPE_MASK = 0,
    RTE_ACL_FIELD_TYPE_RANGE,
    RTE_ACL_FIELD_TYPE_BITMASK
};

struct rte_acl_field_def {
    uint8_t  type;        
    uint8_t  size;        
    uint8_t  field_index; 
    uint8_t  input_index; 
    uint32_t offset;      
};

struct rte_acl_config {
    uint32_t num_categories; 
    uint32_t num_fields;     
    struct rte_acl_field_def defs[RTE_ACL_MAX_FIELDS];
    size_t max_size;
};

struct rte_acl_field {
    union rte_acl_field_types value;
    union rte_acl_field_types mask_range;
};

enum {
    RTE_ACL_TYPE_SHIFT = 29,
    RTE_ACL_MAX_INDEX = RTE_LEN2MASK(RTE_ACL_TYPE_SHIFT, uint32_t),
    RTE_ACL_MAX_PRIORITY = RTE_ACL_MAX_INDEX,
    RTE_ACL_MIN_PRIORITY = 1,
};

#define RTE_ACL_MASKLEN_TO_BITMASK(v, s)    \
((v) == 0 ? (v) : (typeof(v))((uint64_t)-1 << ((s) * CHAR_BIT - (v))))

struct rte_acl_rule_data {
    uint32_t category_mask; 
    int32_t  priority;      
    uint32_t userdata;      
};

#define RTE_ACL_RULE_DEF(name, fld_num) struct name {\
    struct rte_acl_rule_data data;               \
    struct rte_acl_field field[fld_num];         \
}

RTE_ACL_RULE_DEF(rte_acl_rule,);

#define RTE_ACL_RULE_SZ(fld_num)    \
    (sizeof(struct rte_acl_rule) + sizeof(struct rte_acl_field) * (fld_num))


#define RTE_ACL_NAMESIZE        32

struct rte_acl_param {
    const char *name;         
    int         socket_id;    
    uint32_t    rule_size;    
    uint32_t    max_rule_num; 
};


struct rte_acl_ctx *
rte_acl_create(const struct rte_acl_param *param);

struct rte_acl_ctx *
rte_acl_find_existing(const char *name);

void
rte_acl_free(struct rte_acl_ctx *ctx);

int
rte_acl_add_rules(struct rte_acl_ctx *ctx, const struct rte_acl_rule *rules,
    uint32_t num);

void
rte_acl_reset_rules(struct rte_acl_ctx *ctx);

int
rte_acl_build(struct rte_acl_ctx *ctx, const struct rte_acl_config *cfg);

void
rte_acl_reset(struct rte_acl_ctx *ctx);

enum rte_acl_classify_alg {
    RTE_ACL_CLASSIFY_DEFAULT = 0,
    RTE_ACL_CLASSIFY_SCALAR = 1,  
    RTE_ACL_CLASSIFY_SSE = 2,     
    RTE_ACL_CLASSIFY_AVX2 = 3,    
    RTE_ACL_CLASSIFY_NEON = 4,    
    RTE_ACL_CLASSIFY_ALTIVEC = 5,    
    RTE_ACL_CLASSIFY_AVX512X16 = 6,  
    RTE_ACL_CLASSIFY_AVX512X32 = 7,  
};

extern int
rte_acl_classify(const struct rte_acl_ctx *ctx,
         const uint8_t **data,
         uint32_t *results, uint32_t num,
         uint32_t categories);

extern int
rte_acl_classify_alg(const struct rte_acl_ctx *ctx,
         const uint8_t **data,
         uint32_t *results, uint32_t num,
         uint32_t categories,
         enum rte_acl_classify_alg alg);

/*
 * Override the default classifier function for a given ACL context.
 * @param ctx
 *   ACL context to change classify function for.
 * @param alg
 *   New default classify algorithm for given ACL context.
 *   It is the caller responsibility to ensure that the value refers to the
 *   existing algorithm, and that it could be run on the given CPU.
 *   The max SIMD bitwidth value in EAL must also allow for the chosen algorithm.
 * @return
 *   - -EINVAL if the parameters are invalid.
 *   - -ENOTSUP requested algorithm is not supported by given platform.
 *   - Zero if operation completed successfully.
 */
extern int
rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx,
    enum rte_acl_classify_alg alg);

void
rte_acl_dump(const struct rte_acl_ctx *ctx);

void
rte_acl_list_dump(void);

#ifdef __cplusplus
}
#endif

#endif /* _RTE_ACL_H_ */