rte_cryptodev.h

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/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2015-2020 Intel Corporation.
 */

#ifndef _RTE_CRYPTODEV_H_
#define _RTE_CRYPTODEV_H_

#ifdef __cplusplus
extern "C" {
#endif

#include "rte_kvargs.h"
#include "rte_crypto.h"
#include "rte_dev.h"
#include <rte_common.h>
#include <rte_config.h>

#include "rte_cryptodev_trace_fp.h"

extern const char **rte_cyptodev_names;

/* Logging Macros */

#define CDEV_LOG_ERR(...) \
    RTE_LOG(ERR, CRYPTODEV, \
        RTE_FMT("%s() line %u: " RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
            __func__, __LINE__, RTE_FMT_TAIL(__VA_ARGS__,)))

#define CDEV_LOG_INFO(...) \
    RTE_LOG(INFO, CRYPTODEV, \
        RTE_FMT(RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
            RTE_FMT_TAIL(__VA_ARGS__,)))

#define CDEV_LOG_DEBUG(...) \
    RTE_LOG(DEBUG, CRYPTODEV, \
        RTE_FMT("%s() line %u: " RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
            __func__, __LINE__, RTE_FMT_TAIL(__VA_ARGS__,)))

#define CDEV_PMD_TRACE(...) \
    RTE_LOG(DEBUG, CRYPTODEV, \
        RTE_FMT("[%s] %s: " RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
            dev, __func__, RTE_FMT_TAIL(__VA_ARGS__,)))

#define rte_crypto_op_ctod_offset(c, t, o)  \
    ((t)((char *)(c) + (o)))

#define rte_crypto_op_ctophys_offset(c, o)  \
    (rte_iova_t)((c)->phys_addr + (o))

struct rte_crypto_param_range {
    uint16_t min;   
    uint16_t max;   
    uint16_t increment;
};

struct rte_cryptodev_symmetric_capability {
    enum rte_crypto_sym_xform_type xform_type;
    RTE_STD_C11
    union {
        struct {
            enum rte_crypto_auth_algorithm algo;
            uint16_t block_size;
            struct rte_crypto_param_range key_size;
            struct rte_crypto_param_range digest_size;
            struct rte_crypto_param_range aad_size;
            struct rte_crypto_param_range iv_size;
        } auth;
        struct {
            enum rte_crypto_cipher_algorithm algo;
            uint16_t block_size;
            struct rte_crypto_param_range key_size;
            struct rte_crypto_param_range iv_size;
        } cipher;
        struct {
            enum rte_crypto_aead_algorithm algo;
            uint16_t block_size;
            struct rte_crypto_param_range key_size;
            struct rte_crypto_param_range digest_size;
            struct rte_crypto_param_range aad_size;
            struct rte_crypto_param_range iv_size;
        } aead;
    };
};

struct rte_cryptodev_asymmetric_xform_capability {
    enum rte_crypto_asym_xform_type xform_type;
    uint32_t op_types;
    __extension__
    union {
        struct rte_crypto_param_range modlen;
    };
};

struct rte_cryptodev_asymmetric_capability {
    struct rte_cryptodev_asymmetric_xform_capability xform_capa;
};


struct rte_cryptodev_capabilities {
    enum rte_crypto_op_type op;
    RTE_STD_C11
    union {
        struct rte_cryptodev_symmetric_capability sym;
        struct rte_cryptodev_asymmetric_capability asym;
    };
};

struct rte_cryptodev_sym_capability_idx {
    enum rte_crypto_sym_xform_type type;
    union {
        enum rte_crypto_cipher_algorithm cipher;
        enum rte_crypto_auth_algorithm auth;
        enum rte_crypto_aead_algorithm aead;
    } algo;
};

struct rte_cryptodev_asym_capability_idx {
    enum rte_crypto_asym_xform_type type;
};

const struct rte_cryptodev_symmetric_capability *
rte_cryptodev_sym_capability_get_v20(uint8_t dev_id,
        const struct rte_cryptodev_sym_capability_idx *idx);

const struct rte_cryptodev_symmetric_capability *
rte_cryptodev_sym_capability_get_v21(uint8_t dev_id,
        const struct rte_cryptodev_sym_capability_idx *idx);

const struct rte_cryptodev_symmetric_capability *
rte_cryptodev_sym_capability_get(uint8_t dev_id,
        const struct rte_cryptodev_sym_capability_idx *idx);

__rte_experimental
const struct rte_cryptodev_asymmetric_xform_capability *
rte_cryptodev_asym_capability_get(uint8_t dev_id,
        const struct rte_cryptodev_asym_capability_idx *idx);

int
rte_cryptodev_sym_capability_check_cipher(
        const struct rte_cryptodev_symmetric_capability *capability,
        uint16_t key_size, uint16_t iv_size);

int
rte_cryptodev_sym_capability_check_auth(
        const struct rte_cryptodev_symmetric_capability *capability,
        uint16_t key_size, uint16_t digest_size, uint16_t iv_size);

int
rte_cryptodev_sym_capability_check_aead(
        const struct rte_cryptodev_symmetric_capability *capability,
        uint16_t key_size, uint16_t digest_size, uint16_t aad_size,
        uint16_t iv_size);

__rte_experimental
int
rte_cryptodev_asym_xform_capability_check_optype(
    const struct rte_cryptodev_asymmetric_xform_capability *capability,
        enum rte_crypto_asym_op_type op_type);

__rte_experimental
int
rte_cryptodev_asym_xform_capability_check_modlen(
    const struct rte_cryptodev_asymmetric_xform_capability *capability,
        uint16_t modlen);

int
rte_cryptodev_get_cipher_algo_enum(enum rte_crypto_cipher_algorithm *algo_enum,
        const char *algo_string);

int
rte_cryptodev_get_auth_algo_enum(enum rte_crypto_auth_algorithm *algo_enum,
        const char *algo_string);

int
rte_cryptodev_get_aead_algo_enum(enum rte_crypto_aead_algorithm *algo_enum,
        const char *algo_string);

__rte_experimental
int
rte_cryptodev_asym_get_xform_enum(enum rte_crypto_asym_xform_type *xform_enum,
        const char *xform_string);


#define RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() \
    { RTE_CRYPTO_OP_TYPE_UNDEFINED }


#define RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO       (1ULL << 0)

#define RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO      (1ULL << 1)

#define RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING     (1ULL << 2)

#define RTE_CRYPTODEV_FF_CPU_SSE            (1ULL << 3)

#define RTE_CRYPTODEV_FF_CPU_AVX            (1ULL << 4)

#define RTE_CRYPTODEV_FF_CPU_AVX2           (1ULL << 5)

#define RTE_CRYPTODEV_FF_CPU_AESNI          (1ULL << 6)

#define RTE_CRYPTODEV_FF_HW_ACCELERATED         (1ULL << 7)

#define RTE_CRYPTODEV_FF_CPU_AVX512         (1ULL << 8)

#define RTE_CRYPTODEV_FF_IN_PLACE_SGL           (1ULL << 9)

#define RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT     (1ULL << 10)

#define RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT      (1ULL << 11)

#define RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT      (1ULL << 12)

#define RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT       (1ULL << 13)

#define RTE_CRYPTODEV_FF_CPU_NEON           (1ULL << 14)

#define RTE_CRYPTODEV_FF_CPU_ARM_CE         (1ULL << 15)

#define RTE_CRYPTODEV_FF_SECURITY           (1ULL << 16)

#define RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_EXP        (1ULL << 17)

#define RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT     (1ULL << 18)

#define RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED       (1ULL << 19)

#define RTE_CRYPTODEV_FF_ASYM_SESSIONLESS       (1ULL << 20)

#define RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO         (1ULL << 21)

#define RTE_CRYPTODEV_FF_SYM_SESSIONLESS        (1ULL << 22)

#define RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA      (1ULL << 23)

extern const char *
rte_cryptodev_get_feature_name(uint64_t flag);

struct rte_cryptodev_info {
    const char *driver_name;    
    uint8_t driver_id;      
    struct rte_device *device;  
    uint64_t feature_flags;
    const struct rte_cryptodev_capabilities *capabilities;
    unsigned max_nb_queue_pairs;
    uint16_t min_mbuf_headroom_req;
    uint16_t min_mbuf_tailroom_req;
    struct {
        unsigned max_nb_sessions;
    } sym;
};

#define RTE_CRYPTODEV_DETACHED  (0)
#define RTE_CRYPTODEV_ATTACHED  (1)

enum rte_cryptodev_event_type {
    RTE_CRYPTODEV_EVENT_UNKNOWN,    
    RTE_CRYPTODEV_EVENT_ERROR,  
    RTE_CRYPTODEV_EVENT_MAX     
};

struct rte_cryptodev_qp_conf {
    uint32_t nb_descriptors; 
    struct rte_mempool *mp_session;
    struct rte_mempool *mp_session_private;
};

typedef void (*rte_cryptodev_cb_fn)(uint8_t dev_id,
        enum rte_cryptodev_event_type event, void *cb_arg);


struct rte_cryptodev_stats {
    uint64_t enqueued_count;
    uint64_t dequeued_count;
    uint64_t enqueue_err_count;
    uint64_t dequeue_err_count;
};

#define RTE_CRYPTODEV_NAME_MAX_LEN  (64)

extern int
rte_cryptodev_get_dev_id(const char *name);

extern const char *
rte_cryptodev_name_get(uint8_t dev_id);

extern uint8_t
rte_cryptodev_count(void);

extern uint8_t
rte_cryptodev_device_count_by_driver(uint8_t driver_id);

uint8_t
rte_cryptodev_devices_get(const char *driver_name, uint8_t *devices,
        uint8_t nb_devices);
/*
 * Return the NUMA socket to which a device is connected
 *
 * @param dev_id
 *   The identifier of the device
 * @return
 *   The NUMA socket id to which the device is connected or
 *   a default of zero if the socket could not be determined.
 *   -1 if returned is the dev_id value is out of range.
 */
extern int
rte_cryptodev_socket_id(uint8_t dev_id);

struct rte_cryptodev_config {
    int socket_id;          
    uint16_t nb_queue_pairs;
    uint64_t ff_disable;
};

extern int
rte_cryptodev_configure(uint8_t dev_id, struct rte_cryptodev_config *config);

extern int
rte_cryptodev_start(uint8_t dev_id);

extern void
rte_cryptodev_stop(uint8_t dev_id);

extern int
rte_cryptodev_close(uint8_t dev_id);

extern int
rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pair_id,
        const struct rte_cryptodev_qp_conf *qp_conf, int socket_id);

__rte_experimental
int
rte_cryptodev_get_qp_status(uint8_t dev_id, uint16_t queue_pair_id);

extern uint16_t
rte_cryptodev_queue_pair_count(uint8_t dev_id);


extern int
rte_cryptodev_stats_get(uint8_t dev_id, struct rte_cryptodev_stats *stats);

extern void
rte_cryptodev_stats_reset(uint8_t dev_id);

void
rte_cryptodev_info_get(uint8_t dev_id, struct rte_cryptodev_info *dev_info);

/* An extra element RTE_CRYPTO_AEAD_CHACHA20_POLY1305 is added
 * to enum rte_crypto_aead_algorithm, also changing the value of
 *  RTE_CRYPTO_AEAD_LIST_END. To maintain ABI compatibility with applications
 * which linked against earlier versions, preventing them, for example, from
 * picking up the new value and using it to index into an array sized too small
 * for it, it is necessary to have two versions of rte_cryptodev_info_get()
 * The latest version just returns directly the capabilities retrieved from
 * the device. The compatible version inspects the capabilities retrieved
 * from the device, but only returns them directly if the new value
 * is not included. If the new value is included, it allocates space
 * for a copy of the device capabilities, trims the new value from this
 * and returns this copy. It only needs to do this once per device.
 * For the corner case of a corner case when the alloc may fail,
 * an empty capability list is returned, as there is no mechanism to return
 * an error and adding such a mechanism would itself be an ABI breakage.
 * The compatible version can be removed after the next major ABI release.
 */

void
rte_cryptodev_info_get_v20(uint8_t dev_id, struct rte_cryptodev_info *dev_info);

void
rte_cryptodev_info_get_v21(uint8_t dev_id, struct rte_cryptodev_info *dev_info);

extern int
rte_cryptodev_callback_register(uint8_t dev_id,
        enum rte_cryptodev_event_type event,
        rte_cryptodev_cb_fn cb_fn, void *cb_arg);

extern int
rte_cryptodev_callback_unregister(uint8_t dev_id,
        enum rte_cryptodev_event_type event,
        rte_cryptodev_cb_fn cb_fn, void *cb_arg);


typedef uint16_t (*dequeue_pkt_burst_t)(void *qp,
        struct rte_crypto_op **ops, uint16_t nb_ops);
typedef uint16_t (*enqueue_pkt_burst_t)(void *qp,
        struct rte_crypto_op **ops, uint16_t nb_ops);
struct rte_cryptodev_callback;

TAILQ_HEAD(rte_cryptodev_cb_list, rte_cryptodev_callback);

struct rte_cryptodev {
    dequeue_pkt_burst_t dequeue_burst;
    enqueue_pkt_burst_t enqueue_burst;
    struct rte_cryptodev_data *data;
    struct rte_cryptodev_ops *dev_ops;
    uint64_t feature_flags;
    struct rte_device *device;
    uint8_t driver_id;
    struct rte_cryptodev_cb_list link_intr_cbs;
    void *security_ctx;
    __extension__
    uint8_t attached : 1;
} __rte_cache_aligned;

void *
rte_cryptodev_get_sec_ctx(uint8_t dev_id);

struct rte_cryptodev_data {
    uint8_t dev_id;
    uint8_t socket_id;
    char name[RTE_CRYPTODEV_NAME_MAX_LEN];
    __extension__
    uint8_t dev_started : 1;
    struct rte_mempool *session_pool;
    void **queue_pairs;
    uint16_t nb_queue_pairs;
    void *dev_private;
} __rte_cache_aligned;

extern struct rte_cryptodev *rte_cryptodevs;
static inline uint16_t
rte_cryptodev_dequeue_burst(uint8_t dev_id, uint16_t qp_id,
        struct rte_crypto_op **ops, uint16_t nb_ops)
{
    struct rte_cryptodev *dev = &rte_cryptodevs[dev_id];

    nb_ops = (*dev->dequeue_burst)
            (dev->data->queue_pairs[qp_id], ops, nb_ops);

    rte_cryptodev_trace_dequeue_burst(dev_id, qp_id, (void **)ops, nb_ops);
    return nb_ops;
}

static inline uint16_t
rte_cryptodev_enqueue_burst(uint8_t dev_id, uint16_t qp_id,
        struct rte_crypto_op **ops, uint16_t nb_ops)
{
    struct rte_cryptodev *dev = &rte_cryptodevs[dev_id];

    rte_cryptodev_trace_enqueue_burst(dev_id, qp_id, (void **)ops, nb_ops);
    return (*dev->enqueue_burst)(
            dev->data->queue_pairs[qp_id], ops, nb_ops);
}


struct rte_cryptodev_sym_session {
    uint64_t opaque_data;
    uint16_t nb_drivers;
    uint16_t user_data_sz;
    __extension__ struct {
        void *data;
        uint16_t refcnt;
    } sess_data[0];
};

struct rte_cryptodev_asym_session {
    __extension__ void *sess_private_data[0];
};

__rte_experimental
struct rte_mempool *
rte_cryptodev_sym_session_pool_create(const char *name, uint32_t nb_elts,
    uint32_t elt_size, uint32_t cache_size, uint16_t priv_size,
    int socket_id);

struct rte_cryptodev_sym_session *
rte_cryptodev_sym_session_create(struct rte_mempool *mempool);

__rte_experimental
struct rte_cryptodev_asym_session *
rte_cryptodev_asym_session_create(struct rte_mempool *mempool);

int
rte_cryptodev_sym_session_free(struct rte_cryptodev_sym_session *sess);

__rte_experimental
int
rte_cryptodev_asym_session_free(struct rte_cryptodev_asym_session *sess);

int
rte_cryptodev_sym_session_init(uint8_t dev_id,
            struct rte_cryptodev_sym_session *sess,
            struct rte_crypto_sym_xform *xforms,
            struct rte_mempool *mempool);

__rte_experimental
int
rte_cryptodev_asym_session_init(uint8_t dev_id,
            struct rte_cryptodev_asym_session *sess,
            struct rte_crypto_asym_xform *xforms,
            struct rte_mempool *mempool);

int
rte_cryptodev_sym_session_clear(uint8_t dev_id,
            struct rte_cryptodev_sym_session *sess);

__rte_experimental
int
rte_cryptodev_asym_session_clear(uint8_t dev_id,
            struct rte_cryptodev_asym_session *sess);

unsigned int
rte_cryptodev_sym_get_header_session_size(void);

__rte_experimental
unsigned int
rte_cryptodev_sym_get_existing_header_session_size(
        struct rte_cryptodev_sym_session *sess);

__rte_experimental
unsigned int
rte_cryptodev_asym_get_header_session_size(void);

unsigned int
rte_cryptodev_sym_get_private_session_size(uint8_t dev_id);

__rte_experimental
unsigned int
rte_cryptodev_asym_get_private_session_size(uint8_t dev_id);

int rte_cryptodev_driver_id_get(const char *name);

const char *rte_cryptodev_driver_name_get(uint8_t driver_id);

__rte_experimental
int
rte_cryptodev_sym_session_set_user_data(
                    struct rte_cryptodev_sym_session *sess,
                    void *data,
                    uint16_t size);

__rte_experimental
void *
rte_cryptodev_sym_session_get_user_data(
                    struct rte_cryptodev_sym_session *sess);

__rte_experimental
uint32_t
rte_cryptodev_sym_cpu_crypto_process(uint8_t dev_id,
    struct rte_cryptodev_sym_session *sess, union rte_crypto_sym_ofs ofs,
    struct rte_crypto_sym_vec *vec);

#ifdef __cplusplus
}
#endif

#endif /* _RTE_CRYPTODEV_H_ */