21. MLX5 poll mode driver

The MLX5 poll mode driver library (librte_pmd_mlx5) provides support for Mellanox ConnectX-4, Mellanox ConnectX-4 Lx , Mellanox ConnectX-5 and Mellanox Bluefield families of 10/25/40/50/100 Gb/s adapters as well as their virtual functions (VF) in SR-IOV context.

Information and documentation about these adapters can be found on the Mellanox website. Help is also provided by the Mellanox community.

There is also a section dedicated to this poll mode driver.

Note

Due to external dependencies, this driver is disabled by default. It must be enabled manually by setting CONFIG_RTE_LIBRTE_MLX5_PMD=y and recompiling DPDK.

21.1. Implementation details

Besides its dependency on libibverbs (that implies libmlx5 and associated kernel support), librte_pmd_mlx5 relies heavily on system calls for control operations such as querying/updating the MTU and flow control parameters.

For security reasons and robustness, this driver only deals with virtual memory addresses. The way resources allocations are handled by the kernel combined with hardware specifications that allow it to handle virtual memory addresses directly ensure that DPDK applications cannot access random physical memory (or memory that does not belong to the current process).

This capability allows the PMD to coexist with kernel network interfaces which remain functional, although they stop receiving unicast packets as long as they share the same MAC address. This means legacy linux control tools (for example: ethtool, ifconfig and more) can operate on the same network interfaces that owned by the DPDK application.

Enabling librte_pmd_mlx5 causes DPDK applications to be linked against libibverbs.

21.2. Features

  • Multi arch support: x86_64, POWER8, ARMv8.
  • Multiple TX and RX queues.
  • Support for scattered TX and RX frames.
  • IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
  • Several RSS hash keys, one for each flow type.
  • Configurable RETA table.
  • Support for multiple MAC addresses.
  • VLAN filtering.
  • RX VLAN stripping.
  • TX VLAN insertion.
  • RX CRC stripping configuration.
  • Promiscuous mode.
  • Multicast promiscuous mode.
  • Hardware checksum offloads.
  • Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and RTE_ETH_FDIR_REJECT).
  • Flow API.
  • Multiple process.
  • KVM and VMware ESX SR-IOV modes are supported.
  • RSS hash result is supported.
  • Hardware TSO.
  • Hardware checksum TX offload for VXLAN and GRE.
  • RX interrupts.
  • Statistics query including Basic, Extended and per queue.
  • Rx HW timestamp.

21.3. Limitations

  • Inner RSS for VXLAN frames is not supported yet.

  • Port statistics through software counters only. Flow statistics are supported by hardware counters.

  • Hardware checksum RX offloads for VXLAN inner header are not supported yet.

  • For secondary process:

    • Forked secondary process not supported.
    • All mempools must be initialized before rte_eth_dev_start().

  • Flow pattern without any specific vlan will match for vlan packets as well:

    When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card. Meaning, the flow rule:

    flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...

    Will only match vlan packets with vid=3. and the flow rules:

    flow create 0 ingress pattern eth / ipv4 / end ...

    Or:

    flow create 0 ingress pattern eth / vlan / ipv4 / end ...

    Will match any ipv4 packet (VLAN included).

  • A multi segment packet must have less than 6 segments in case the Tx burst function is set to multi-packet send or Enhanced multi-packet send. Otherwise it must have less than 50 segments.

  • Count action for RTE flow is only supported in Mellanox OFED 4.2.

  • Flows with a VXLAN Network Identifier equal (or ends to be equal) to 0 are not supported.

  • VXLAN TSO and checksum offloads are not supported on VM.

21.4. Configuration

21.4.1. Compilation options

These options can be modified in the .config file.

  • CONFIG_RTE_LIBRTE_MLX5_PMD (default n)

    Toggle compilation of librte_pmd_mlx5 itself.

  • CONFIG_RTE_LIBRTE_MLX5_DEBUG (default n)

    Toggle debugging code and stricter compilation flags. Enabling this option adds additional run-time checks and debugging messages at the cost of lower performance.

  • CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE (default 8)

    Maximum number of cached memory pools (MPs) per TX queue. Each MP from which buffers are to be transmitted must be associated to memory regions (MRs). This is a slow operation that must be cached.

    This value is always 1 for RX queues since they use a single MP.

21.4.2. Environment variables

  • MLX5_PMD_ENABLE_PADDING

    Enables HW packet padding in PCI bus transactions.

    When packet size is cache aligned and CRC stripping is enabled, 4 fewer bytes are written to the PCI bus. Enabling padding makes such packets aligned again.

    In cases where PCI bandwidth is the bottleneck, padding can improve performance by 10%.

    This is disabled by default since this can also decrease performance for unaligned packet sizes.

  • MLX5_SHUT_UP_BF

    Configures HW Tx doorbell register as IO-mapped.

    By default, the HW Tx doorbell is configured as a write-combining register. The register would be flushed to HW usually when the write-combining buffer becomes full, but it depends on CPU design.

    Except for vectorized Tx burst routines, a write memory barrier is enforced after updating the register so that the update can be immediately visible to HW.

    When vectorized Tx burst is called, the barrier is set only if the burst size is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental variable will bring better latency even though the maximum throughput can slightly decline.

21.4.3. Run-time configuration

  • librte_pmd_mlx5 brings kernel network interfaces up during initialization because it is affected by their state. Forcing them down prevents packets reception.

  • ethtool operations on related kernel interfaces also affect the PMD.

  • rxq_cqe_comp_en parameter [int]

    A nonzero value enables the compression of CQE on RX side. This feature allows to save PCI bandwidth and improve performance. Enabled by default.

    Supported on:

    • x86_64 with ConnectX-4, ConnectX-4 LX, ConnectX-5 and Bluefield.
    • POWER8 and ARMv8 with ConnectX-4 LX, ConnectX-5 and Bluefield.

  • txq_inline parameter [int]

    Amount of data to be inlined during TX operations. Improves latency. Can improve PPS performance when PCI back pressure is detected and may be useful for scenarios involving heavy traffic on many queues.

    Because additional software logic is necessary to handle this mode, this option should be used with care, as it can lower performance when back pressure is not expected.

  • txqs_min_inline parameter [int]

    Enable inline send only when the number of TX queues is greater or equal to this value.

    This option should be used in combination with txq_inline above.

    On ConnectX-4, ConnectX-4 LX, ConnectX-5 and Bluefield without Enhanced MPW:

    • Disabled by default.
    • In case txq_inline is set recommendation is 4.

    On ConnectX-5 and Bluefield with Enhanced MPW:

    • Set to 8 by default.

  • txqs_max_vec parameter [int]

    Enable vectorized Tx only when the number of TX queues is less than or equal to this value. Effective only when tx_vec_en is enabled.

    On ConnectX-5:

    • Set to 8 by default on ARMv8.
    • Set to 4 by default otherwise.

    On Bluefield

    • Set to 16 by default.

  • txq_mpw_en parameter [int]

    A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and enhanced multi-packet send (Enhanced MPS) for ConnectX-5 and Bluefield. MPS allows the TX burst function to pack up multiple packets in a single descriptor session in order to save PCI bandwidth and improve performance at the cost of a slightly higher CPU usage. When txq_inline is set along with txq_mpw_en, TX burst function tries to copy entire packet data on to TX descriptor instead of including pointer of packet only if there is enough room remained in the descriptor. txq_inline sets per-descriptor space for either pointers or inlined packets. In addition, Enhanced MPS supports hybrid mode - mixing inlined packets and pointers in the same descriptor.

    This option cannot be used in conjunction with tso below. When tso is set, txq_mpw_en is disabled.

    It is currently only supported on the ConnectX-4 Lx, ConnectX-5 and Bluefield families of adapters. On ConnectX-4 Lx the MPW is considered un-secure hence disabled by default. Users which enable the MPW should be aware that application which provides incorrect mbuf descriptors in the Tx burst can lead to serious errors in the host including, on some cases, NIC to get stuck. On ConnectX-5 and Bluefield the MPW is secure and enabled by default.

  • txq_mpw_hdr_dseg_en parameter [int]

    A nonzero value enables including two pointers in the first block of TX descriptor. This can be used to lessen CPU load for memory copy.

    Effective only when Enhanced MPS is supported. Disabled by default.

  • txq_max_inline_len parameter [int]

    Maximum size of packet to be inlined. This limits the size of packet to be inlined. If the size of a packet is larger than configured value, the packet isn’t inlined even though there’s enough space remained in the descriptor. Instead, the packet is included with pointer.

    Effective only when Enhanced MPS is supported. The default value is 256.

  • tso parameter [int]

    A nonzero value enables hardware TSO. When hardware TSO is enabled, packets marked with TCP segmentation offload will be divided into segments by the hardware. Disabled by default.

  • tx_vec_en parameter [int]

    A nonzero value enables Tx vector on ConnectX-5 and Bluefield NICs if the number of global Tx queues on the port is less than txqs_max_vec.

    Enabled by default on ConnectX-5 and Bluefield.

  • rx_vec_en parameter [int]

    A nonzero value enables Rx vector if the port is not configured in multi-segment otherwise this parameter is ignored.

    Enabled by default.

21.5. Prerequisites

This driver relies on external libraries and kernel drivers for resources allocations and initialization. The following dependencies are not part of DPDK and must be installed separately:

  • libibverbs

    User space Verbs framework used by librte_pmd_mlx5. This library provides a generic interface between the kernel and low-level user space drivers such as libmlx5.

    It allows slow and privileged operations (context initialization, hardware resources allocations) to be managed by the kernel and fast operations to never leave user space.

  • libmlx5

    Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5/Bluefield devices, it is automatically loaded by libibverbs.

    This library basically implements send/receive calls to the hardware queues.

  • Kernel modules

    They provide the kernel-side Verbs API and low level device drivers that manage actual hardware initialization and resources sharing with user space processes.

    Unlike most other PMDs, these modules must remain loaded and bound to their devices:

    • mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5/Bluefield devices and related Ethernet kernel network devices.
    • mlx5_ib: InifiniBand device driver.
    • ib_uverbs: user space driver for Verbs (entry point for libibverbs).

  • Firmware update

    Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5/Bluefield adapters.

    Because each release provides new features, these updates must be applied to match the kernel modules and libraries they come with.

Note

Both libraries are BSD and GPL licensed. Linux kernel modules are GPL licensed.

21.5.1. Installation

Either RDMA Core library with a recent enough Linux kernel release (recommended) or Mellanox OFED, which provides compatibility with older releases.

21.5.1.1. RDMA Core with Linux Kernel

21.5.1.2. Mellanox OFED

  • Mellanox OFED version: 4.2.
  • firmware version:
    • ConnectX-4: 12.21.1000 and above.
    • ConnectX-4 Lx: 14.21.1000 and above.
    • ConnectX-5: 16.21.1000 and above.
    • ConnectX-5 Ex: 16.21.1000 and above.
    • Bluefield: 18.99.3950 and above.

While these libraries and kernel modules are available on OpenFabrics Alliance’s website and provided by package managers on most distributions, this PMD requires Ethernet extensions that may not be supported at the moment (this is a work in progress).

Mellanox OFED includes the necessary support and should be used in the meantime. For DPDK, only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are required from that distribution.

Note

Several versions of Mellanox OFED are available. Installing the version this DPDK release was developed and tested against is strongly recommended. Please check the prerequisites.

21.6. Supported NICs

  • Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
  • Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
  • Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
  • Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
  • Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
  • Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
  • Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
  • Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
  • Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
  • Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
  • Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
  • Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
  • Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
  • Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
  • Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
  • Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
  • Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
  • Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
  • Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)

21.7. Quick Start Guide on OFED

  1. Download latest Mellanox OFED. For more info check the prerequisites.

  2. Install the required libraries and kernel modules either by installing only the required set, or by installing the entire Mellanox OFED:

    ./mlnxofedinstall --upstream-libs --dpdk

  3. Verify the firmware is the correct one:

    ibv_devinfo

  4. Verify all ports links are set to Ethernet:

    mlxconfig -d <mst device> query | grep LINK_TYPE
LINK_TYPE_P1                        ETH(2)
LINK_TYPE_P2                        ETH(2)

    Link types may have to be configured to Ethernet:

    mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3

* LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)

    For hypervisors verify SR-IOV is enabled on the NIC:

    mlxconfig -d <mst device> query | grep SRIOV_EN
SRIOV_EN                            True(1)

    If needed, set enable the set the relevant fields:

    mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
mlxfwreset -d <mst device> reset

  5. Restart the driver:

    /etc/init.d/openibd restart

    or:

    service openibd restart

    If link type was changed, firmware must be reset as well:

    mlxfwreset -d <mst device> reset

    For hypervisors, after reset write the sysfs number of virtual functions needed for the PF.

    To dynamically instantiate a given number of virtual functions (VFs):

    echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs

  6. Compile DPDK and you are ready to go. See instructions on Development Kit Build System

21.8. Performance tuning

  1. Configure aggressive CQE Zipping for maximum performance:
mlxconfig -d <mst device> s CQE_COMPRESSION=1

To set it back to the default CQE Zipping mode use:

mlxconfig -d <mst device> s CQE_COMPRESSION=0

  1. In case of virtualization:

    • Make sure that hypervisor kernel is 3.16 or newer.
    • Configure boot with iommu=pt.
    • Use 1G huge pages.
    • Make sure to allocate a VM on huge pages.
    • Make sure to set CPU pinning.

  2. Use the CPU near local NUMA node to which the PCIe adapter is connected, for better performance. For VMs, verify that the right CPU and NUMA node are pinned according to the above. Run:

    lstopo-no-graphics

    to identify the NUMA node to which the PCIe adapter is connected.

  3. If more than one adapter is used, and root complex capabilities allow to put both adapters on the same NUMA node without PCI bandwidth degradation, it is recommended to locate both adapters on the same NUMA node. This in order to forward packets from one to the other without NUMA performance penalty.

  4. Disable pause frames:

    ethtool -A <netdev> rx off tx off

  5. Verify IO non-posted prefetch is disabled by default. This can be checked via the BIOS configuration. Please contact you server provider for more information about the settings.

Note

On some machines, depends on the machine integrator, it is beneficial to set the PCI max read request parameter to 1K. This can be done in the following way:

To query the read request size use:

setpci -s <NIC PCI address> 68.w

If the output is different than 3XXX, set it by:

setpci -s <NIC PCI address> 68.w=3XXX

The XXX can be different on different systems. Make sure to configure according to the setpci output.

21.9. Notes for testpmd

Compared to librte_pmd_mlx4 that implements a single RSS configuration per port, librte_pmd_mlx5 supports per-protocol RSS configuration.

Since testpmd defaults to IP RSS mode and there is currently no command-line parameter to enable additional protocols (UDP and TCP as well as IP), the following commands must be entered from its CLI to get the same behavior as librte_pmd_mlx4:

> port stop all
> port config all rss all
> port start all

21.10. Usage example

This section demonstrates how to launch testpmd with Mellanox ConnectX-4/ConnectX-5/Bluefield devices managed by librte_pmd_mlx5.

  1. Load the kernel modules:

    modprobe -a ib_uverbs mlx5_core mlx5_ib

    Alternatively if MLNX_OFED is fully installed, the following script can be run:

    /etc/init.d/openibd restart

    Note

    User space I/O kernel modules (uio and igb_uio) are not used and do not have to be loaded.

  2. Make sure Ethernet interfaces are in working order and linked to kernel verbs. Related sysfs entries should be present:

    ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5

    Example output:

    eth30
eth31
eth32
eth33

  3. Optionally, retrieve their PCI bus addresses for whitelisting:

    {
    for intf in eth2 eth3 eth4 eth5;
    do
        (cd "/sys/class/net/${intf}/device/" && pwd -P);
    done;
} |
sed -n 's,.*/\(.*\),-w \1,p'

    Example output:

    -w 0000:05:00.1
-w 0000:06:00.0
-w 0000:06:00.1
-w 0000:05:00.0

  4. Request huge pages:

    echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages

  5. Start testpmd with basic parameters:

    testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i

    Example output:

    [...]
EAL: PCI device 0000:05:00.0 on NUMA socket 0
EAL:   probe driver: 15b3:1013 librte_pmd_mlx5
PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
PMD: librte_pmd_mlx5: 1 port(s) detected
PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
EAL: PCI device 0000:05:00.1 on NUMA socket 0
EAL:   probe driver: 15b3:1013 librte_pmd_mlx5
PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
PMD: librte_pmd_mlx5: 1 port(s) detected
PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
EAL: PCI device 0000:06:00.0 on NUMA socket 0
EAL:   probe driver: 15b3:1013 librte_pmd_mlx5
PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
PMD: librte_pmd_mlx5: 1 port(s) detected
PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
EAL: PCI device 0000:06:00.1 on NUMA socket 0
EAL:   probe driver: 15b3:1013 librte_pmd_mlx5
PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
PMD: librte_pmd_mlx5: 1 port(s) detected
PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
Interactive-mode selected
Configuring Port 0 (socket 0)
PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
Port 0: E4:1D:2D:E7:0C:FE
Configuring Port 1 (socket 0)
PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
Port 1: E4:1D:2D:E7:0C:FF
Configuring Port 2 (socket 0)
PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
Port 2: E4:1D:2D:E7:0C:FA
Configuring Port 3 (socket 0)
PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
Port 3: E4:1D:2D:E7:0C:FB
Checking link statuses...
Port 0 Link Up - speed 40000 Mbps - full-duplex
Port 1 Link Up - speed 40000 Mbps - full-duplex
Port 2 Link Up - speed 10000 Mbps - full-duplex
Port 3 Link Up - speed 10000 Mbps - full-duplex
Done
testpmd>