DPDK  24.07.0
rte_dmadev_core.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2021 HiSilicon Limited
3  * Copyright(c) 2021 Intel Corporation
4  */
5 
6 #ifndef RTE_DMADEV_CORE_H
7 #define RTE_DMADEV_CORE_H
8 
21 typedef int (*rte_dma_copy_t)(void *dev_private, uint16_t vchan,
22  rte_iova_t src, rte_iova_t dst,
23  uint32_t length, uint64_t flags);
24 
26 typedef int (*rte_dma_copy_sg_t)(void *dev_private, uint16_t vchan,
27  const struct rte_dma_sge *src,
28  const struct rte_dma_sge *dst,
29  uint16_t nb_src, uint16_t nb_dst,
30  uint64_t flags);
31 
33 typedef int (*rte_dma_fill_t)(void *dev_private, uint16_t vchan,
34  uint64_t pattern, rte_iova_t dst,
35  uint32_t length, uint64_t flags);
36 
38 typedef int (*rte_dma_submit_t)(void *dev_private, uint16_t vchan);
39 
41 typedef uint16_t (*rte_dma_completed_t)(void *dev_private,
42  uint16_t vchan, const uint16_t nb_cpls,
43  uint16_t *last_idx, bool *has_error);
44 
46 typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,
47  uint16_t vchan, const uint16_t nb_cpls,
48  uint16_t *last_idx, enum rte_dma_status_code *status);
49 
51 typedef uint16_t (*rte_dma_burst_capacity_t)(const void *dev_private, uint16_t vchan);
52 
64 struct __rte_cache_aligned rte_dma_fp_object {
68  void *dev_private;
69  rte_dma_copy_t copy;
70  rte_dma_copy_sg_t copy_sg;
71  rte_dma_fill_t fill;
72  rte_dma_submit_t submit;
73  rte_dma_completed_t completed;
74  rte_dma_completed_status_t completed_status;
75  rte_dma_burst_capacity_t burst_capacity;
76 };
77 
78 extern struct rte_dma_fp_object *rte_dma_fp_objs;
79 
80 #endif /* RTE_DMADEV_CORE_H */
uint64_t rte_iova_t
Definition: rte_common.h:599
#define __rte_cache_aligned
Definition: rte_common.h:568
rte_dma_status_code
Definition: rte_dmadev.h:706
uint32_t length
Definition: rte_dmadev.h:772