DPDK  18.08.1
rte_tm.h
Go to the documentation of this file.
1 /*-
2  * BSD LICENSE
3  *
4  * Copyright(c) 2017 Intel Corporation.
5  * Copyright(c) 2017 Cavium.
6  * Copyright(c) 2017 NXP.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  *
13  * * Redistributions of source code must retain the above copyright
14  * notice, this list of conditions and the following disclaimer.
15  * * Redistributions in binary form must reproduce the above copyright
16  * notice, this list of conditions and the following disclaimer in
17  * the documentation and/or other materials provided with the
18  * distribution.
19  * * Neither the name of Intel Corporation nor the names of its
20  * contributors may be used to endorse or promote products derived
21  * from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 #ifndef __INCLUDE_RTE_TM_H__
37 #define __INCLUDE_RTE_TM_H__
38 
51 #include <stdint.h>
52 
53 #include <rte_common.h>
54 
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58 
72 #define RTE_TM_ETH_FRAMING_OVERHEAD 20
73 
84 #define RTE_TM_ETH_FRAMING_OVERHEAD_FCS 24
85 
93 #define RTE_TM_WRED_PROFILE_ID_NONE UINT32_MAX
94 
102 #define RTE_TM_SHAPER_PROFILE_ID_NONE UINT32_MAX
103 
109 #define RTE_TM_NODE_ID_NULL UINT32_MAX
110 
116 #define RTE_TM_NODE_LEVEL_ID_ANY UINT32_MAX
117 
121 enum rte_tm_color {
122  RTE_TM_GREEN = 0,
123  RTE_TM_YELLOW,
124  RTE_TM_RED,
125  RTE_TM_COLORS
126 };
127 
131 enum rte_tm_stats_type {
133  RTE_TM_STATS_N_PKTS = 1 << 0,
134 
136  RTE_TM_STATS_N_BYTES = 1 << 1,
137 
139  RTE_TM_STATS_N_PKTS_GREEN_DROPPED = 1 << 2,
140 
142  RTE_TM_STATS_N_PKTS_YELLOW_DROPPED = 1 << 3,
143 
145  RTE_TM_STATS_N_PKTS_RED_DROPPED = 1 << 4,
146 
148  RTE_TM_STATS_N_BYTES_GREEN_DROPPED = 1 << 5,
149 
151  RTE_TM_STATS_N_BYTES_YELLOW_DROPPED = 1 << 6,
152 
154  RTE_TM_STATS_N_BYTES_RED_DROPPED = 1 << 7,
155 
159  RTE_TM_STATS_N_PKTS_QUEUED = 1 << 8,
160 
164  RTE_TM_STATS_N_BYTES_QUEUED = 1 << 9,
165 };
166 
170 struct rte_tm_node_stats {
172  uint64_t n_pkts;
173 
175  uint64_t n_bytes;
176 
178  struct {
182  uint64_t n_pkts_dropped[RTE_TM_COLORS];
183 
187  uint64_t n_bytes_dropped[RTE_TM_COLORS];
188 
192  uint64_t n_pkts_queued;
193 
197  uint64_t n_bytes_queued;
198  } leaf;
199 };
200 
204 enum rte_tm_dynamic_update_type {
209  RTE_TM_UPDATE_NODE_PARENT_KEEP_LEVEL = 1 << 0,
210 
215  RTE_TM_UPDATE_NODE_PARENT_CHANGE_LEVEL = 1 << 1,
216 
218  RTE_TM_UPDATE_NODE_ADD_DELETE = 1 << 2,
219 
221  RTE_TM_UPDATE_NODE_SUSPEND_RESUME = 1 << 3,
222 
224  RTE_TM_UPDATE_NODE_WFQ_WEIGHT_MODE = 1 << 4,
225 
227  RTE_TM_UPDATE_NODE_N_SP_PRIORITIES = 1 << 5,
228 
230  RTE_TM_UPDATE_NODE_CMAN = 1 << 6,
231 
233  RTE_TM_UPDATE_NODE_STATS = 1 << 7,
234 };
235 
239 struct rte_tm_capabilities {
241  uint32_t n_nodes_max;
242 
246  uint32_t n_levels_max;
247 
251  int non_leaf_nodes_identical;
252 
256  int leaf_nodes_identical;
257 
264  uint32_t shaper_n_max;
265 
270  uint32_t shaper_private_n_max;
271 
279  int shaper_private_dual_rate_n_max;
280 
284  uint64_t shaper_private_rate_min;
285 
289  uint64_t shaper_private_rate_max;
290 
294  uint32_t shaper_shared_n_max;
295 
299  uint32_t shaper_shared_n_nodes_per_shaper_max;
300 
307  uint32_t shaper_shared_n_shapers_per_node_max;
308 
313  uint32_t shaper_shared_dual_rate_n_max;
314 
318  uint64_t shaper_shared_rate_min;
319 
323  uint64_t shaper_shared_rate_max;
324 
328  int shaper_pkt_length_adjust_min;
329 
333  int shaper_pkt_length_adjust_max;
334 
340  uint32_t sched_n_children_max;
341 
350  uint32_t sched_sp_n_priorities_max;
351 
360  uint32_t sched_wfq_n_children_per_group_max;
361 
373  uint32_t sched_wfq_n_groups_max;
374 
378  uint32_t sched_wfq_weight_max;
379 
386  int cman_wred_packet_mode_supported;
387 
394  int cman_wred_byte_mode_supported;
395 
400  int cman_head_drop_supported;
401 
409  uint32_t cman_wred_context_n_max;
410 
416  uint32_t cman_wred_context_private_n_max;
417 
421  uint32_t cman_wred_context_shared_n_max;
422 
426  uint32_t cman_wred_context_shared_n_nodes_per_context_max;
427 
435  uint32_t cman_wred_context_shared_n_contexts_per_node_max;
436 
438  int mark_vlan_dei_supported[RTE_TM_COLORS];
439 
441  int mark_ip_ecn_tcp_supported[RTE_TM_COLORS];
442 
444  int mark_ip_ecn_sctp_supported[RTE_TM_COLORS];
445 
447  int mark_ip_dscp_supported[RTE_TM_COLORS];
448 
452  uint64_t dynamic_update_mask;
453 
457  uint64_t stats_mask;
458 };
459 
463 struct rte_tm_level_capabilities {
465  uint32_t n_nodes_max;
466 
471  uint32_t n_nodes_nonleaf_max;
472 
477  uint32_t n_nodes_leaf_max;
478 
483  int non_leaf_nodes_identical;
484 
489  int leaf_nodes_identical;
490 
491  RTE_STD_C11
492  union {
494  struct {
500  int shaper_private_supported;
501 
510  int shaper_private_dual_rate_supported;
511 
517  uint64_t shaper_private_rate_min;
518 
524  uint64_t shaper_private_rate_max;
525 
534  uint32_t shaper_shared_n_max;
535 
542  uint32_t sched_n_children_max;
543 
555  uint32_t sched_sp_n_priorities_max;
556 
567  uint32_t sched_wfq_n_children_per_group_max;
568 
586  uint32_t sched_wfq_n_groups_max;
587 
593  uint32_t sched_wfq_weight_max;
594 
602  uint64_t stats_mask;
603  } nonleaf;
604 
606  struct {
612  int shaper_private_supported;
613 
621  int shaper_private_dual_rate_supported;
622 
628  uint64_t shaper_private_rate_min;
629 
635  uint64_t shaper_private_rate_max;
636 
645  uint32_t shaper_shared_n_max;
646 
654  int cman_wred_packet_mode_supported;
655 
663  int cman_wred_byte_mode_supported;
664 
671  int cman_head_drop_supported;
672 
678  int cman_wred_context_private_supported;
679 
689  uint32_t cman_wred_context_shared_n_max;
690 
698  uint64_t stats_mask;
699  } leaf;
700  };
701 };
702 
706 struct rte_tm_node_capabilities {
708  int shaper_private_supported;
709 
713  int shaper_private_dual_rate_supported;
714 
719  uint64_t shaper_private_rate_min;
720 
725  uint64_t shaper_private_rate_max;
726 
731  uint32_t shaper_shared_n_max;
732 
733  RTE_STD_C11
734  union {
736  struct {
738  uint32_t sched_n_children_max;
739 
746  uint32_t sched_sp_n_priorities_max;
747 
755  uint32_t sched_wfq_n_children_per_group_max;
756 
769  uint32_t sched_wfq_n_groups_max;
770 
775  uint32_t sched_wfq_weight_max;
776  } nonleaf;
777 
779  struct {
781  int cman_wred_packet_mode_supported;
782 
784  int cman_wred_byte_mode_supported;
785 
787  int cman_head_drop_supported;
788 
790  int cman_wred_context_private_supported;
791 
797  uint32_t cman_wred_context_shared_n_max;
798  } leaf;
799  };
800 
804  uint64_t stats_mask;
805 };
806 
823 enum rte_tm_cman_mode {
824  RTE_TM_CMAN_TAIL_DROP = 0,
825  RTE_TM_CMAN_HEAD_DROP,
826  RTE_TM_CMAN_WRED,
827 };
828 
832 struct rte_tm_red_params {
834  uint32_t min_th;
835 
837  uint32_t max_th;
838 
842  uint16_t maxp_inv;
843 
845  uint16_t wq_log2;
846 };
847 
862 struct rte_tm_wred_params {
864  struct rte_tm_red_params red_params[RTE_TM_COLORS];
865 
870  int packet_mode;
871 };
872 
876 struct rte_tm_token_bucket {
878  uint64_t rate;
879 
881  uint64_t size;
882 };
883 
902 struct rte_tm_shaper_params {
904  struct rte_tm_token_bucket committed;
905 
907  struct rte_tm_token_bucket peak;
908 
914  int32_t pkt_length_adjust;
915 };
916 
944 struct rte_tm_node_params {
949  uint32_t shaper_profile_id;
950 
952  uint32_t *shared_shaper_id;
953 
955  uint32_t n_shared_shapers;
956 
957  RTE_STD_C11
958  union {
960  struct {
967  int *wfq_weight_mode;
968 
970  uint32_t n_sp_priorities;
971  } nonleaf;
972 
974  struct {
976  enum rte_tm_cman_mode cman;
977 
981  struct {
987  uint32_t wred_profile_id;
988 
994  uint32_t *shared_wred_context_id;
995 
1001  uint32_t n_shared_wred_contexts;
1002  } wred;
1003  } leaf;
1004  };
1005 
1012  uint64_t stats_mask;
1013 };
1014 
1021 enum rte_tm_error_type {
1022  RTE_TM_ERROR_TYPE_NONE,
1023  RTE_TM_ERROR_TYPE_UNSPECIFIED,
1024  RTE_TM_ERROR_TYPE_CAPABILITIES,
1025  RTE_TM_ERROR_TYPE_LEVEL_ID,
1026  RTE_TM_ERROR_TYPE_WRED_PROFILE,
1027  RTE_TM_ERROR_TYPE_WRED_PROFILE_GREEN,
1028  RTE_TM_ERROR_TYPE_WRED_PROFILE_YELLOW,
1029  RTE_TM_ERROR_TYPE_WRED_PROFILE_RED,
1030  RTE_TM_ERROR_TYPE_WRED_PROFILE_ID,
1031  RTE_TM_ERROR_TYPE_SHARED_WRED_CONTEXT_ID,
1032  RTE_TM_ERROR_TYPE_SHAPER_PROFILE,
1033  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_RATE,
1034  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_SIZE,
1035  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_RATE,
1036  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_SIZE,
1037  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PKT_ADJUST_LEN,
1038  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,
1039  RTE_TM_ERROR_TYPE_SHARED_SHAPER_ID,
1040  RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID,
1041  RTE_TM_ERROR_TYPE_NODE_PRIORITY,
1042  RTE_TM_ERROR_TYPE_NODE_WEIGHT,
1043  RTE_TM_ERROR_TYPE_NODE_PARAMS,
1044  RTE_TM_ERROR_TYPE_NODE_PARAMS_SHAPER_PROFILE_ID,
1045  RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_SHAPER_ID,
1046  RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_SHAPERS,
1047  RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE,
1048  RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SP_PRIORITIES,
1049  RTE_TM_ERROR_TYPE_NODE_PARAMS_CMAN,
1050  RTE_TM_ERROR_TYPE_NODE_PARAMS_WRED_PROFILE_ID,
1051  RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_WRED_CONTEXT_ID,
1052  RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_WRED_CONTEXTS,
1053  RTE_TM_ERROR_TYPE_NODE_PARAMS_STATS,
1054  RTE_TM_ERROR_TYPE_NODE_ID,
1055 };
1056 
1068 struct rte_tm_error {
1069  enum rte_tm_error_type type;
1070  const void *cause;
1071  const char *message;
1072 };
1073 
1091 int
1092 rte_tm_get_number_of_leaf_nodes(uint16_t port_id,
1093  uint32_t *n_leaf_nodes,
1094  struct rte_tm_error *error);
1095 
1115 int
1116 rte_tm_node_type_get(uint16_t port_id,
1117  uint32_t node_id,
1118  int *is_leaf,
1119  struct rte_tm_error *error);
1120 
1133 int
1134 rte_tm_capabilities_get(uint16_t port_id,
1135  struct rte_tm_capabilities *cap,
1136  struct rte_tm_error *error);
1137 
1153 int
1154 rte_tm_level_capabilities_get(uint16_t port_id,
1155  uint32_t level_id,
1156  struct rte_tm_level_capabilities *cap,
1157  struct rte_tm_error *error);
1158 
1173 int
1174 rte_tm_node_capabilities_get(uint16_t port_id,
1175  uint32_t node_id,
1176  struct rte_tm_node_capabilities *cap,
1177  struct rte_tm_error *error);
1178 
1198 int
1199 rte_tm_wred_profile_add(uint16_t port_id,
1200  uint32_t wred_profile_id,
1201  struct rte_tm_wred_params *profile,
1202  struct rte_tm_error *error);
1203 
1221 int
1222 rte_tm_wred_profile_delete(uint16_t port_id,
1223  uint32_t wred_profile_id,
1224  struct rte_tm_error *error);
1225 
1252 int
1253 rte_tm_shared_wred_context_add_update(uint16_t port_id,
1254  uint32_t shared_wred_context_id,
1255  uint32_t wred_profile_id,
1256  struct rte_tm_error *error);
1257 
1276 int
1277 rte_tm_shared_wred_context_delete(uint16_t port_id,
1278  uint32_t shared_wred_context_id,
1279  struct rte_tm_error *error);
1280 
1300 int
1301 rte_tm_shaper_profile_add(uint16_t port_id,
1302  uint32_t shaper_profile_id,
1303  struct rte_tm_shaper_params *profile,
1304  struct rte_tm_error *error);
1305 
1323 int
1324 rte_tm_shaper_profile_delete(uint16_t port_id,
1325  uint32_t shaper_profile_id,
1326  struct rte_tm_error *error);
1327 
1352 int
1353 rte_tm_shared_shaper_add_update(uint16_t port_id,
1354  uint32_t shared_shaper_id,
1355  uint32_t shaper_profile_id,
1356  struct rte_tm_error *error);
1357 
1375 int
1376 rte_tm_shared_shaper_delete(uint16_t port_id,
1377  uint32_t shared_shaper_id,
1378  struct rte_tm_error *error);
1379 
1443 int
1444 rte_tm_node_add(uint16_t port_id,
1445  uint32_t node_id,
1446  uint32_t parent_node_id,
1447  uint32_t priority,
1448  uint32_t weight,
1449  uint32_t level_id,
1450  struct rte_tm_node_params *params,
1451  struct rte_tm_error *error);
1452 
1476 int
1477 rte_tm_node_delete(uint16_t port_id,
1478  uint32_t node_id,
1479  struct rte_tm_error *error);
1480 
1500 int
1501 rte_tm_node_suspend(uint16_t port_id,
1502  uint32_t node_id,
1503  struct rte_tm_error *error);
1504 
1523 int
1524 rte_tm_node_resume(uint16_t port_id,
1525  uint32_t node_id,
1526  struct rte_tm_error *error);
1527 
1564 int
1565 rte_tm_hierarchy_commit(uint16_t port_id,
1566  int clear_on_fail,
1567  struct rte_tm_error *error);
1568 
1604 int
1605 rte_tm_node_parent_update(uint16_t port_id,
1606  uint32_t node_id,
1607  uint32_t parent_node_id,
1608  uint32_t priority,
1609  uint32_t weight,
1610  struct rte_tm_error *error);
1611 
1633 int
1634 rte_tm_node_shaper_update(uint16_t port_id,
1635  uint32_t node_id,
1636  uint32_t shaper_profile_id,
1637  struct rte_tm_error *error);
1638 
1660 int
1661 rte_tm_node_shared_shaper_update(uint16_t port_id,
1662  uint32_t node_id,
1663  uint32_t shared_shaper_id,
1664  int add,
1665  struct rte_tm_error *error);
1666 
1687 int
1688 rte_tm_node_stats_update(uint16_t port_id,
1689  uint32_t node_id,
1690  uint64_t stats_mask,
1691  struct rte_tm_error *error);
1692 
1715 int
1716 rte_tm_node_wfq_weight_mode_update(uint16_t port_id,
1717  uint32_t node_id,
1718  int *wfq_weight_mode,
1719  uint32_t n_sp_priorities,
1720  struct rte_tm_error *error);
1721 
1738 int
1739 rte_tm_node_cman_update(uint16_t port_id,
1740  uint32_t node_id,
1741  enum rte_tm_cman_mode cman,
1742  struct rte_tm_error *error);
1743 
1762 int
1763 rte_tm_node_wred_context_update(uint16_t port_id,
1764  uint32_t node_id,
1765  uint32_t wred_profile_id,
1766  struct rte_tm_error *error);
1767 
1787 int
1788 rte_tm_node_shared_wred_context_update(uint16_t port_id,
1789  uint32_t node_id,
1790  uint32_t shared_wred_context_id,
1791  int add,
1792  struct rte_tm_error *error);
1793 
1819 int
1820 rte_tm_node_stats_read(uint16_t port_id,
1821  uint32_t node_id,
1822  struct rte_tm_node_stats *stats,
1823  uint64_t *stats_mask,
1824  int clear,
1825  struct rte_tm_error *error);
1826 
1856 int
1857 rte_tm_mark_vlan_dei(uint16_t port_id,
1858  int mark_green,
1859  int mark_yellow,
1860  int mark_red,
1861  struct rte_tm_error *error);
1862 
1906 int
1907 rte_tm_mark_ip_ecn(uint16_t port_id,
1908  int mark_green,
1909  int mark_yellow,
1910  int mark_red,
1911  struct rte_tm_error *error);
1912 
1954 int
1955 rte_tm_mark_ip_dscp(uint16_t port_id,
1956  int mark_green,
1957  int mark_yellow,
1958  int mark_red,
1959  struct rte_tm_error *error);
1960 
1961 #ifdef __cplusplus
1962 }
1963 #endif
1964 
1965 #endif /* __INCLUDE_RTE_TM_H__ */
Generated by   doxygen 1.8.1.2