DPDK  18.05.1
rte_eal_memconfig.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2014 Intel Corporation
3  */
4 
5 #ifndef _RTE_EAL_MEMCONFIG_H_
6 #define _RTE_EAL_MEMCONFIG_H_
7 
8 #include <rte_config.h>
9 #include <rte_tailq.h>
10 #include <rte_memory.h>
11 #include <rte_memzone.h>
12 #include <rte_malloc_heap.h>
13 #include <rte_rwlock.h>
14 #include <rte_pause.h>
15 #include <rte_fbarray.h>
16 
17 #ifdef __cplusplus
18 extern "C" {
19 #endif
20 
27  union {
28  void *base_va;
30  uint64_t addr_64;
32  };
33  int socket_id;
34  uint64_t page_sz;
35  volatile uint32_t version;
36  struct rte_fbarray memseg_arr;
37 };
38 
45  volatile uint32_t magic;
47  /* memory topology */
48  uint32_t nchannel;
49  uint32_t nrank;
65  /* memory segments and zones */
66  struct rte_fbarray memzones;
68  struct rte_memseg_list memsegs[RTE_MAX_MEMSEG_LISTS];
71  struct rte_tailq_head tailq_head[RTE_MAX_TAILQ];
73  /* Heaps of Malloc per socket */
74  struct malloc_heap malloc_heaps[RTE_MAX_NUMA_NODES];
75 
76  /* address of mem_config in primary process. used to map shared config into
77  * exact same address the primary process maps it.
78  */
79  uint64_t mem_cfg_addr;
80 } __attribute__((__packed__));
81 
82 
83 inline static void
84 rte_eal_mcfg_wait_complete(struct rte_mem_config* mcfg)
85 {
86  /* wait until shared mem_config finish initialising */
87  while(mcfg->magic != RTE_MAGIC)
88  rte_pause();
89 }
90 
91 #ifdef __cplusplus
92 }
93 #endif
94 
95 #endif /*__RTE_EAL_MEMCONFIG_H_*/