DPDK  17.08.2
rte_io.h
Go to the documentation of this file.
1 /*
2  * BSD LICENSE
3  *
4  * Copyright(c) 2016 Cavium, Inc. All rights reserved.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * * Redistributions of source code must retain the above copyright
12  * notice, this list of conditions and the following disclaimer.
13  * * Redistributions in binary form must reproduce the above copyright
14  * notice, this list of conditions and the following disclaimer in
15  * the documentation and/or other materials provided with the
16  * distribution.
17  * * Neither the name of Cavium, Inc nor the names of its
18  * contributors may be used to endorse or promote products derived
19  * from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #ifndef _RTE_IO_H_
35 #define _RTE_IO_H_
36 
44 #include <stdint.h>
45 #include <rte_common.h>
46 #include <rte_atomic.h>
47 
48 #ifdef __DOXYGEN__
49 
62 static inline uint8_t
63 rte_read8_relaxed(const volatile void *addr);
64 
77 static inline uint16_t
78 rte_read16_relaxed(const volatile void *addr);
79 
92 static inline uint32_t
93 rte_read32_relaxed(const volatile void *addr);
94 
107 static inline uint64_t
108 rte_read64_relaxed(const volatile void *addr);
109 
123 static inline void
124 rte_write8_relaxed(uint8_t value, volatile void *addr);
125 
138 static inline void
139 rte_write16_relaxed(uint16_t value, volatile void *addr);
140 
153 static inline void
154 rte_write32_relaxed(uint32_t value, volatile void *addr);
155 
168 static inline void
169 rte_write64_relaxed(uint64_t value, volatile void *addr);
170 
179 static inline uint8_t
180 rte_read8(const volatile void *addr);
181 
191 static inline uint16_t
192 rte_read16(const volatile void *addr);
193 
202 static inline uint32_t
203 rte_read32(const volatile void *addr);
204 
213 static inline uint64_t
214 rte_read64(const volatile void *addr);
215 
225 static inline void
226 rte_write8(uint8_t value, volatile void *addr);
227 
236 static inline void
237 rte_write16(uint16_t value, volatile void *addr);
238 
247 static inline void
248 rte_write32(uint32_t value, volatile void *addr);
249 
258 static inline void
259 rte_write64(uint64_t value, volatile void *addr);
260 
261 #endif /* __DOXYGEN__ */
262 
263 #ifndef RTE_OVERRIDE_IO_H
264 
265 static __rte_always_inline uint8_t
266 rte_read8_relaxed(const volatile void *addr)
267 {
268  return *(const volatile uint8_t *)addr;
269 }
270 
271 static __rte_always_inline uint16_t
272 rte_read16_relaxed(const volatile void *addr)
273 {
274  return *(const volatile uint16_t *)addr;
275 }
276 
277 static __rte_always_inline uint32_t
278 rte_read32_relaxed(const volatile void *addr)
279 {
280  return *(const volatile uint32_t *)addr;
281 }
282 
283 static __rte_always_inline uint64_t
284 rte_read64_relaxed(const volatile void *addr)
285 {
286  return *(const volatile uint64_t *)addr;
287 }
288 
289 static __rte_always_inline void
290 rte_write8_relaxed(uint8_t value, volatile void *addr)
291 {
292  *(volatile uint8_t *)addr = value;
293 }
294 
295 static __rte_always_inline void
296 rte_write16_relaxed(uint16_t value, volatile void *addr)
297 {
298  *(volatile uint16_t *)addr = value;
299 }
300 
301 static __rte_always_inline void
302 rte_write32_relaxed(uint32_t value, volatile void *addr)
303 {
304  *(volatile uint32_t *)addr = value;
305 }
306 
307 static __rte_always_inline void
308 rte_write64_relaxed(uint64_t value, volatile void *addr)
309 {
310  *(volatile uint64_t *)addr = value;
311 }
312 
313 static __rte_always_inline uint8_t
314 rte_read8(const volatile void *addr)
315 {
316  uint8_t val;
317  val = rte_read8_relaxed(addr);
318  rte_io_rmb();
319  return val;
320 }
321 
322 static __rte_always_inline uint16_t
323 rte_read16(const volatile void *addr)
324 {
325  uint16_t val;
326  val = rte_read16_relaxed(addr);
327  rte_io_rmb();
328  return val;
329 }
330 
331 static __rte_always_inline uint32_t
332 rte_read32(const volatile void *addr)
333 {
334  uint32_t val;
335  val = rte_read32_relaxed(addr);
336  rte_io_rmb();
337  return val;
338 }
339 
340 static __rte_always_inline uint64_t
341 rte_read64(const volatile void *addr)
342 {
343  uint64_t val;
344  val = rte_read64_relaxed(addr);
345  rte_io_rmb();
346  return val;
347 }
348 
349 static __rte_always_inline void
350 rte_write8(uint8_t value, volatile void *addr)
351 {
352  rte_io_wmb();
353  rte_write8_relaxed(value, addr);
354 }
355 
356 static __rte_always_inline void
357 rte_write16(uint16_t value, volatile void *addr)
358 {
359  rte_io_wmb();
360  rte_write16_relaxed(value, addr);
361 }
362 
363 static __rte_always_inline void
364 rte_write32(uint32_t value, volatile void *addr)
365 {
366  rte_io_wmb();
367  rte_write32_relaxed(value, addr);
368 }
369 
370 static __rte_always_inline void
371 rte_write64(uint64_t value, volatile void *addr)
372 {
373  rte_io_wmb();
374  rte_write64_relaxed(value, addr);
375 }
376 
377 #endif /* RTE_OVERRIDE_IO_H */
378 
379 #endif /* _RTE_IO_H_ */