DPDK  17.02.1
rte_pci.h
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1 /*-
2  * BSD LICENSE
3  *
4  * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
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8  * modification, are permitted provided that the following conditions
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12  * notice, this list of conditions and the following disclaimer.
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18  * contributors may be used to endorse or promote products derived
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33 /* BSD LICENSE
34  *
35  * Copyright 2013-2014 6WIND S.A.
36  *
37  * Redistribution and use in source and binary forms, with or without
38  * modification, are permitted provided that the following conditions
39  * are met:
40  *
41  * * Redistributions of source code must retain the above copyright
42  * notice, this list of conditions and the following disclaimer.
43  * * Redistributions in binary form must reproduce the above copyright
44  * notice, this list of conditions and the following disclaimer in
45  * the documentation and/or other materials provided with the
46  * distribution.
47  * * Neither the name of 6WIND S.A. nor the names of its
48  * contributors may be used to endorse or promote products derived
49  * from this software without specific prior written permission.
50  *
51  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62  */
63 
64 #ifndef _RTE_PCI_H_
65 #define _RTE_PCI_H_
66 
73 #ifdef __cplusplus
74 extern "C" {
75 #endif
76 
77 #include <stdio.h>
78 #include <stdlib.h>
79 #include <limits.h>
80 #include <errno.h>
81 #include <sys/queue.h>
82 #include <stdint.h>
83 #include <inttypes.h>
84 
85 #include <rte_debug.h>
86 #include <rte_interrupts.h>
87 #include <rte_dev.h>
88 
89 TAILQ_HEAD(pci_device_list, rte_pci_device);
90 TAILQ_HEAD(pci_driver_list, rte_pci_driver);
92 extern struct pci_driver_list pci_driver_list;
93 extern struct pci_device_list pci_device_list;
96 const char *pci_get_sysfs_path(void);
97 
99 #define PCI_PRI_FMT "%.4" PRIx16 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
100 #define PCI_PRI_STR_SIZE sizeof("XXXX:XX:XX.X")
101 
103 #define PCI_SHORT_PRI_FMT "%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
104 
106 #define PCI_FMT_NVAL 4
107 
109 #define PCI_RESOURCE_FMT_NVAL 3
110 
112 #define PCI_MAX_RESOURCE 6
113 
118 struct rte_pci_id {
119  uint32_t class_id;
120  uint16_t vendor_id;
121  uint16_t device_id;
122  uint16_t subsystem_vendor_id;
123  uint16_t subsystem_device_id;
124 };
125 
129 struct rte_pci_addr {
130  uint16_t domain;
131  uint8_t bus;
132  uint8_t devid;
133  uint8_t function;
134 };
135 
136 struct rte_devargs;
137 
138 enum rte_kernel_driver {
139  RTE_KDRV_UNKNOWN = 0,
140  RTE_KDRV_IGB_UIO,
141  RTE_KDRV_VFIO,
142  RTE_KDRV_UIO_GENERIC,
143  RTE_KDRV_NIC_UIO,
144  RTE_KDRV_NONE,
145 };
146 
150 struct rte_pci_device {
151  TAILQ_ENTRY(rte_pci_device) next;
152  struct rte_device device;
153  struct rte_pci_addr addr;
154  struct rte_pci_id id;
155  struct rte_mem_resource mem_resource[PCI_MAX_RESOURCE];
157  struct rte_intr_handle intr_handle;
158  struct rte_pci_driver *driver;
159  uint16_t max_vfs;
160  enum rte_kernel_driver kdrv;
161 };
162 
167 #define RTE_DEV_TO_PCI(ptr) container_of(ptr, struct rte_pci_device, device)
168 
170 #define PCI_ANY_ID (0xffff)
171 #define RTE_CLASS_ANY_ID (0xffffff)
172 
173 #ifdef __cplusplus
174 
175 #define RTE_PCI_DEVICE(vend, dev) \
176  RTE_CLASS_ANY_ID, \
177  (vend), \
178  (dev), \
179  PCI_ANY_ID, \
180  PCI_ANY_ID
181 #else
182 
183 #define RTE_PCI_DEVICE(vend, dev) \
184  .class_id = RTE_CLASS_ANY_ID, \
185  .vendor_id = (vend), \
186  .device_id = (dev), \
187  .subsystem_vendor_id = PCI_ANY_ID, \
188  .subsystem_device_id = PCI_ANY_ID
189 #endif
190 
191 struct rte_pci_driver;
192 
196 typedef int (pci_probe_t)(struct rte_pci_driver *, struct rte_pci_device *);
197 
201 typedef int (pci_remove_t)(struct rte_pci_device *);
202 
206 struct rte_pci_driver {
207  TAILQ_ENTRY(rte_pci_driver) next;
208  struct rte_driver driver;
209  pci_probe_t *probe;
210  pci_remove_t *remove;
211  const struct rte_pci_id *id_table;
212  uint32_t drv_flags;
213 };
214 
216 #define RTE_PCI_DRV_NEED_MAPPING 0x0001
217 
218 #define RTE_PCI_DRV_INTR_LSC 0x0008
219 
223 struct pci_map {
224  void *addr;
225  char *path;
226  uint64_t offset;
227  uint64_t size;
228  uint64_t phaddr;
229 };
230 
236 struct mapped_pci_resource {
237  TAILQ_ENTRY(mapped_pci_resource) next;
238 
239  struct rte_pci_addr pci_addr;
240  char path[PATH_MAX];
241  int nb_maps;
242  struct pci_map maps[PCI_MAX_RESOURCE];
243 };
244 
246 TAILQ_HEAD(mapped_pci_res_list, mapped_pci_resource);
247 
249 #define GET_PCIADDR_FIELD(in, fd, lim, dlm) \
250 do { \
251  unsigned long val; \
252  char *end; \
253  errno = 0; \
254  val = strtoul((in), &end, 16); \
255  if (errno != 0 || end[0] != (dlm) || val > (lim)) \
256  return -EINVAL; \
257  (fd) = (typeof (fd))val; \
258  (in) = end + 1; \
259 } while(0)
260 
274 static inline int
275 eal_parse_pci_BDF(const char *input, struct rte_pci_addr *dev_addr)
276 {
277  dev_addr->domain = 0;
278  GET_PCIADDR_FIELD(input, dev_addr->bus, UINT8_MAX, ':');
279  GET_PCIADDR_FIELD(input, dev_addr->devid, UINT8_MAX, '.');
280  GET_PCIADDR_FIELD(input, dev_addr->function, UINT8_MAX, 0);
281  return 0;
282 }
283 
296 static inline int
297 eal_parse_pci_DomBDF(const char *input, struct rte_pci_addr *dev_addr)
298 {
299  GET_PCIADDR_FIELD(input, dev_addr->domain, UINT16_MAX, ':');
300  GET_PCIADDR_FIELD(input, dev_addr->bus, UINT8_MAX, ':');
301  GET_PCIADDR_FIELD(input, dev_addr->devid, UINT8_MAX, '.');
302  GET_PCIADDR_FIELD(input, dev_addr->function, UINT8_MAX, 0);
303  return 0;
304 }
305 #undef GET_PCIADDR_FIELD
306 
319 static inline void
320 rte_eal_pci_device_name(const struct rte_pci_addr *addr,
321  char *output, size_t size)
322 {
323  RTE_VERIFY(size >= PCI_PRI_STR_SIZE);
324  RTE_VERIFY(snprintf(output, size, PCI_PRI_FMT,
325  addr->domain, addr->bus,
326  addr->devid, addr->function) >= 0);
327 }
328 
329 /* Compare two PCI device addresses. */
342 static inline int
343 rte_eal_compare_pci_addr(const struct rte_pci_addr *addr,
344  const struct rte_pci_addr *addr2)
345 {
346  uint64_t dev_addr, dev_addr2;
347 
348  if ((addr == NULL) || (addr2 == NULL))
349  return -1;
350 
351  dev_addr = (addr->domain << 24) | (addr->bus << 16) |
352  (addr->devid << 8) | addr->function;
353  dev_addr2 = (addr2->domain << 24) | (addr2->bus << 16) |
354  (addr2->devid << 8) | addr2->function;
355 
356  if (dev_addr > dev_addr2)
357  return 1;
358  else if (dev_addr < dev_addr2)
359  return -1;
360  else
361  return 0;
362 }
363 
371 int rte_eal_pci_scan(void);
372 
384 int rte_eal_pci_probe(void);
385 
401 int rte_eal_pci_map_device(struct rte_pci_device *dev);
402 
410 void rte_eal_pci_unmap_device(struct rte_pci_device *dev);
411 
430 void *pci_map_resource(void *requested_addr, int fd, off_t offset,
431  size_t size, int additional_flags);
432 
442 void pci_unmap_resource(void *requested_addr, size_t size);
443 
457 int rte_eal_pci_probe_one(const struct rte_pci_addr *addr);
458 
472 int rte_eal_pci_detach(const struct rte_pci_addr *addr);
473 
480 void rte_eal_pci_dump(FILE *f);
481 
489 void rte_eal_pci_register(struct rte_pci_driver *driver);
490 
492 #define RTE_PMD_REGISTER_PCI(nm, pci_drv) \
493 RTE_INIT(pciinitfn_ ##nm); \
494 static void pciinitfn_ ##nm(void) \
495 {\
496  (pci_drv).driver.name = RTE_STR(nm);\
497  rte_eal_pci_register(&pci_drv); \
498 } \
499 RTE_PMD_EXPORT_NAME(nm, __COUNTER__)
500 
508 void rte_eal_pci_unregister(struct rte_pci_driver *driver);
509 
523 int rte_eal_pci_read_config(const struct rte_pci_device *device,
524  void *buf, size_t len, off_t offset);
525 
539 int rte_eal_pci_write_config(const struct rte_pci_device *device,
540  const void *buf, size_t len, off_t offset);
541 
547 struct rte_pci_ioport {
548  struct rte_pci_device *dev;
549  uint64_t base;
550  uint64_t len; /* only filled for memory mapped ports */
551 };
552 
568 int rte_eal_pci_ioport_map(struct rte_pci_device *dev, int bar,
569  struct rte_pci_ioport *p);
570 
579 int rte_eal_pci_ioport_unmap(struct rte_pci_ioport *p);
580 
593 void rte_eal_pci_ioport_read(struct rte_pci_ioport *p,
594  void *data, size_t len, off_t offset);
595 
608 void rte_eal_pci_ioport_write(struct rte_pci_ioport *p,
609  const void *data, size_t len, off_t offset);
610 
611 #ifdef __cplusplus
612 }
613 #endif
614 
615 #endif /* _RTE_PCI_H_ */
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