DPDK 24.11.4-rc1
rte_ring_hts_elem_pvt.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 *
3 * Copyright (c) 2010-2020 Intel Corporation
4 * Copyright (c) 2007-2009 Kip Macy kmacy@freebsd.org
5 * All rights reserved.
6 * Derived from FreeBSD's bufring.h
7 * Used as BSD-3 Licensed with permission from Kip Macy.
8 */
9
10#ifndef _RTE_RING_HTS_ELEM_PVT_H_
11#define _RTE_RING_HTS_ELEM_PVT_H_
12
13#include <rte_stdatomic.h>
14
26static __rte_always_inline void
27__rte_ring_hts_update_tail(struct rte_ring_hts_headtail *ht, uint32_t old_tail,
28 uint32_t num, uint32_t enqueue)
29{
30 uint32_t tail;
31
32 RTE_SET_USED(enqueue);
33
34 tail = old_tail + num;
35
36 /*
37 * R0: Release the tail update. Establishes a synchronization edge with
38 * the load-acquire at A1/A3. This release ensures that all updates to
39 * *ht and the ring array made by this thread become visible to the
40 * opposing thread once the tail value written here is observed.
41 */
42 rte_atomic_store_explicit(&ht->ht.pos.tail, tail, rte_memory_order_release);
43}
44
56static __rte_always_inline union __rte_ring_hts_pos
57__rte_ring_hts_head_wait(const struct rte_ring_hts_headtail *ht,
58 int memorder)
59{
60 union __rte_ring_hts_pos p;
61 p.raw = rte_atomic_load_explicit(&ht->ht.raw, memorder);
62
63 while (p.pos.head != p.pos.tail) {
64 rte_pause();
65 p.raw = rte_atomic_load_explicit(&ht->ht.raw, memorder);
66 }
67
68 return p;
69}
70
74static __rte_always_inline unsigned int
75__rte_ring_hts_move_prod_head(struct rte_ring *r, unsigned int num,
76 enum rte_ring_queue_behavior behavior, uint32_t *old_head,
77 uint32_t *free_entries)
78{
79 uint32_t n, cons_tail;
80 union __rte_ring_hts_pos np, op;
81
82 const uint32_t capacity = r->capacity;
83
84 do {
85 /* Reset n to the initial burst count */
86 n = num;
87
88 /*
89 * wait for tail to be equal to head,
90 * make sure that we read prod head/tail *before*
91 * reading cons tail.
92 */
93 /*
94 * A0: Synchronizes with the CAS at R1.
95 * Establishes a happens-before relationship with a thread of the same
96 * type that released the ht.raw, ensuring this thread observes all of
97 * its memory effects needed to maintain a safe partial order.
98 */
99 op = __rte_ring_hts_head_wait(&r->hts_prod, rte_memory_order_acquire);
100
101 /*
102 * A1: Establish a synchronizes-with edge using a store-release at R0.
103 * This ensures that all memory effects from the preceding opposing
104 * thread are observed.
105 */
106 cons_tail = rte_atomic_load_explicit(&r->cons.tail, rte_memory_order_acquire);
107
108 /*
109 * The subtraction is done between two unsigned 32bits value
110 * (the result is always modulo 32 bits even if we have
111 * *old_head > cons_tail). So 'free_entries' is always between 0
112 * and capacity (which is < size).
113 */
114 *free_entries = capacity + cons_tail - op.pos.head;
115
116 /* check that we have enough room in ring */
117 if (unlikely(n > *free_entries))
118 n = (behavior == RTE_RING_QUEUE_FIXED) ?
119 0 : *free_entries;
120
121 if (n == 0)
122 break;
123
124 np.pos.tail = op.pos.tail;
125 np.pos.head = op.pos.head + n;
126
127 /*
128 * R1: Establishes a synchronizes-with edge with the load-acquire
129 * of ht.raw at A0. This makes sure that the store-release to the
130 * tail by this thread, if it was of the opposite type, becomes
131 * visible to another thread of the current type. That thread will
132 * then observe the updates in the same order, keeping a safe
133 * partial order.
134 */
135 } while (rte_atomic_compare_exchange_strong_explicit(&r->hts_prod.ht.raw,
136 (uint64_t *)(uintptr_t)&op.raw, np.raw,
137 rte_memory_order_release, rte_memory_order_relaxed) == 0);
138
139 *old_head = op.pos.head;
140 return n;
141}
142
146static __rte_always_inline unsigned int
147__rte_ring_hts_move_cons_head(struct rte_ring *r, unsigned int num,
148 enum rte_ring_queue_behavior behavior, uint32_t *old_head,
149 uint32_t *entries)
150{
151 uint32_t n, prod_tail;
152 union __rte_ring_hts_pos np, op;
153
154 /* move cons.head atomically */
155 do {
156 /* Restore n as it may change every loop */
157 n = num;
158
159 /*
160 * wait for tail to be equal to head,
161 * make sure that we read cons head/tail *before*
162 * reading prod tail.
163 */
164 /*
165 * A2: Synchronizes with the CAS at R2.
166 * Establishes a happens-before relationship with a thread of the same
167 * type that released the ht.raw, ensuring this thread observes all of
168 * its memory effects needed to maintain a safe partial order.
169 */
170 op = __rte_ring_hts_head_wait(&r->hts_cons, rte_memory_order_acquire);
171
172 /*
173 * A3: Establish a synchronizes-with edge using a store-release at R0.
174 * This ensures that all memory effects from the preceding opposing
175 * thread are observed.
176 */
177 prod_tail = rte_atomic_load_explicit(&r->prod.tail, rte_memory_order_acquire);
178
179 /* The subtraction is done between two unsigned 32bits value
180 * (the result is always modulo 32 bits even if we have
181 * cons_head > prod_tail). So 'entries' is always between 0
182 * and size(ring)-1.
183 */
184 *entries = prod_tail - op.pos.head;
185
186 /* Set the actual entries for dequeue */
187 if (n > *entries)
188 n = (behavior == RTE_RING_QUEUE_FIXED) ? 0 : *entries;
189
190 if (unlikely(n == 0))
191 break;
192
193 np.pos.tail = op.pos.tail;
194 np.pos.head = op.pos.head + n;
195
196 /*
197 * R2: Establishes a synchronizes-with edge with the load-acquire
198 * of ht.raw at A2. This makes sure that the store-release to the
199 * tail by this thread, if it was of the opposite type, becomes
200 * visible to another thread of the current type. That thread will
201 * then observe the updates in the same order, keeping a safe
202 * partial order.
203 */
204 } while (rte_atomic_compare_exchange_strong_explicit(&r->hts_cons.ht.raw,
205 (uint64_t *)(uintptr_t)&op.raw, np.raw,
206 rte_memory_order_release, rte_memory_order_relaxed) == 0);
207
208 *old_head = op.pos.head;
209 return n;
210}
211
234static __rte_always_inline unsigned int
235__rte_ring_do_hts_enqueue_elem(struct rte_ring *r, const void *obj_table,
236 uint32_t esize, uint32_t n, enum rte_ring_queue_behavior behavior,
237 uint32_t *free_space)
238{
239 uint32_t free, head;
240
241 n = __rte_ring_hts_move_prod_head(r, n, behavior, &head, &free);
242
243 if (n != 0) {
244 __rte_ring_enqueue_elems(r, head, obj_table, esize, n);
245 __rte_ring_hts_update_tail(&r->hts_prod, head, n, 1);
246 }
247
248 if (free_space != NULL)
249 *free_space = free - n;
250 return n;
251}
252
275static __rte_always_inline unsigned int
276__rte_ring_do_hts_dequeue_elem(struct rte_ring *r, void *obj_table,
277 uint32_t esize, uint32_t n, enum rte_ring_queue_behavior behavior,
278 uint32_t *available)
279{
280 uint32_t entries, head;
281
282 n = __rte_ring_hts_move_cons_head(r, n, behavior, &head, &entries);
283
284 if (n != 0) {
285 __rte_ring_dequeue_elems(r, head, obj_table, esize, n);
286 __rte_ring_hts_update_tail(&r->hts_cons, head, n, 0);
287 }
288
289 if (available != NULL)
290 *available = entries - n;
291 return n;
292}
293
294#endif /* _RTE_RING_HTS_ELEM_PVT_H_ */
#define unlikely(x)
#define RTE_SET_USED(x)
Definition: rte_common.h:187
#define __rte_always_inline
Definition: rte_common.h:413
static void rte_pause(void)
rte_ring_queue_behavior
Definition: rte_ring_core.h:40
@ RTE_RING_QUEUE_FIXED
Definition: rte_ring_core.h:42
uint32_t capacity