DPDK  19.02.0
rte_tm.h
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1 /*-
2  * BSD LICENSE
3  *
4  * Copyright(c) 2017 Intel Corporation.
5  * Copyright(c) 2017 Cavium.
6  * Copyright(c) 2017 NXP.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  *
13  * * Redistributions of source code must retain the above copyright
14  * notice, this list of conditions and the following disclaimer.
15  * * Redistributions in binary form must reproduce the above copyright
16  * notice, this list of conditions and the following disclaimer in
17  * the documentation and/or other materials provided with the
18  * distribution.
19  * * Neither the name of Intel Corporation nor the names of its
20  * contributors may be used to endorse or promote products derived
21  * from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 #ifndef __INCLUDE_RTE_TM_H__
37 #define __INCLUDE_RTE_TM_H__
38 
51 #include <stdint.h>
52 
53 #include <rte_common.h>
54 #include <rte_meter.h>
55 
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59 
73 #define RTE_TM_ETH_FRAMING_OVERHEAD 20
74 
85 #define RTE_TM_ETH_FRAMING_OVERHEAD_FCS 24
86 
94 #define RTE_TM_WRED_PROFILE_ID_NONE UINT32_MAX
95 
103 #define RTE_TM_SHAPER_PROFILE_ID_NONE UINT32_MAX
104 
110 #define RTE_TM_NODE_ID_NULL UINT32_MAX
111 
117 #define RTE_TM_NODE_LEVEL_ID_ANY UINT32_MAX
118 
119 /* New rte_color is defined and used to deprecate rte_tm_color soon. */
120 #define rte_tm_color rte_color
121 #define RTE_TM_GREEN RTE_COLOR_GREEN
122 #define RTE_TM_YELLOW RTE_COLOR_YELLOW
123 #define RTE_TM_RED RTE_COLOR_RED
124 #define RTE_TM_COLORS RTE_COLORS
125 
129 enum rte_tm_stats_type {
131  RTE_TM_STATS_N_PKTS = 1 << 0,
132 
134  RTE_TM_STATS_N_BYTES = 1 << 1,
135 
137  RTE_TM_STATS_N_PKTS_GREEN_DROPPED = 1 << 2,
138 
140  RTE_TM_STATS_N_PKTS_YELLOW_DROPPED = 1 << 3,
141 
143  RTE_TM_STATS_N_PKTS_RED_DROPPED = 1 << 4,
144 
146  RTE_TM_STATS_N_BYTES_GREEN_DROPPED = 1 << 5,
147 
149  RTE_TM_STATS_N_BYTES_YELLOW_DROPPED = 1 << 6,
150 
152  RTE_TM_STATS_N_BYTES_RED_DROPPED = 1 << 7,
153 
157  RTE_TM_STATS_N_PKTS_QUEUED = 1 << 8,
158 
162  RTE_TM_STATS_N_BYTES_QUEUED = 1 << 9,
163 };
164 
168 struct rte_tm_node_stats {
170  uint64_t n_pkts;
171 
173  uint64_t n_bytes;
174 
176  struct {
180  uint64_t n_pkts_dropped[RTE_TM_COLORS];
181 
185  uint64_t n_bytes_dropped[RTE_TM_COLORS];
186 
190  uint64_t n_pkts_queued;
191 
195  uint64_t n_bytes_queued;
196  } leaf;
197 };
198 
202 enum rte_tm_dynamic_update_type {
207  RTE_TM_UPDATE_NODE_PARENT_KEEP_LEVEL = 1 << 0,
208 
213  RTE_TM_UPDATE_NODE_PARENT_CHANGE_LEVEL = 1 << 1,
214 
216  RTE_TM_UPDATE_NODE_ADD_DELETE = 1 << 2,
217 
219  RTE_TM_UPDATE_NODE_SUSPEND_RESUME = 1 << 3,
220 
222  RTE_TM_UPDATE_NODE_WFQ_WEIGHT_MODE = 1 << 4,
223 
225  RTE_TM_UPDATE_NODE_N_SP_PRIORITIES = 1 << 5,
226 
228  RTE_TM_UPDATE_NODE_CMAN = 1 << 6,
229 
231  RTE_TM_UPDATE_NODE_STATS = 1 << 7,
232 };
233 
237 struct rte_tm_capabilities {
239  uint32_t n_nodes_max;
240 
244  uint32_t n_levels_max;
245 
249  int non_leaf_nodes_identical;
250 
254  int leaf_nodes_identical;
255 
262  uint32_t shaper_n_max;
263 
268  uint32_t shaper_private_n_max;
269 
277  int shaper_private_dual_rate_n_max;
278 
282  uint64_t shaper_private_rate_min;
283 
287  uint64_t shaper_private_rate_max;
288 
292  uint32_t shaper_shared_n_max;
293 
297  uint32_t shaper_shared_n_nodes_per_shaper_max;
298 
305  uint32_t shaper_shared_n_shapers_per_node_max;
306 
311  uint32_t shaper_shared_dual_rate_n_max;
312 
316  uint64_t shaper_shared_rate_min;
317 
321  uint64_t shaper_shared_rate_max;
322 
326  int shaper_pkt_length_adjust_min;
327 
331  int shaper_pkt_length_adjust_max;
332 
338  uint32_t sched_n_children_max;
339 
348  uint32_t sched_sp_n_priorities_max;
349 
358  uint32_t sched_wfq_n_children_per_group_max;
359 
371  uint32_t sched_wfq_n_groups_max;
372 
376  uint32_t sched_wfq_weight_max;
377 
384  int cman_wred_packet_mode_supported;
385 
392  int cman_wred_byte_mode_supported;
393 
398  int cman_head_drop_supported;
399 
407  uint32_t cman_wred_context_n_max;
408 
414  uint32_t cman_wred_context_private_n_max;
415 
419  uint32_t cman_wred_context_shared_n_max;
420 
424  uint32_t cman_wred_context_shared_n_nodes_per_context_max;
425 
433  uint32_t cman_wred_context_shared_n_contexts_per_node_max;
434 
436  int mark_vlan_dei_supported[RTE_TM_COLORS];
437 
439  int mark_ip_ecn_tcp_supported[RTE_TM_COLORS];
440 
442  int mark_ip_ecn_sctp_supported[RTE_TM_COLORS];
443 
445  int mark_ip_dscp_supported[RTE_TM_COLORS];
446 
450  uint64_t dynamic_update_mask;
451 
455  uint64_t stats_mask;
456 };
457 
461 struct rte_tm_level_capabilities {
463  uint32_t n_nodes_max;
464 
469  uint32_t n_nodes_nonleaf_max;
470 
475  uint32_t n_nodes_leaf_max;
476 
481  int non_leaf_nodes_identical;
482 
487  int leaf_nodes_identical;
488 
489  RTE_STD_C11
490  union {
492  struct {
498  int shaper_private_supported;
499 
508  int shaper_private_dual_rate_supported;
509 
515  uint64_t shaper_private_rate_min;
516 
522  uint64_t shaper_private_rate_max;
523 
532  uint32_t shaper_shared_n_max;
533 
540  uint32_t sched_n_children_max;
541 
553  uint32_t sched_sp_n_priorities_max;
554 
565  uint32_t sched_wfq_n_children_per_group_max;
566 
584  uint32_t sched_wfq_n_groups_max;
585 
591  uint32_t sched_wfq_weight_max;
592 
600  uint64_t stats_mask;
601  } nonleaf;
602 
604  struct {
610  int shaper_private_supported;
611 
619  int shaper_private_dual_rate_supported;
620 
626  uint64_t shaper_private_rate_min;
627 
633  uint64_t shaper_private_rate_max;
634 
643  uint32_t shaper_shared_n_max;
644 
652  int cman_wred_packet_mode_supported;
653 
661  int cman_wred_byte_mode_supported;
662 
669  int cman_head_drop_supported;
670 
676  int cman_wred_context_private_supported;
677 
687  uint32_t cman_wred_context_shared_n_max;
688 
696  uint64_t stats_mask;
697  } leaf;
698  };
699 };
700 
704 struct rte_tm_node_capabilities {
706  int shaper_private_supported;
707 
711  int shaper_private_dual_rate_supported;
712 
717  uint64_t shaper_private_rate_min;
718 
723  uint64_t shaper_private_rate_max;
724 
729  uint32_t shaper_shared_n_max;
730 
731  RTE_STD_C11
732  union {
734  struct {
736  uint32_t sched_n_children_max;
737 
744  uint32_t sched_sp_n_priorities_max;
745 
753  uint32_t sched_wfq_n_children_per_group_max;
754 
767  uint32_t sched_wfq_n_groups_max;
768 
773  uint32_t sched_wfq_weight_max;
774  } nonleaf;
775 
777  struct {
779  int cman_wred_packet_mode_supported;
780 
782  int cman_wred_byte_mode_supported;
783 
785  int cman_head_drop_supported;
786 
788  int cman_wred_context_private_supported;
789 
795  uint32_t cman_wred_context_shared_n_max;
796  } leaf;
797  };
798 
802  uint64_t stats_mask;
803 };
804 
821 enum rte_tm_cman_mode {
822  RTE_TM_CMAN_TAIL_DROP = 0,
823  RTE_TM_CMAN_HEAD_DROP,
824  RTE_TM_CMAN_WRED,
825 };
826 
830 struct rte_tm_red_params {
832  uint64_t min_th;
833 
835  uint64_t max_th;
836 
840  uint16_t maxp_inv;
841 
843  uint16_t wq_log2;
844 };
845 
860 struct rte_tm_wred_params {
862  struct rte_tm_red_params red_params[RTE_TM_COLORS];
863 
868  int packet_mode;
869 };
870 
874 struct rte_tm_token_bucket {
876  uint64_t rate;
877 
879  uint64_t size;
880 };
881 
900 struct rte_tm_shaper_params {
902  struct rte_tm_token_bucket committed;
903 
905  struct rte_tm_token_bucket peak;
906 
912  int32_t pkt_length_adjust;
913 };
914 
942 struct rte_tm_node_params {
947  uint32_t shaper_profile_id;
948 
950  uint32_t *shared_shaper_id;
951 
953  uint32_t n_shared_shapers;
954 
955  RTE_STD_C11
956  union {
958  struct {
965  int *wfq_weight_mode;
966 
968  uint32_t n_sp_priorities;
969  } nonleaf;
970 
972  struct {
974  enum rte_tm_cman_mode cman;
975 
979  struct {
985  uint32_t wred_profile_id;
986 
992  uint32_t *shared_wred_context_id;
993 
999  uint32_t n_shared_wred_contexts;
1000  } wred;
1001  } leaf;
1002  };
1003 
1010  uint64_t stats_mask;
1011 };
1012 
1019 enum rte_tm_error_type {
1020  RTE_TM_ERROR_TYPE_NONE,
1021  RTE_TM_ERROR_TYPE_UNSPECIFIED,
1022  RTE_TM_ERROR_TYPE_CAPABILITIES,
1023  RTE_TM_ERROR_TYPE_LEVEL_ID,
1024  RTE_TM_ERROR_TYPE_WRED_PROFILE,
1025  RTE_TM_ERROR_TYPE_WRED_PROFILE_GREEN,
1026  RTE_TM_ERROR_TYPE_WRED_PROFILE_YELLOW,
1027  RTE_TM_ERROR_TYPE_WRED_PROFILE_RED,
1028  RTE_TM_ERROR_TYPE_WRED_PROFILE_ID,
1029  RTE_TM_ERROR_TYPE_SHARED_WRED_CONTEXT_ID,
1030  RTE_TM_ERROR_TYPE_SHAPER_PROFILE,
1031  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_RATE,
1032  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_SIZE,
1033  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_RATE,
1034  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_SIZE,
1035  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PKT_ADJUST_LEN,
1036  RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,
1037  RTE_TM_ERROR_TYPE_SHARED_SHAPER_ID,
1038  RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID,
1039  RTE_TM_ERROR_TYPE_NODE_PRIORITY,
1040  RTE_TM_ERROR_TYPE_NODE_WEIGHT,
1041  RTE_TM_ERROR_TYPE_NODE_PARAMS,
1042  RTE_TM_ERROR_TYPE_NODE_PARAMS_SHAPER_PROFILE_ID,
1043  RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_SHAPER_ID,
1044  RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_SHAPERS,
1045  RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE,
1046  RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SP_PRIORITIES,
1047  RTE_TM_ERROR_TYPE_NODE_PARAMS_CMAN,
1048  RTE_TM_ERROR_TYPE_NODE_PARAMS_WRED_PROFILE_ID,
1049  RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_WRED_CONTEXT_ID,
1050  RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_WRED_CONTEXTS,
1051  RTE_TM_ERROR_TYPE_NODE_PARAMS_STATS,
1052  RTE_TM_ERROR_TYPE_NODE_ID,
1053 };
1054 
1066 struct rte_tm_error {
1067  enum rte_tm_error_type type;
1068  const void *cause;
1069  const char *message;
1070 };
1071 
1089 int
1090 rte_tm_get_number_of_leaf_nodes(uint16_t port_id,
1091  uint32_t *n_leaf_nodes,
1092  struct rte_tm_error *error);
1093 
1113 int
1114 rte_tm_node_type_get(uint16_t port_id,
1115  uint32_t node_id,
1116  int *is_leaf,
1117  struct rte_tm_error *error);
1118 
1131 int
1132 rte_tm_capabilities_get(uint16_t port_id,
1133  struct rte_tm_capabilities *cap,
1134  struct rte_tm_error *error);
1135 
1151 int
1152 rte_tm_level_capabilities_get(uint16_t port_id,
1153  uint32_t level_id,
1154  struct rte_tm_level_capabilities *cap,
1155  struct rte_tm_error *error);
1156 
1171 int
1172 rte_tm_node_capabilities_get(uint16_t port_id,
1173  uint32_t node_id,
1174  struct rte_tm_node_capabilities *cap,
1175  struct rte_tm_error *error);
1176 
1196 int
1197 rte_tm_wred_profile_add(uint16_t port_id,
1198  uint32_t wred_profile_id,
1199  struct rte_tm_wred_params *profile,
1200  struct rte_tm_error *error);
1201 
1219 int
1220 rte_tm_wred_profile_delete(uint16_t port_id,
1221  uint32_t wred_profile_id,
1222  struct rte_tm_error *error);
1223 
1250 int
1251 rte_tm_shared_wred_context_add_update(uint16_t port_id,
1252  uint32_t shared_wred_context_id,
1253  uint32_t wred_profile_id,
1254  struct rte_tm_error *error);
1255 
1274 int
1275 rte_tm_shared_wred_context_delete(uint16_t port_id,
1276  uint32_t shared_wred_context_id,
1277  struct rte_tm_error *error);
1278 
1298 int
1299 rte_tm_shaper_profile_add(uint16_t port_id,
1300  uint32_t shaper_profile_id,
1301  struct rte_tm_shaper_params *profile,
1302  struct rte_tm_error *error);
1303 
1321 int
1322 rte_tm_shaper_profile_delete(uint16_t port_id,
1323  uint32_t shaper_profile_id,
1324  struct rte_tm_error *error);
1325 
1350 int
1351 rte_tm_shared_shaper_add_update(uint16_t port_id,
1352  uint32_t shared_shaper_id,
1353  uint32_t shaper_profile_id,
1354  struct rte_tm_error *error);
1355 
1373 int
1374 rte_tm_shared_shaper_delete(uint16_t port_id,
1375  uint32_t shared_shaper_id,
1376  struct rte_tm_error *error);
1377 
1441 int
1442 rte_tm_node_add(uint16_t port_id,
1443  uint32_t node_id,
1444  uint32_t parent_node_id,
1445  uint32_t priority,
1446  uint32_t weight,
1447  uint32_t level_id,
1448  struct rte_tm_node_params *params,
1449  struct rte_tm_error *error);
1450 
1474 int
1475 rte_tm_node_delete(uint16_t port_id,
1476  uint32_t node_id,
1477  struct rte_tm_error *error);
1478 
1498 int
1499 rte_tm_node_suspend(uint16_t port_id,
1500  uint32_t node_id,
1501  struct rte_tm_error *error);
1502 
1521 int
1522 rte_tm_node_resume(uint16_t port_id,
1523  uint32_t node_id,
1524  struct rte_tm_error *error);
1525 
1562 int
1563 rte_tm_hierarchy_commit(uint16_t port_id,
1564  int clear_on_fail,
1565  struct rte_tm_error *error);
1566 
1602 int
1603 rte_tm_node_parent_update(uint16_t port_id,
1604  uint32_t node_id,
1605  uint32_t parent_node_id,
1606  uint32_t priority,
1607  uint32_t weight,
1608  struct rte_tm_error *error);
1609 
1631 int
1632 rte_tm_node_shaper_update(uint16_t port_id,
1633  uint32_t node_id,
1634  uint32_t shaper_profile_id,
1635  struct rte_tm_error *error);
1636 
1658 int
1659 rte_tm_node_shared_shaper_update(uint16_t port_id,
1660  uint32_t node_id,
1661  uint32_t shared_shaper_id,
1662  int add,
1663  struct rte_tm_error *error);
1664 
1685 int
1686 rte_tm_node_stats_update(uint16_t port_id,
1687  uint32_t node_id,
1688  uint64_t stats_mask,
1689  struct rte_tm_error *error);
1690 
1713 int
1714 rte_tm_node_wfq_weight_mode_update(uint16_t port_id,
1715  uint32_t node_id,
1716  int *wfq_weight_mode,
1717  uint32_t n_sp_priorities,
1718  struct rte_tm_error *error);
1719 
1736 int
1737 rte_tm_node_cman_update(uint16_t port_id,
1738  uint32_t node_id,
1739  enum rte_tm_cman_mode cman,
1740  struct rte_tm_error *error);
1741 
1760 int
1761 rte_tm_node_wred_context_update(uint16_t port_id,
1762  uint32_t node_id,
1763  uint32_t wred_profile_id,
1764  struct rte_tm_error *error);
1765 
1785 int
1786 rte_tm_node_shared_wred_context_update(uint16_t port_id,
1787  uint32_t node_id,
1788  uint32_t shared_wred_context_id,
1789  int add,
1790  struct rte_tm_error *error);
1791 
1817 int
1818 rte_tm_node_stats_read(uint16_t port_id,
1819  uint32_t node_id,
1820  struct rte_tm_node_stats *stats,
1821  uint64_t *stats_mask,
1822  int clear,
1823  struct rte_tm_error *error);
1824 
1854 int
1855 rte_tm_mark_vlan_dei(uint16_t port_id,
1856  int mark_green,
1857  int mark_yellow,
1858  int mark_red,
1859  struct rte_tm_error *error);
1860 
1904 int
1905 rte_tm_mark_ip_ecn(uint16_t port_id,
1906  int mark_green,
1907  int mark_yellow,
1908  int mark_red,
1909  struct rte_tm_error *error);
1910 
1952 int
1953 rte_tm_mark_ip_dscp(uint16_t port_id,
1954  int mark_green,
1955  int mark_yellow,
1956  int mark_red,
1957  struct rte_tm_error *error);
1958 
1959 #ifdef __cplusplus
1960 }
1961 #endif
1962 
1963 #endif /* __INCLUDE_RTE_TM_H__ */
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