DPDK  18.02.2
rte_eventdev.h
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1 /*
2  * BSD LICENSE
3  *
4  * Copyright 2016 Cavium, Inc.
5  * Copyright 2016 Intel Corporation.
6  * Copyright 2016 NXP.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
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12  * * Redistributions of source code must retain the above copyright
13  * notice, this list of conditions and the following disclaimer.
14  * * Redistributions in binary form must reproduce the above copyright
15  * notice, this list of conditions and the following disclaimer in
16  * the documentation and/or other materials provided with the
17  * distribution.
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19  * contributors may be used to endorse or promote products derived
20  * from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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28  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #ifndef _RTE_EVENTDEV_H_
36 #define _RTE_EVENTDEV_H_
37 
237 #ifdef __cplusplus
238 extern "C" {
239 #endif
240 
241 #include <rte_common.h>
242 #include <rte_config.h>
243 #include <rte_memory.h>
244 #include <rte_errno.h>
245 
246 struct rte_mbuf; /* we just use mbuf pointers; no need to include rte_mbuf.h */
247 
248 /* Event device capability bitmap flags */
249 #define RTE_EVENT_DEV_CAP_QUEUE_QOS (1ULL << 0)
250 
255 #define RTE_EVENT_DEV_CAP_EVENT_QOS (1ULL << 1)
256 
262 #define RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED (1ULL << 2)
263 
271 #define RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES (1ULL << 3)
272 
278 #define RTE_EVENT_DEV_CAP_BURST_MODE (1ULL << 4)
279 
286 #define RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE (1ULL << 5)
287 
297 #define RTE_EVENT_DEV_CAP_NONSEQ_MODE (1ULL << 6)
298 
307 #define RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK (1ULL << 7)
308 
313 #define RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT (1ULL << 8)
314 
319 /* Event device priority levels */
320 #define RTE_EVENT_DEV_PRIORITY_HIGHEST 0
321 
325 #define RTE_EVENT_DEV_PRIORITY_NORMAL 128
326 
330 #define RTE_EVENT_DEV_PRIORITY_LOWEST 255
331 
343 uint8_t
344 rte_event_dev_count(void);
345 
356 int
357 rte_event_dev_get_dev_id(const char *name);
358 
369 int
370 rte_event_dev_socket_id(uint8_t dev_id);
371 
376  const char *driver_name;
377  struct rte_device *dev;
378  uint32_t min_dequeue_timeout_ns;
380  uint32_t max_dequeue_timeout_ns;
382  uint32_t dequeue_timeout_ns;
384  uint8_t max_event_queues;
386  uint32_t max_event_queue_flows;
396  uint8_t max_event_ports;
408  int32_t max_num_events;
413  uint32_t event_dev_cap;
415 };
416 
432 int
433 rte_event_dev_info_get(uint8_t dev_id, struct rte_event_dev_info *dev_info);
434 
438 #define RTE_EVENT_DEV_ATTR_PORT_COUNT 0
439 
442 #define RTE_EVENT_DEV_ATTR_QUEUE_COUNT 1
443 
446 #define RTE_EVENT_DEV_ATTR_STARTED 2
447 
460 int
461 rte_event_dev_attr_get(uint8_t dev_id, uint32_t attr_id,
462  uint32_t *attr_value);
463 
464 
465 /* Event device configuration bitmap flags */
466 #define RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT (1ULL << 0)
467 
473  uint32_t dequeue_timeout_ns;
481  int32_t nb_events_limit;
489  uint8_t nb_event_queues;
494  uint8_t nb_event_ports;
499  uint32_t nb_event_queue_flows;
520  uint32_t event_dev_cfg;
522 };
523 
543 int
544 rte_event_dev_configure(uint8_t dev_id,
545  const struct rte_event_dev_config *dev_conf);
546 
547 
548 /* Event queue specific APIs */
549 
550 /* Event queue configuration bitmap flags */
551 #define RTE_EVENT_QUEUE_CFG_ALL_TYPES (1ULL << 0)
552 
557 #define RTE_EVENT_QUEUE_CFG_SINGLE_LINK (1ULL << 1)
558 
565  uint32_t nb_atomic_flows;
573  uint32_t nb_atomic_order_sequences;
587  uint32_t event_queue_cfg;
589  uint8_t schedule_type;
594  uint8_t priority;
602 };
603 
626 int
627 rte_event_queue_default_conf_get(uint8_t dev_id, uint8_t queue_id,
628  struct rte_event_queue_conf *queue_conf);
629 
648 int
649 rte_event_queue_setup(uint8_t dev_id, uint8_t queue_id,
650  const struct rte_event_queue_conf *queue_conf);
651 
655 #define RTE_EVENT_QUEUE_ATTR_PRIORITY 0
656 
659 #define RTE_EVENT_QUEUE_ATTR_NB_ATOMIC_FLOWS 1
660 
663 #define RTE_EVENT_QUEUE_ATTR_NB_ATOMIC_ORDER_SEQUENCES 2
664 
667 #define RTE_EVENT_QUEUE_ATTR_EVENT_QUEUE_CFG 3
668 
671 #define RTE_EVENT_QUEUE_ATTR_SCHEDULE_TYPE 4
672 
693 int
694 rte_event_queue_attr_get(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id,
695  uint32_t *attr_value);
696 
697 /* Event port specific APIs */
698 
701  int32_t new_event_threshold;
714  uint16_t dequeue_depth;
720  uint16_t enqueue_depth;
726  uint8_t disable_implicit_release;
733 };
734 
757 int
758 rte_event_port_default_conf_get(uint8_t dev_id, uint8_t port_id,
759  struct rte_event_port_conf *port_conf);
760 
781 int
782 rte_event_port_setup(uint8_t dev_id, uint8_t port_id,
783  const struct rte_event_port_conf *port_conf);
784 
788 #define RTE_EVENT_PORT_ATTR_ENQ_DEPTH 0
789 
792 #define RTE_EVENT_PORT_ATTR_DEQ_DEPTH 1
793 
796 #define RTE_EVENT_PORT_ATTR_NEW_EVENT_THRESHOLD 2
797 
814 int
815 rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id, uint32_t attr_id,
816  uint32_t *attr_value);
817 
834 int
835 rte_event_dev_start(uint8_t dev_id);
836 
844 void
845 rte_event_dev_stop(uint8_t dev_id);
846 
858 int
859 rte_event_dev_close(uint8_t dev_id);
860 
861 /* Scheduler type definitions */
862 #define RTE_SCHED_TYPE_ORDERED 0
863 
889 #define RTE_SCHED_TYPE_ATOMIC 1
890 
908 #define RTE_SCHED_TYPE_PARALLEL 2
909 
921 /* Event types to classify the event source */
922 #define RTE_EVENT_TYPE_ETHDEV 0x0
923 
924 #define RTE_EVENT_TYPE_CRYPTODEV 0x1
925 
926 #define RTE_EVENT_TYPE_TIMERDEV 0x2
927 
928 #define RTE_EVENT_TYPE_CPU 0x3
929 
932 #define RTE_EVENT_TYPE_ETH_RX_ADAPTER 0x4
933 
934 #define RTE_EVENT_TYPE_MAX 0x10
935 
937 /* Event enqueue operations */
938 #define RTE_EVENT_OP_NEW 0
939 
942 #define RTE_EVENT_OP_FORWARD 1
943 
950 #define RTE_EVENT_OP_RELEASE 2
951 
988 struct rte_event {
990  union {
991  uint64_t event;
993  struct {
994  uint32_t flow_id:20;
1001  uint32_t sub_event_type:8;
1005  uint32_t event_type:4;
1009  uint8_t op:2;
1015  uint8_t rsvd:4;
1017  uint8_t sched_type:2;
1022  uint8_t queue_id;
1029  uint8_t priority;
1039  uint8_t impl_opaque;
1046  };
1047  };
1049  union {
1050  uint64_t u64;
1052  void *event_ptr;
1054  struct rte_mbuf *mbuf;
1056  };
1057 };
1058 
1059 /* Ethdev Rx adapter capability bitmap flags */
1060 #define RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT 0x1
1061 
1064 #define RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ 0x2
1065 
1068 #define RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID 0x4
1069 
1095 int
1096 rte_event_eth_rx_adapter_caps_get(uint8_t dev_id, uint8_t eth_port_id,
1097  uint32_t *caps);
1098 
1099 struct rte_eventdev_ops;
1100 struct rte_eventdev;
1101 
1102 typedef uint16_t (*event_enqueue_t)(void *port, const struct rte_event *ev);
1105 typedef uint16_t (*event_enqueue_burst_t)(void *port,
1106  const struct rte_event ev[], uint16_t nb_events);
1109 typedef uint16_t (*event_dequeue_t)(void *port, struct rte_event *ev,
1110  uint64_t timeout_ticks);
1113 typedef uint16_t (*event_dequeue_burst_t)(void *port, struct rte_event ev[],
1114  uint16_t nb_events, uint64_t timeout_ticks);
1117 #define RTE_EVENTDEV_NAME_MAX_LEN (64)
1118 
1127 struct rte_eventdev_data {
1128  int socket_id;
1130  uint8_t dev_id;
1132  uint8_t nb_queues;
1134  uint8_t nb_ports;
1136  void **ports;
1138  struct rte_event_port_conf *ports_cfg;
1140  struct rte_event_queue_conf *queues_cfg;
1142  uint16_t *links_map;
1144  void *dev_private;
1146  uint32_t event_dev_cap;
1148  struct rte_event_dev_config dev_conf;
1150  uint8_t service_inited;
1151  /* Service initialization state */
1152  uint32_t service_id;
1153  /* Service ID*/
1154 
1155  RTE_STD_C11
1156  uint8_t dev_started : 1;
1159  char name[RTE_EVENTDEV_NAME_MAX_LEN];
1162 
1164 struct rte_eventdev {
1165  event_enqueue_t enqueue;
1167  event_enqueue_burst_t enqueue_burst;
1169  event_enqueue_burst_t enqueue_new_burst;
1171  event_enqueue_burst_t enqueue_forward_burst;
1173  event_dequeue_t dequeue;
1175  event_dequeue_burst_t dequeue_burst;
1178  struct rte_eventdev_data *data;
1180  const struct rte_eventdev_ops *dev_ops;
1182  struct rte_device *dev;
1185  RTE_STD_C11
1186  uint8_t attached : 1;
1189 
1190 extern struct rte_eventdev *rte_eventdevs;
1193 static __rte_always_inline uint16_t
1194 __rte_event_enqueue_burst(uint8_t dev_id, uint8_t port_id,
1195  const struct rte_event ev[], uint16_t nb_events,
1196  const event_enqueue_burst_t fn)
1197 {
1198  const struct rte_eventdev *dev = &rte_eventdevs[dev_id];
1199 
1200 #ifdef RTE_LIBRTE_EVENTDEV_DEBUG
1201  if (dev_id >= RTE_EVENT_MAX_DEVS || !rte_eventdevs[dev_id].attached) {
1202  rte_errno = -EINVAL;
1203  return 0;
1204  }
1205 
1206  if (port_id >= dev->data->nb_ports) {
1207  rte_errno = -EINVAL;
1208  return 0;
1209  }
1210 #endif
1211  /*
1212  * Allow zero cost non burst mode routine invocation if application
1213  * requests nb_events as const one
1214  */
1215  if (nb_events == 1)
1216  return (*dev->enqueue)(dev->data->ports[port_id], ev);
1217  else
1218  return fn(dev->data->ports[port_id], ev, nb_events);
1219 }
1220 
1263 static inline uint16_t
1264 rte_event_enqueue_burst(uint8_t dev_id, uint8_t port_id,
1265  const struct rte_event ev[], uint16_t nb_events)
1266 {
1267  const struct rte_eventdev *dev = &rte_eventdevs[dev_id];
1268 
1269  return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
1270  dev->enqueue_burst);
1271 }
1272 
1312 static inline uint16_t
1313 rte_event_enqueue_new_burst(uint8_t dev_id, uint8_t port_id,
1314  const struct rte_event ev[], uint16_t nb_events)
1315 {
1316  const struct rte_eventdev *dev = &rte_eventdevs[dev_id];
1317 
1318  return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
1319  dev->enqueue_new_burst);
1320 }
1321 
1361 static inline uint16_t
1362 rte_event_enqueue_forward_burst(uint8_t dev_id, uint8_t port_id,
1363  const struct rte_event ev[], uint16_t nb_events)
1364 {
1365  const struct rte_eventdev *dev = &rte_eventdevs[dev_id];
1366 
1367  return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
1368  dev->enqueue_forward_burst);
1369 }
1370 
1396 int
1397 rte_event_dequeue_timeout_ticks(uint8_t dev_id, uint64_t ns,
1398  uint64_t *timeout_ticks);
1399 
1466 static inline uint16_t
1467 rte_event_dequeue_burst(uint8_t dev_id, uint8_t port_id, struct rte_event ev[],
1468  uint16_t nb_events, uint64_t timeout_ticks)
1469 {
1470  struct rte_eventdev *dev = &rte_eventdevs[dev_id];
1471 
1472 #ifdef RTE_LIBRTE_EVENTDEV_DEBUG
1473  if (dev_id >= RTE_EVENT_MAX_DEVS || !rte_eventdevs[dev_id].attached) {
1474  rte_errno = -EINVAL;
1475  return 0;
1476  }
1477 
1478  if (port_id >= dev->data->nb_ports) {
1479  rte_errno = -EINVAL;
1480  return 0;
1481  }
1482 #endif
1483 
1484  /*
1485  * Allow zero cost non burst mode routine invocation if application
1486  * requests nb_events as const one
1487  */
1488  if (nb_events == 1)
1489  return (*dev->dequeue)(
1490  dev->data->ports[port_id], ev, timeout_ticks);
1491  else
1492  return (*dev->dequeue_burst)(
1493  dev->data->ports[port_id], ev, nb_events,
1494  timeout_ticks);
1495 }
1496 
1557 int
1558 rte_event_port_link(uint8_t dev_id, uint8_t port_id,
1559  const uint8_t queues[], const uint8_t priorities[],
1560  uint16_t nb_links);
1561 
1601 int
1602 rte_event_port_unlink(uint8_t dev_id, uint8_t port_id,
1603  uint8_t queues[], uint16_t nb_unlinks);
1604 
1632 int
1633 rte_event_port_links_get(uint8_t dev_id, uint8_t port_id,
1634  uint8_t queues[], uint8_t priorities[]);
1635 
1651 int
1652 rte_event_dev_service_id_get(uint8_t dev_id, uint32_t *service_id);
1653 
1667 int
1668 rte_event_dev_dump(uint8_t dev_id, FILE *f);
1669 
1671 #define RTE_EVENT_DEV_XSTATS_NAME_SIZE 64
1672 
1677  RTE_EVENT_DEV_XSTATS_DEVICE,
1678  RTE_EVENT_DEV_XSTATS_PORT,
1679  RTE_EVENT_DEV_XSTATS_QUEUE,
1680 };
1681 
1689  char name[RTE_EVENT_DEV_XSTATS_NAME_SIZE];
1690 };
1691 
1724 int
1725 rte_event_dev_xstats_names_get(uint8_t dev_id,
1726  enum rte_event_dev_xstats_mode mode,
1727  uint8_t queue_port_id,
1728  struct rte_event_dev_xstats_name *xstats_names,
1729  unsigned int *ids,
1730  unsigned int size);
1731 
1758 int
1759 rte_event_dev_xstats_get(uint8_t dev_id,
1760  enum rte_event_dev_xstats_mode mode,
1761  uint8_t queue_port_id,
1762  const unsigned int ids[],
1763  uint64_t values[], unsigned int n);
1764 
1781 uint64_t
1782 rte_event_dev_xstats_by_name_get(uint8_t dev_id, const char *name,
1783  unsigned int *id);
1784 
1805 int
1806 rte_event_dev_xstats_reset(uint8_t dev_id,
1807  enum rte_event_dev_xstats_mode mode,
1808  int16_t queue_port_id,
1809  const uint32_t ids[],
1810  uint32_t nb_ids);
1811 
1822 int rte_event_dev_selftest(uint8_t dev_id);
1823 
1824 #ifdef __cplusplus
1825 }
1826 #endif
1827 
1828 #endif /* _RTE_EVENTDEV_H_ */