DPDK  18.02.2
rte_cryptodev.h
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1 /*-
2  *
3  * Copyright(c) 2015-2017 Intel Corporation. All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
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8  *
9  * * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  * * Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in
13  * the documentation and/or other materials provided with the
14  * distribution.
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17  * from this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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25  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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29  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _RTE_CRYPTODEV_H_
33 #define _RTE_CRYPTODEV_H_
34 
44 #ifdef __cplusplus
45 extern "C" {
46 #endif
47 
48 #include "rte_kvargs.h"
49 #include "rte_crypto.h"
50 #include "rte_dev.h"
51 #include <rte_common.h>
52 #include <rte_config.h>
53 
54 extern const char **rte_cyptodev_names;
55 
56 /* Logging Macros */
57 
58 #define CDEV_LOG_ERR(...) \
59  RTE_LOG(ERR, CRYPTODEV, \
60  RTE_FMT("%s() line %u: " RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
61  __func__, __LINE__, RTE_FMT_TAIL(__VA_ARGS__,)))
62 
63 #define CDEV_LOG_INFO(...) \
64  RTE_LOG(INFO, CRYPTODEV, \
65  RTE_FMT(RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
66  RTE_FMT_TAIL(__VA_ARGS__,)))
67 
68 #ifdef RTE_LIBRTE_CRYPTODEV_DEBUG
69 #define CDEV_LOG_DEBUG(...) \
70  RTE_LOG(DEBUG, CRYPTODEV, \
71  RTE_FMT("%s() line %u: " RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
72  __func__, __LINE__, RTE_FMT_TAIL(__VA_ARGS__,)))
73 
74 #define CDEV_PMD_TRACE(...) \
75  RTE_LOG(DEBUG, CRYPTODEV, \
76  RTE_FMT("[%s] %s: " RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
77  dev, __func__, RTE_FMT_TAIL(__VA_ARGS__,)))
78 
79 #else
80 #define CDEV_LOG_DEBUG(...) (void)0
81 #define CDEV_PMD_TRACE(...) (void)0
82 #endif
83 
84 
85 
99 #define rte_crypto_op_ctod_offset(c, t, o) \
100  ((t)((char *)(c) + (o)))
101 
113 #define rte_crypto_op_ctophys_offset(c, o) \
114  (rte_iova_t)((c)->phys_addr + (o))
115 
119 struct rte_crypto_param_range {
120  uint16_t min;
121  uint16_t max;
122  uint16_t increment;
128 };
129 
133 struct rte_cryptodev_symmetric_capability {
134  enum rte_crypto_sym_xform_type xform_type;
136  RTE_STD_C11
137  union {
138  struct {
139  enum rte_crypto_auth_algorithm algo;
141  uint16_t block_size;
143  struct rte_crypto_param_range key_size;
145  struct rte_crypto_param_range digest_size;
147  struct rte_crypto_param_range aad_size;
149  struct rte_crypto_param_range iv_size;
151  } auth;
153  struct {
154  enum rte_crypto_cipher_algorithm algo;
156  uint16_t block_size;
158  struct rte_crypto_param_range key_size;
160  struct rte_crypto_param_range iv_size;
162  } cipher;
164  struct {
165  enum rte_crypto_aead_algorithm algo;
167  uint16_t block_size;
169  struct rte_crypto_param_range key_size;
171  struct rte_crypto_param_range digest_size;
173  struct rte_crypto_param_range aad_size;
175  struct rte_crypto_param_range iv_size;
177  } aead;
178  };
179 };
180 
182 struct rte_cryptodev_capabilities {
183  enum rte_crypto_op_type op;
186  RTE_STD_C11
187  union {
188  struct rte_cryptodev_symmetric_capability sym;
190  };
191 };
192 
194 struct rte_cryptodev_sym_capability_idx {
195  enum rte_crypto_sym_xform_type type;
196  union {
197  enum rte_crypto_cipher_algorithm cipher;
198  enum rte_crypto_auth_algorithm auth;
199  enum rte_crypto_aead_algorithm aead;
200  } algo;
201 };
202 
213 const struct rte_cryptodev_symmetric_capability *
214 rte_cryptodev_sym_capability_get(uint8_t dev_id,
215  const struct rte_cryptodev_sym_capability_idx *idx);
216 
229 int
230 rte_cryptodev_sym_capability_check_cipher(
231  const struct rte_cryptodev_symmetric_capability *capability,
232  uint16_t key_size, uint16_t iv_size);
233 
247 int
248 rte_cryptodev_sym_capability_check_auth(
249  const struct rte_cryptodev_symmetric_capability *capability,
250  uint16_t key_size, uint16_t digest_size, uint16_t iv_size);
251 
266 int
267 rte_cryptodev_sym_capability_check_aead(
268  const struct rte_cryptodev_symmetric_capability *capability,
269  uint16_t key_size, uint16_t digest_size, uint16_t aad_size,
270  uint16_t iv_size);
271 
283 int
284 rte_cryptodev_get_cipher_algo_enum(enum rte_crypto_cipher_algorithm *algo_enum,
285  const char *algo_string);
286 
298 int
299 rte_cryptodev_get_auth_algo_enum(enum rte_crypto_auth_algorithm *algo_enum,
300  const char *algo_string);
301 
313 int
314 rte_cryptodev_get_aead_algo_enum(enum rte_crypto_aead_algorithm *algo_enum,
315  const char *algo_string);
316 
318 #define RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() \
319  { RTE_CRYPTO_OP_TYPE_UNDEFINED }
320 
321 
330 #define RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO (1ULL << 0)
331 
332 #define RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO (1ULL << 1)
333 
334 #define RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING (1ULL << 2)
335 
336 #define RTE_CRYPTODEV_FF_CPU_SSE (1ULL << 3)
337 
338 #define RTE_CRYPTODEV_FF_CPU_AVX (1ULL << 4)
339 
340 #define RTE_CRYPTODEV_FF_CPU_AVX2 (1ULL << 5)
341 
342 #define RTE_CRYPTODEV_FF_CPU_AESNI (1ULL << 6)
343 
344 #define RTE_CRYPTODEV_FF_HW_ACCELERATED (1ULL << 7)
345 
346 #define RTE_CRYPTODEV_FF_CPU_AVX512 (1ULL << 8)
347 
348 #define RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER (1ULL << 9)
349 
350 #define RTE_CRYPTODEV_FF_CPU_NEON (1ULL << 10)
351 
352 #define RTE_CRYPTODEV_FF_CPU_ARM_CE (1ULL << 11)
353 
354 #define RTE_CRYPTODEV_FF_SECURITY (1ULL << 12)
355 
367 extern const char *
368 rte_cryptodev_get_feature_name(uint64_t flag);
369 
371 struct rte_cryptodev_info {
372  const char *driver_name;
373  uint8_t driver_id;
374  struct rte_pci_device *pci_dev;
376  uint64_t feature_flags;
378  const struct rte_cryptodev_capabilities *capabilities;
381  unsigned max_nb_queue_pairs;
384  struct {
385  unsigned max_nb_sessions;
387  unsigned int max_nb_sessions_per_qp;
391  } sym;
392 };
393 
394 #define RTE_CRYPTODEV_DETACHED (0)
395 #define RTE_CRYPTODEV_ATTACHED (1)
396 
398 enum rte_cryptodev_event_type {
399  RTE_CRYPTODEV_EVENT_UNKNOWN,
400  RTE_CRYPTODEV_EVENT_ERROR,
401  RTE_CRYPTODEV_EVENT_MAX
402 };
403 
405 struct rte_cryptodev_qp_conf {
406  uint32_t nb_descriptors;
407 };
408 
418 typedef void (*rte_cryptodev_cb_fn)(uint8_t dev_id,
419  enum rte_cryptodev_event_type event, void *cb_arg);
420 
421 
423 struct rte_cryptodev_stats {
424  uint64_t enqueued_count;
426  uint64_t dequeued_count;
429  uint64_t enqueue_err_count;
431  uint64_t dequeue_err_count;
433 };
434 
435 #define RTE_CRYPTODEV_NAME_MAX_LEN (64)
436 
447 extern int
448 rte_cryptodev_get_dev_id(const char *name);
449 
460 extern const char *
461 rte_cryptodev_name_get(uint8_t dev_id);
462 
470 extern uint8_t
471 rte_cryptodev_count(void);
472 
481 extern uint8_t
482 rte_cryptodev_device_count_by_driver(uint8_t driver_id);
483 
495 uint8_t
496 rte_cryptodev_devices_get(const char *driver_name, uint8_t *devices,
497  uint8_t nb_devices);
498 /*
499  * Return the NUMA socket to which a device is connected
500  *
501  * @param dev_id
502  * The identifier of the device
503  * @return
504  * The NUMA socket id to which the device is connected or
505  * a default of zero if the socket could not be determined.
506  * -1 if returned is the dev_id value is out of range.
507  */
508 extern int
509 rte_cryptodev_socket_id(uint8_t dev_id);
510 
512 struct rte_cryptodev_config {
513  int socket_id;
514  uint16_t nb_queue_pairs;
516 };
517 
532 extern int
533 rte_cryptodev_configure(uint8_t dev_id, struct rte_cryptodev_config *config);
534 
550 extern int
551 rte_cryptodev_start(uint8_t dev_id);
552 
559 extern void
560 rte_cryptodev_stop(uint8_t dev_id);
561 
571 extern int
572 rte_cryptodev_close(uint8_t dev_id);
573 
599 extern int
600 rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pair_id,
601  const struct rte_cryptodev_qp_conf *qp_conf, int socket_id,
602  struct rte_mempool *session_pool);
603 
618 extern int
619 rte_cryptodev_queue_pair_start(uint8_t dev_id, uint16_t queue_pair_id);
620 
634 extern int
635 rte_cryptodev_queue_pair_stop(uint8_t dev_id, uint16_t queue_pair_id);
636 
644 extern uint16_t
645 rte_cryptodev_queue_pair_count(uint8_t dev_id);
646 
647 
659 extern int
660 rte_cryptodev_stats_get(uint8_t dev_id, struct rte_cryptodev_stats *stats);
661 
667 extern void
668 rte_cryptodev_stats_reset(uint8_t dev_id);
669 
683 extern void
684 rte_cryptodev_info_get(uint8_t dev_id, struct rte_cryptodev_info *dev_info);
685 
686 
700 extern int
701 rte_cryptodev_callback_register(uint8_t dev_id,
702  enum rte_cryptodev_event_type event,
703  rte_cryptodev_cb_fn cb_fn, void *cb_arg);
704 
718 extern int
719 rte_cryptodev_callback_unregister(uint8_t dev_id,
720  enum rte_cryptodev_event_type event,
721  rte_cryptodev_cb_fn cb_fn, void *cb_arg);
722 
723 
724 typedef uint16_t (*dequeue_pkt_burst_t)(void *qp,
725  struct rte_crypto_op **ops, uint16_t nb_ops);
728 typedef uint16_t (*enqueue_pkt_burst_t)(void *qp,
729  struct rte_crypto_op **ops, uint16_t nb_ops);
735 struct rte_cryptodev_callback;
736 
738 TAILQ_HEAD(rte_cryptodev_cb_list, rte_cryptodev_callback);
739 
741 struct rte_cryptodev {
742  dequeue_pkt_burst_t dequeue_burst;
744  enqueue_pkt_burst_t enqueue_burst;
747  struct rte_cryptodev_data *data;
749  struct rte_cryptodev_ops *dev_ops;
751  uint64_t feature_flags;
753  struct rte_device *device;
756  uint8_t driver_id;
759  struct rte_cryptodev_cb_list link_intr_cbs;
762  void *security_ctx;
765  __extension__
766  uint8_t attached : 1;
768 } __rte_cache_aligned;
769 
770 void *
771 rte_cryptodev_get_sec_ctx(uint8_t dev_id);
772 
780 struct rte_cryptodev_data {
781  uint8_t dev_id;
783  uint8_t socket_id;
785  char name[RTE_CRYPTODEV_NAME_MAX_LEN];
788  __extension__
789  uint8_t dev_started : 1;
792  struct rte_mempool *session_pool;
794  void **queue_pairs;
796  uint16_t nb_queue_pairs;
799  void *dev_private;
801 } __rte_cache_aligned;
802 
803 extern struct rte_cryptodev *rte_cryptodevs;
840 static inline uint16_t
841 rte_cryptodev_dequeue_burst(uint8_t dev_id, uint16_t qp_id,
842  struct rte_crypto_op **ops, uint16_t nb_ops)
843 {
844  struct rte_cryptodev *dev = &rte_cryptodevs[dev_id];
845 
846  nb_ops = (*dev->dequeue_burst)
847  (dev->data->queue_pairs[qp_id], ops, nb_ops);
848 
849  return nb_ops;
850 }
851 
883 static inline uint16_t
884 rte_cryptodev_enqueue_burst(uint8_t dev_id, uint16_t qp_id,
885  struct rte_crypto_op **ops, uint16_t nb_ops)
886 {
887  struct rte_cryptodev *dev = &rte_cryptodevs[dev_id];
888 
889  return (*dev->enqueue_burst)(
890  dev->data->queue_pairs[qp_id], ops, nb_ops);
891 }
892 
893 
898 struct rte_cryptodev_sym_session {
899  __extension__ void *sess_private_data[0];
901 };
902 
903 
913 struct rte_cryptodev_sym_session *
914 rte_cryptodev_sym_session_create(struct rte_mempool *mempool);
915 
928 int
929 rte_cryptodev_sym_session_free(struct rte_cryptodev_sym_session *sess);
930 
946 int
947 rte_cryptodev_sym_session_init(uint8_t dev_id,
948  struct rte_cryptodev_sym_session *sess,
949  struct rte_crypto_sym_xform *xforms,
950  struct rte_mempool *mempool);
951 
963 int
964 rte_cryptodev_sym_session_clear(uint8_t dev_id,
965  struct rte_cryptodev_sym_session *sess);
966 
973 unsigned int
974 rte_cryptodev_get_header_session_size(void);
975 
985 unsigned int
986 rte_cryptodev_get_private_session_size(uint8_t dev_id);
987 
1000 int
1001 rte_cryptodev_queue_pair_attach_sym_session(uint8_t dev_id, uint16_t qp_id,
1002  struct rte_cryptodev_sym_session *session);
1003 
1016 int
1017 rte_cryptodev_queue_pair_detach_sym_session(uint8_t dev_id, uint16_t qp_id,
1018  struct rte_cryptodev_sym_session *session);
1019 
1028 int rte_cryptodev_driver_id_get(const char *name);
1029 
1038 const char *rte_cryptodev_driver_name_get(uint8_t driver_id);
1039 
1040 #ifdef __cplusplus
1041 }
1042 #endif
1043 
1044 #endif /* _RTE_CRYPTODEV_H_ */
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