rte_pci.h

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/*-
 *   BSD LICENSE
 *
 *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
 *   All rights reserved.
 *
 *   Redistribution and use in source and binary forms, with or without
 *   modification, are permitted provided that the following conditions
 *   are met:
 *
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
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 *       notice, this list of conditions and the following disclaimer in
 *       the documentation and/or other materials provided with the
 *       distribution.
 *     * Neither the name of Intel Corporation nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.
 *
 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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 *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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/*   BSD LICENSE
 *
 *   Copyright 2013-2014 6WIND S.A.
 *
 *   Redistribution and use in source and binary forms, with or without
 *   modification, are permitted provided that the following conditions
 *   are met:
 *
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in
 *       the documentation and/or other materials provided with the
 *       distribution.
 *     * Neither the name of 6WIND S.A. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.
 *
 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _RTE_PCI_H_
#define _RTE_PCI_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <stdio.h>
#include <stdlib.h>
#include <limits.h>
#include <errno.h>
#include <sys/queue.h>
#include <stdint.h>
#include <inttypes.h>

#include <rte_interrupts.h>

TAILQ_HEAD(pci_device_list, rte_pci_device); 
TAILQ_HEAD(pci_driver_list, rte_pci_driver); 
extern struct pci_driver_list pci_driver_list; 
extern struct pci_device_list pci_device_list; 
#define SYSFS_PCI_DEVICES "/sys/bus/pci/devices"

#define PCI_PRI_FMT "%.4" PRIx16 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8

#define PCI_SHORT_PRI_FMT "%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8

#define PCI_FMT_NVAL 4

#define PCI_RESOURCE_FMT_NVAL 3

#define IORESOURCE_MEM        0x00000200

struct rte_pci_resource {
        uint64_t phys_addr;   
        uint64_t len;         
        void *addr;           
};

#define PCI_MAX_RESOURCE 6

struct rte_pci_id {
        uint16_t vendor_id;           
        uint16_t device_id;           
        uint16_t subsystem_vendor_id; 
        uint16_t subsystem_device_id; 
};

struct rte_pci_addr {
        uint16_t domain;                
        uint8_t bus;                    
        uint8_t devid;                  
        uint8_t function;               
};

struct rte_devargs;

enum rte_kernel_driver {
        RTE_KDRV_UNKNOWN = 0,
        RTE_KDRV_IGB_UIO,
        RTE_KDRV_VFIO,
        RTE_KDRV_UIO_GENERIC,
        RTE_KDRV_NIC_UIO,
        RTE_KDRV_NONE,
};

struct rte_pci_device {
        TAILQ_ENTRY(rte_pci_device) next;       
        struct rte_pci_addr addr;               
        struct rte_pci_id id;                   
        struct rte_pci_resource mem_resource[PCI_MAX_RESOURCE];   
        struct rte_intr_handle intr_handle;     
        struct rte_pci_driver *driver;          
        uint16_t max_vfs;                       
        int numa_node;                          
        struct rte_devargs *devargs;            
        enum rte_kernel_driver kdrv;            
};

#define PCI_ANY_ID (0xffff)

#ifdef __cplusplus

#define RTE_PCI_DEVICE(vend, dev) \
        (vend),                   \
        (dev),                    \
        PCI_ANY_ID,               \
        PCI_ANY_ID
#else

#define RTE_PCI_DEVICE(vend, dev)          \
        .vendor_id = (vend),               \
        .device_id = (dev),                \
        .subsystem_vendor_id = PCI_ANY_ID, \
        .subsystem_device_id = PCI_ANY_ID
#endif

struct rte_pci_driver;

typedef int (pci_devinit_t)(struct rte_pci_driver *, struct rte_pci_device *);

typedef int (pci_devuninit_t)(struct rte_pci_device *);

struct rte_pci_driver {
        TAILQ_ENTRY(rte_pci_driver) next;       
        const char *name;                       
        pci_devinit_t *devinit;                 
        pci_devuninit_t *devuninit;             
        const struct rte_pci_id *id_table;      
        uint32_t drv_flags;                     
};

#define RTE_PCI_DRV_NEED_MAPPING 0x0001

#pragma GCC poison RTE_PCI_DRV_MULTIPLE

#define RTE_PCI_DRV_FORCE_UNBIND 0x0004

#define RTE_PCI_DRV_INTR_LSC    0x0008

#define RTE_PCI_DRV_DETACHABLE  0x0010

struct pci_map {
        void *addr;
        char *path;
        uint64_t offset;
        uint64_t size;
        uint64_t phaddr;
};

struct mapped_pci_resource {
        TAILQ_ENTRY(mapped_pci_resource) next;

        struct rte_pci_addr pci_addr;
        char path[PATH_MAX];
        int nb_maps;
        struct pci_map maps[PCI_MAX_RESOURCE];
};

TAILQ_HEAD(mapped_pci_res_list, mapped_pci_resource);

#define GET_PCIADDR_FIELD(in, fd, lim, dlm)                   \
do {                                                               \
        unsigned long val;                                      \
        char *end;                                              \
        errno = 0;                                              \
        val = strtoul((in), &end, 16);                          \
        if (errno != 0 || end[0] != (dlm) || val > (lim))       \
                return -EINVAL;                                 \
        (fd) = (typeof (fd))val;                                \
        (in) = end + 1;                                         \
} while(0)

static inline int
eal_parse_pci_BDF(const char *input, struct rte_pci_addr *dev_addr)
{
        dev_addr->domain = 0;
        GET_PCIADDR_FIELD(input, dev_addr->bus, UINT8_MAX, ':');
        GET_PCIADDR_FIELD(input, dev_addr->devid, UINT8_MAX, '.');
        GET_PCIADDR_FIELD(input, dev_addr->function, UINT8_MAX, 0);
        return 0;
}

static inline int
eal_parse_pci_DomBDF(const char *input, struct rte_pci_addr *dev_addr)
{
        GET_PCIADDR_FIELD(input, dev_addr->domain, UINT16_MAX, ':');
        GET_PCIADDR_FIELD(input, dev_addr->bus, UINT8_MAX, ':');
        GET_PCIADDR_FIELD(input, dev_addr->devid, UINT8_MAX, '.');
        GET_PCIADDR_FIELD(input, dev_addr->function, UINT8_MAX, 0);
        return 0;
}
#undef GET_PCIADDR_FIELD

/* Compare two PCI device addresses. */
static inline int
rte_eal_compare_pci_addr(const struct rte_pci_addr *addr,
                         const struct rte_pci_addr *addr2)
{
        uint64_t dev_addr, dev_addr2;

        if ((addr == NULL) || (addr2 == NULL))
                return -1;

        dev_addr = (addr->domain << 24) | (addr->bus << 16) |
                                (addr->devid << 8) | addr->function;
        dev_addr2 = (addr2->domain << 24) | (addr2->bus << 16) |
                                (addr2->devid << 8) | addr2->function;

        if (dev_addr > dev_addr2)
                return 1;
        else if (dev_addr < dev_addr2)
                return -1;
        else
                return 0;
}

int rte_eal_pci_scan(void);

int rte_eal_pci_probe(void);

int rte_eal_pci_map_device(struct rte_pci_device *dev);

void rte_eal_pci_unmap_device(struct rte_pci_device *dev);

void *pci_map_resource(void *requested_addr, int fd, off_t offset,
                size_t size, int additional_flags);

void pci_unmap_resource(void *requested_addr, size_t size);

int rte_eal_pci_probe_one(const struct rte_pci_addr *addr);

int rte_eal_pci_detach(const struct rte_pci_addr *addr);

void rte_eal_pci_dump(FILE *f);

void rte_eal_pci_register(struct rte_pci_driver *driver);

void rte_eal_pci_unregister(struct rte_pci_driver *driver);

int rte_eal_pci_read_config(const struct rte_pci_device *device,
                            void *buf, size_t len, off_t offset);

int rte_eal_pci_write_config(const struct rte_pci_device *device,
                             const void *buf, size_t len, off_t offset);

struct rte_pci_ioport {
        struct rte_pci_device *dev;
        uint64_t base;
};

int rte_eal_pci_ioport_map(struct rte_pci_device *dev, int bar,
                           struct rte_pci_ioport *p);

int rte_eal_pci_ioport_unmap(struct rte_pci_ioport *p);

void rte_eal_pci_ioport_read(struct rte_pci_ioport *p,
                             void *data, size_t len, off_t offset);

void rte_eal_pci_ioport_write(struct rte_pci_ioport *p,
                              const void *data, size_t len, off_t offset);

#ifdef RTE_PCI_CONFIG
#include <rte_common.h>
void pci_config_space_set(struct rte_pci_device *dev) __rte_deprecated;
#endif /* RTE_PCI_CONFIG */

#ifdef __cplusplus
}
#endif

#endif /* _RTE_PCI_H_ */