DPDK  16.04.0
rte_memory.h
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1 /*-
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33 
34 #ifndef _RTE_MEMORY_H_
35 #define _RTE_MEMORY_H_
36 
43 #include <stdint.h>
44 #include <stddef.h>
45 #include <stdio.h>
46 
47 #ifdef RTE_EXEC_ENV_LINUXAPP
48 #include <exec-env/rte_dom0_common.h>
49 #endif
50 
51 #ifdef __cplusplus
52 extern "C" {
53 #endif
54 
55 #include <rte_common.h>
56 
57 enum rte_page_sizes {
58  RTE_PGSIZE_4K = 1ULL << 12,
59  RTE_PGSIZE_64K = 1ULL << 16,
60  RTE_PGSIZE_256K = 1ULL << 18,
61  RTE_PGSIZE_2M = 1ULL << 21,
62  RTE_PGSIZE_16M = 1ULL << 24,
63  RTE_PGSIZE_256M = 1ULL << 28,
64  RTE_PGSIZE_512M = 1ULL << 29,
65  RTE_PGSIZE_1G = 1ULL << 30,
66  RTE_PGSIZE_4G = 1ULL << 32,
67  RTE_PGSIZE_16G = 1ULL << 34,
68 };
69 
70 #define SOCKET_ID_ANY -1
71 #define RTE_CACHE_LINE_MASK (RTE_CACHE_LINE_SIZE-1)
73 #define RTE_CACHE_LINE_ROUNDUP(size) \
74  (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE))
75 
78 #if RTE_CACHE_LINE_SIZE == 64
79 #define RTE_CACHE_LINE_SIZE_LOG2 6
80 #elif RTE_CACHE_LINE_SIZE == 128
81 #define RTE_CACHE_LINE_SIZE_LOG2 7
82 #else
83 #error "Unsupported cache line size"
84 #endif
85 
86 #define RTE_CACHE_LINE_MIN_SIZE 64
91 #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
92 
96 #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
97 
98 typedef uint64_t phys_addr_t;
99 #define RTE_BAD_PHYS_ADDR ((phys_addr_t)-1)
104 struct rte_memseg {
105  phys_addr_t phys_addr;
106  union {
107  void *addr;
108  uint64_t addr_64;
109  };
110 #ifdef RTE_LIBRTE_IVSHMEM
111  phys_addr_t ioremap_addr;
112 #endif
113  size_t len;
114  uint64_t hugepage_sz;
115  int32_t socket_id;
116  uint32_t nchannel;
117  uint32_t nrank;
118 #ifdef RTE_LIBRTE_XEN_DOM0
120  uint64_t mfn[DOM0_NUM_MEMBLOCK];
121 #endif
122 } __rte_packed;
123 
132 int rte_mem_lock_page(const void *virt);
133 
144 phys_addr_t rte_mem_virt2phy(const void *virt);
145 
161 const struct rte_memseg *rte_eal_get_physmem_layout(void);
162 
169 void rte_dump_physmem_layout(FILE *f);
170 
177 uint64_t rte_eal_get_physmem_size(void);
178 
186 unsigned rte_memory_get_nchannel(void);
187 
195 unsigned rte_memory_get_nrank(void);
196 
197 #ifdef RTE_LIBRTE_XEN_DOM0
198 
200 int rte_xen_dom0_supported(void);
201 
203 phys_addr_t rte_xen_mem_phy2mch(uint32_t, const phys_addr_t);
204 
216 static inline phys_addr_t
217 rte_mem_phy2mch(uint32_t memseg_id, const phys_addr_t phy_addr)
218 {
219  if (rte_xen_dom0_supported())
220  return rte_xen_mem_phy2mch(memseg_id, phy_addr);
221  else
222  return phy_addr;
223 }
224 
234 int rte_xen_dom0_memory_init(void);
235 
245 int rte_xen_dom0_memory_attach(void);
246 #else
247 static inline int rte_xen_dom0_supported(void)
248 {
249  return 0;
250 }
251 
252 static inline phys_addr_t
253 rte_mem_phy2mch(uint32_t memseg_id __rte_unused, const phys_addr_t phy_addr)
254 {
255  return phy_addr;
256 }
257 #endif
258 
259 #ifdef __cplusplus
260 }
261 #endif
262 
263 #endif /* _RTE_MEMORY_H_ */