DPDK  16.04.0
rte_eth_ctrl.h
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1 /*-
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33 
34 #ifndef _RTE_ETH_CTRL_H_
35 #define _RTE_ETH_CTRL_H_
36 
45 #ifdef __cplusplus
46 extern "C" {
47 #endif
48 
49 /*
50  * A packet can be identified by hardware as different flow types. Different
51  * NIC hardwares may support different flow types.
52  * Basically, the NIC hardware identifies the flow type as deep protocol as
53  * possible, and exclusively. For example, if a packet is identified as
54  * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
55  * though it is an actual IPV4 packet.
56  * Note that the flow types are used to define RSS offload types in
57  * rte_ethdev.h.
58  */
59 #define RTE_ETH_FLOW_UNKNOWN 0
60 #define RTE_ETH_FLOW_RAW 1
61 #define RTE_ETH_FLOW_IPV4 2
62 #define RTE_ETH_FLOW_FRAG_IPV4 3
63 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4
64 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5
65 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6
66 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7
67 #define RTE_ETH_FLOW_IPV6 8
68 #define RTE_ETH_FLOW_FRAG_IPV6 9
69 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10
70 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11
71 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12
72 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
73 #define RTE_ETH_FLOW_L2_PAYLOAD 14
74 #define RTE_ETH_FLOW_IPV6_EX 15
75 #define RTE_ETH_FLOW_IPV6_TCP_EX 16
76 #define RTE_ETH_FLOW_IPV6_UDP_EX 17
77 #define RTE_ETH_FLOW_MAX 18
78 
82 enum rte_filter_type {
83  RTE_ETH_FILTER_NONE = 0,
84  RTE_ETH_FILTER_MACVLAN,
85  RTE_ETH_FILTER_ETHERTYPE,
86  RTE_ETH_FILTER_FLEXIBLE,
87  RTE_ETH_FILTER_SYN,
88  RTE_ETH_FILTER_NTUPLE,
89  RTE_ETH_FILTER_TUNNEL,
90  RTE_ETH_FILTER_FDIR,
91  RTE_ETH_FILTER_HASH,
92  RTE_ETH_FILTER_L2_TUNNEL,
93  RTE_ETH_FILTER_MAX
94 };
95 
99 enum rte_filter_op {
101  RTE_ETH_FILTER_NOP = 0,
102  RTE_ETH_FILTER_ADD,
103  RTE_ETH_FILTER_UPDATE,
104  RTE_ETH_FILTER_DELETE,
105  RTE_ETH_FILTER_FLUSH,
106  RTE_ETH_FILTER_GET,
107  RTE_ETH_FILTER_SET,
108  RTE_ETH_FILTER_INFO,
109  RTE_ETH_FILTER_STATS,
110  RTE_ETH_FILTER_OP_MAX
111 };
112 
116 enum rte_mac_filter_type {
117  RTE_MAC_PERFECT_MATCH = 1,
118  RTE_MACVLAN_PERFECT_MATCH,
119  RTE_MAC_HASH_MATCH,
121  RTE_MACVLAN_HASH_MATCH,
122 };
123 
127 struct rte_eth_mac_filter {
128  uint8_t is_vf;
129  uint16_t dst_id;
130  enum rte_mac_filter_type filter_type;
131  struct ether_addr mac_addr;
132 };
133 
138 #define RTE_ETHTYPE_FLAGS_MAC 0x0001
139 #define RTE_ETHTYPE_FLAGS_DROP 0x0002
146 struct rte_eth_ethertype_filter {
147  struct ether_addr mac_addr;
148  uint16_t ether_type;
149  uint16_t flags;
150  uint16_t queue;
151 };
152 
153 #define RTE_FLEX_FILTER_MAXLEN 128
154 #define RTE_FLEX_FILTER_MASK_SIZE \
155  (RTE_ALIGN(RTE_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT)
156 
163 struct rte_eth_flex_filter {
164  uint16_t len;
165  uint8_t bytes[RTE_FLEX_FILTER_MAXLEN];
166  uint8_t mask[RTE_FLEX_FILTER_MASK_SIZE];
168  uint8_t priority;
169  uint16_t queue;
170 };
171 
177 struct rte_eth_syn_filter {
178  uint8_t hig_pri;
180  uint16_t queue;
181 };
182 
187 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001
188 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002
189 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004
190 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008
191 #define RTE_NTUPLE_FLAGS_PROTO 0x0010
192 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020
194 #define RTE_5TUPLE_FLAGS ( \
195  RTE_NTUPLE_FLAGS_DST_IP | \
196  RTE_NTUPLE_FLAGS_SRC_IP | \
197  RTE_NTUPLE_FLAGS_DST_PORT | \
198  RTE_NTUPLE_FLAGS_SRC_PORT | \
199  RTE_NTUPLE_FLAGS_PROTO)
200 
201 #define RTE_2TUPLE_FLAGS ( \
202  RTE_NTUPLE_FLAGS_DST_PORT | \
203  RTE_NTUPLE_FLAGS_PROTO)
204 
205 #define TCP_URG_FLAG 0x20
206 #define TCP_ACK_FLAG 0x10
207 #define TCP_PSH_FLAG 0x08
208 #define TCP_RST_FLAG 0x04
209 #define TCP_SYN_FLAG 0x02
210 #define TCP_FIN_FLAG 0x01
211 #define TCP_FLAG_ALL 0x3F
212 
218 struct rte_eth_ntuple_filter {
219  uint16_t flags;
220  uint32_t dst_ip;
221  uint32_t dst_ip_mask;
222  uint32_t src_ip;
223  uint32_t src_ip_mask;
224  uint16_t dst_port;
225  uint16_t dst_port_mask;
226  uint16_t src_port;
227  uint16_t src_port_mask;
228  uint8_t proto;
229  uint8_t proto_mask;
233  uint8_t tcp_flags;
234  uint16_t priority;
236  uint16_t queue;
237 };
238 
242 enum rte_eth_tunnel_type {
243  RTE_TUNNEL_TYPE_NONE = 0,
244  RTE_TUNNEL_TYPE_VXLAN,
245  RTE_TUNNEL_TYPE_GENEVE,
246  RTE_TUNNEL_TYPE_TEREDO,
247  RTE_TUNNEL_TYPE_NVGRE,
248  RTE_TUNNEL_TYPE_IP_IN_GRE,
249  RTE_L2_TUNNEL_TYPE_E_TAG,
250  RTE_TUNNEL_TYPE_MAX,
251 };
252 
256 #define ETH_TUNNEL_FILTER_OMAC 0x01
257 #define ETH_TUNNEL_FILTER_OIP 0x02
258 #define ETH_TUNNEL_FILTER_TENID 0x04
259 #define ETH_TUNNEL_FILTER_IMAC 0x08
260 #define ETH_TUNNEL_FILTER_IVLAN 0x10
261 #define ETH_TUNNEL_FILTER_IIP 0x20
263 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \
264  ETH_TUNNEL_FILTER_IVLAN)
265 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \
266  ETH_TUNNEL_FILTER_IVLAN | \
267  ETH_TUNNEL_FILTER_TENID)
268 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \
269  ETH_TUNNEL_FILTER_TENID)
270 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \
271  ETH_TUNNEL_FILTER_TENID | \
272  ETH_TUNNEL_FILTER_IMAC)
273 
277 enum rte_tunnel_iptype {
278  RTE_TUNNEL_IPTYPE_IPV4 = 0,
279  RTE_TUNNEL_IPTYPE_IPV6,
280 };
281 
285 struct rte_eth_tunnel_filter_conf {
286  struct ether_addr outer_mac;
287  struct ether_addr inner_mac;
288  uint16_t inner_vlan;
289  enum rte_tunnel_iptype ip_type;
293  union {
294  uint32_t ipv4_addr;
295  uint32_t ipv6_addr[4];
296  } ip_addr;
298  uint16_t filter_type;
299  enum rte_eth_tunnel_type tunnel_type;
300  uint32_t tenant_id;
301  uint16_t queue_id;
302 };
303 
307 enum rte_eth_global_cfg_type {
308  RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
309  RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
310  RTE_ETH_GLOBAL_CFG_TYPE_MAX,
311 };
312 
316 struct rte_eth_global_cfg {
317  enum rte_eth_global_cfg_type cfg_type;
318  union {
319  uint8_t gre_key_len;
320  uint64_t reserved;
321  } cfg;
322 };
323 
324 #define RTE_ETH_FDIR_MAX_FLEXLEN 16
325 #define RTE_ETH_INSET_SIZE_MAX 128
330 enum rte_eth_input_set_field {
331  RTE_ETH_INPUT_SET_UNKNOWN = 0,
332 
333  /* L2 */
334  RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
335  RTE_ETH_INPUT_SET_L2_DST_MAC,
336  RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
337  RTE_ETH_INPUT_SET_L2_INNER_VLAN,
338  RTE_ETH_INPUT_SET_L2_ETHERTYPE,
339 
340  /* L3 */
341  RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
342  RTE_ETH_INPUT_SET_L3_DST_IP4,
343  RTE_ETH_INPUT_SET_L3_SRC_IP6,
344  RTE_ETH_INPUT_SET_L3_DST_IP6,
345  RTE_ETH_INPUT_SET_L3_IP4_TOS,
346  RTE_ETH_INPUT_SET_L3_IP4_PROTO,
347  RTE_ETH_INPUT_SET_L3_IP6_TC,
348  RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
349  RTE_ETH_INPUT_SET_L3_IP4_TTL,
350  RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
351 
352  /* L4 */
353  RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
354  RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
355  RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
356  RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
357  RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
358  RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
359  RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
360 
361  /* Tunnel */
362  RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
363  RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
364  RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
365  RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
366  RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
367 
368  /* Flexible Payload */
369  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
370  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
371  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
372  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
373  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
374  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
375  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
376  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
377 
378  RTE_ETH_INPUT_SET_DEFAULT = 65533,
379  RTE_ETH_INPUT_SET_NONE = 65534,
380  RTE_ETH_INPUT_SET_MAX = 65535,
381 };
382 
386 enum rte_filter_input_set_op {
387  RTE_ETH_INPUT_SET_OP_UNKNOWN,
388  RTE_ETH_INPUT_SET_SELECT,
389  RTE_ETH_INPUT_SET_ADD,
390  RTE_ETH_INPUT_SET_OP_MAX
391 };
392 
393 
398 struct rte_eth_input_set_conf {
399  uint16_t flow_type;
400  uint16_t inset_size;
401  enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX];
402  enum rte_filter_input_set_op op;
403 };
404 
408 struct rte_eth_l2_flow {
409  uint16_t ether_type;
410 };
411 
415 struct rte_eth_ipv4_flow {
416  uint32_t src_ip;
417  uint32_t dst_ip;
418  uint8_t tos;
419  uint8_t ttl;
420  uint8_t proto;
421 };
422 
426 struct rte_eth_udpv4_flow {
427  struct rte_eth_ipv4_flow ip;
428  uint16_t src_port;
429  uint16_t dst_port;
430 };
431 
435 struct rte_eth_tcpv4_flow {
436  struct rte_eth_ipv4_flow ip;
437  uint16_t src_port;
438  uint16_t dst_port;
439 };
440 
444 struct rte_eth_sctpv4_flow {
445  struct rte_eth_ipv4_flow ip;
446  uint16_t src_port;
447  uint16_t dst_port;
448  uint32_t verify_tag;
449 };
450 
454 struct rte_eth_ipv6_flow {
455  uint32_t src_ip[4];
456  uint32_t dst_ip[4];
457  uint8_t tc;
458  uint8_t proto;
459  uint8_t hop_limits;
460 };
461 
465 struct rte_eth_udpv6_flow {
466  struct rte_eth_ipv6_flow ip;
467  uint16_t src_port;
468  uint16_t dst_port;
469 };
470 
474 struct rte_eth_tcpv6_flow {
475  struct rte_eth_ipv6_flow ip;
476  uint16_t src_port;
477  uint16_t dst_port;
478 };
479 
483 struct rte_eth_sctpv6_flow {
484  struct rte_eth_ipv6_flow ip;
485  uint16_t src_port;
486  uint16_t dst_port;
487  uint32_t verify_tag;
488 };
489 
493 struct rte_eth_mac_vlan_flow {
494  struct ether_addr mac_addr;
495 };
496 
500 enum rte_eth_fdir_tunnel_type {
501  RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
502  RTE_FDIR_TUNNEL_TYPE_NVGRE,
503  RTE_FDIR_TUNNEL_TYPE_VXLAN,
504 };
505 
510 struct rte_eth_tunnel_flow {
511  enum rte_eth_fdir_tunnel_type tunnel_type;
513  uint32_t tunnel_id;
514  struct ether_addr mac_addr;
515 };
516 
521 union rte_eth_fdir_flow {
522  struct rte_eth_l2_flow l2_flow;
523  struct rte_eth_udpv4_flow udp4_flow;
524  struct rte_eth_tcpv4_flow tcp4_flow;
525  struct rte_eth_sctpv4_flow sctp4_flow;
526  struct rte_eth_ipv4_flow ip4_flow;
527  struct rte_eth_udpv6_flow udp6_flow;
528  struct rte_eth_tcpv6_flow tcp6_flow;
529  struct rte_eth_sctpv6_flow sctp6_flow;
530  struct rte_eth_ipv6_flow ipv6_flow;
531  struct rte_eth_mac_vlan_flow mac_vlan_flow;
532  struct rte_eth_tunnel_flow tunnel_flow;
533 };
534 
538 struct rte_eth_fdir_flow_ext {
539  uint16_t vlan_tci;
540  uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN];
542  uint8_t is_vf;
543  uint16_t dst_id;
544 };
545 
549 struct rte_eth_fdir_input {
550  uint16_t flow_type;
551  union rte_eth_fdir_flow flow;
553  struct rte_eth_fdir_flow_ext flow_ext;
555 };
556 
560 enum rte_eth_fdir_behavior {
561  RTE_ETH_FDIR_ACCEPT = 0,
562  RTE_ETH_FDIR_REJECT,
563  RTE_ETH_FDIR_PASSTHRU,
564 };
565 
570 enum rte_eth_fdir_status {
571  RTE_ETH_FDIR_NO_REPORT_STATUS = 0,
572  RTE_ETH_FDIR_REPORT_ID,
573  RTE_ETH_FDIR_REPORT_ID_FLEX_4,
574  RTE_ETH_FDIR_REPORT_FLEX_8,
575 };
576 
580 struct rte_eth_fdir_action {
581  uint16_t rx_queue;
582  enum rte_eth_fdir_behavior behavior;
583  enum rte_eth_fdir_status report_status;
584  uint8_t flex_off;
588 };
589 
595 struct rte_eth_fdir_filter {
596  uint32_t soft_id;
598  struct rte_eth_fdir_input input;
599  struct rte_eth_fdir_action action;
600 };
601 
606 struct rte_eth_fdir_masks {
607  uint16_t vlan_tci_mask;
609  struct rte_eth_ipv4_flow ipv4_mask;
611  struct rte_eth_ipv6_flow ipv6_mask;
613  uint16_t src_port_mask;
615  uint16_t dst_port_mask;
618  uint8_t mac_addr_byte_mask;
620  uint32_t tunnel_id_mask;
621  uint8_t tunnel_type_mask;
623 };
624 
628 enum rte_eth_payload_type {
629  RTE_ETH_PAYLOAD_UNKNOWN = 0,
630  RTE_ETH_RAW_PAYLOAD,
631  RTE_ETH_L2_PAYLOAD,
632  RTE_ETH_L3_PAYLOAD,
633  RTE_ETH_L4_PAYLOAD,
634  RTE_ETH_PAYLOAD_MAX = 8,
635 };
636 
641 struct rte_eth_flex_payload_cfg {
642  enum rte_eth_payload_type type;
643  uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN];
648 };
649 
654 struct rte_eth_fdir_flex_mask {
655  uint16_t flow_type;
656  uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN];
658 };
659 
664 struct rte_eth_fdir_flex_conf {
665  uint16_t nb_payloads;
666  uint16_t nb_flexmasks;
667  struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX];
669  struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX];
671 };
672 
676 enum rte_fdir_mode {
677  RTE_FDIR_MODE_NONE = 0,
678  RTE_FDIR_MODE_SIGNATURE,
679  RTE_FDIR_MODE_PERFECT,
680  RTE_FDIR_MODE_PERFECT_MAC_VLAN,
681  RTE_FDIR_MODE_PERFECT_TUNNEL,
682 };
683 
684 #define UINT32_BIT (CHAR_BIT * sizeof(uint32_t))
685 #define RTE_FLOW_MASK_ARRAY_SIZE \
686  (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
687 
695 struct rte_eth_fdir_info {
696  enum rte_fdir_mode mode;
697  struct rte_eth_fdir_masks mask;
699  struct rte_eth_fdir_flex_conf flex_conf;
700  uint32_t guarant_spc;
701  uint32_t best_spc;
703  uint32_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE];
704  uint32_t max_flexpayload;
707  uint32_t flex_payload_unit;
710  uint32_t max_flex_payload_segment_num;
714  uint16_t flex_payload_limit;
717  uint32_t flex_bitmask_unit;
719  uint32_t max_flex_bitmask_num;
720 };
721 
726 struct rte_eth_fdir_stats {
727  uint32_t collision;
728  uint32_t free;
729  uint32_t maxhash;
732  uint32_t maxlen;
733  uint64_t add;
734  uint64_t remove;
735  uint64_t f_add;
736  uint64_t f_remove;
737  uint32_t guarant_cnt;
738  uint32_t best_cnt;
739 };
740 
744 enum rte_eth_fdir_filter_info_type {
745  RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0,
747  RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT,
748  RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX,
749 };
750 
755 struct rte_eth_fdir_filter_info {
756  enum rte_eth_fdir_filter_info_type info_type;
758  union {
760  struct rte_eth_input_set_conf input_set_conf;
761  } info;
762 };
763 
774 enum rte_eth_hash_filter_info_type {
775  RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0,
777  RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT,
779  RTE_ETH_HASH_FILTER_GLOBAL_CONFIG,
781  RTE_ETH_HASH_FILTER_INPUT_SET_SELECT,
782  RTE_ETH_HASH_FILTER_INFO_TYPE_MAX,
783 };
784 
788 enum rte_eth_hash_function {
789  RTE_ETH_HASH_FUNCTION_DEFAULT = 0,
790  RTE_ETH_HASH_FUNCTION_TOEPLITZ,
791  RTE_ETH_HASH_FUNCTION_SIMPLE_XOR,
792  RTE_ETH_HASH_FUNCTION_MAX,
793 };
794 
795 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \
796  (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT)
797 
806 struct rte_eth_hash_global_conf {
807  enum rte_eth_hash_function hash_func;
809  uint32_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
811  uint32_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
812 };
813 
818 struct rte_eth_hash_filter_info {
819  enum rte_eth_hash_filter_info_type info_type;
821  union {
823  uint8_t enable;
825  struct rte_eth_hash_global_conf global_conf;
827  struct rte_eth_input_set_conf input_set_conf;
828  } info;
829 };
830 
834 struct rte_eth_l2_tunnel_conf {
835  enum rte_eth_tunnel_type l2_tunnel_type;
836  uint16_t ether_type; /* ether type in l2 header */
837  uint32_t tunnel_id; /* port tag id for e-tag */
838  uint16_t vf_id; /* VF id for tag insertion */
839  uint32_t pool; /* destination pool for tag based forwarding */
840 };
841 
842 #ifdef __cplusplus
843 }
844 #endif
845 
846 #endif /* _RTE_ETH_CTRL_H_ */
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